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1377 Commits

Author SHA1 Message Date
Anton Korobeynikov d0a53d380a Ooops, I was too fast to commit the wrong fix :( 
llvm-svn: 78060
 2009-08-04 11:18:31 +00:00
Anton Korobeynikov 3c5b68e2a7 Fix a typo - this unbreaks llvm-gcc build on arm 
llvm-svn: 78059
 2009-08-04 11:12:51 +00:00
Evan Cheng 3870fbb561 Thumb2 does not have ib (increment before) and da (decrement after) forms of ldm / stm. 
llvm-svn: 78057
 2009-08-04 08:34:18 +00:00
Evan Cheng f43cf709cb Remove ARM specific getInlineAsmLength. We'll rely on the simpler (and faster) generic algorithm for now. If more accurate computation is needed, we'll rely on the disassembler. 
llvm-svn: 78032
 2009-08-04 01:56:09 +00:00
Evan Cheng 71756e789b Load / store multiple pass fixes for Thumb2. Not enabled yet. 
llvm-svn: 78031
 2009-08-04 01:43:45 +00:00
Evan Cheng 03eb0e3c33 Emit sub r, #c instead of transforming it to add r, #-c if c fits in 8-bit. This is a bit of pre-mature optimization. 8-bit variant makes it likely it will be narrowed to a 16-bit instruction. 
llvm-svn: 78030
 2009-08-04 01:41:15 +00:00
Bob Wilson f45dee3ad2 Lower Neon VLD* intrinsics to custom DAG nodes, and manually allocate the 
results to fixed registers.

llvm-svn: 78025
 2009-08-04 00:36:16 +00:00
Bob Wilson 17f8878114 Minor cleanup. No functional changes intended. 
llvm-svn: 78024
 2009-08-04 00:25:01 +00:00
Chris Lattner 09441faba9 use TLOF to compute the section for a function instead of 
replicating the logic manually.

llvm-svn: 78011
 2009-08-03 22:32:50 +00:00
Chris Lattner 73ebe435ca convert macho stub emission to use SwitchToSection instead of 
textual sections.

llvm-svn: 78007
 2009-08-03 22:18:15 +00:00
Bob Wilson f307e0bd6d Lower CONCAT_VECTOR during legalization instead of matching it during isel. 
Add a testcase.

llvm-svn: 77992
 2009-08-03 20:36:38 +00:00
Benjamin Kramer c28b306423 llvm_report_error already prints "LLVM ERROR:". So stop reporting errors like "LLVM ERROR: llvm: error:" or "LLVM ERROR: ERROR:". 
llvm-svn: 77971
 2009-08-03 13:33:33 +00:00
Evan Cheng 97f7dfb862 These are done. 
llvm-svn: 77949
 2009-08-03 04:08:36 +00:00
Evan Cheng 8b9deebba3 Use the i12 variant of load / store opcodes if offset is zero. Now we pass all of multisource as well. 
llvm-svn: 77939
 2009-08-03 02:38:06 +00:00
Daniel Dunbar c3719c36e6 Move most targets TargetMachine constructor to only taking a target triple. 
- The C, C++, MSIL, and Mips backends still need the module.

llvm-svn: 77927
 2009-08-02 23:37:13 +00:00
Daniel Dunbar 31b44e8f6c Normalize Subtarget constructors to take a target triple string instead of 
Module*.

Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.

llvm-svn: 77918
 2009-08-02 22:11:08 +00:00
Chris Lattner 1472cf5b3f move dwarf debug info section selection stuff from TAI to 
TLOF, unifying all the dwarf targets at the same time.

llvm-svn: 77889
 2009-08-02 07:24:22 +00:00
Chris Lattner 8a0db7516e ARM TAI no longer needs a TM, but createTargetAsmInfo() still does. 
llvm-svn: 77878
 2009-08-02 05:23:52 +00:00
Chris Lattner e98a3c3ca3 Move the getInlineAsmLength virtual method from TAI to TII, where 
the only real caller (GetFunctionSizeInBytes) uses it.

The custom ARM implementation of this is basically reimplementing
an assembler poorly for negligible gain.  It should be removed 
IMNSHO, but I'll leave that to ARMish folks to decide.

llvm-svn: 77877
 2009-08-02 05:20:37 +00:00
Chris Lattner 1fe76c385b turn some templated inline functions into static functions. 
llvm-svn: 77873
 2009-08-02 04:52:00 +00:00
Chris Lattner fb53861ee0 remove the dead ELFTargetAsmInfo.h/cpp file. TargetAsmInfo 
defaults to being ELF.

llvm-svn: 77866
 2009-08-02 04:33:09 +00:00
Chris Lattner b25afe081c remove TargetAsmInfo::TM, which is now dead. The basic TAI class now 
no longer depends on TM!

llvm-svn: 77863
 2009-08-02 04:27:24 +00:00
Chris Lattner 4e7dfafc03 convert ctors/dtors section to be in TLOF instead of 
TAI.

llvm-svn: 77842
 2009-08-02 00:34:36 +00:00
Chris Lattner b2bbb61f33 REmove dead fields of TAI. 
llvm-svn: 77820
 2009-08-01 22:40:22 +00:00
Evan Cheng e64f48ba8b Workaround a couple of Darwin assembler bugs. 
llvm-svn: 77781
 2009-08-01 06:13:52 +00:00
Evan Cheng e6e8289d72 Split t2MOVCCs since some assemblers do not recognize mov shifted register alias with predicate. 
llvm-svn: 77764
 2009-08-01 01:43:45 +00:00
Evan Cheng 6ab54fdb0a Fix Thumb2 function call isel. Thumb1 and Thumb2 should share the same 
instructions for calls since BL and BLX are always 32-bit long and BX is always
16-bit long.

Also, we should be using BLX to call external function stubs.

llvm-svn: 77756
 2009-08-01 00:16:10 +00:00
Evan Cheng 95d6325859 t2BR_JT is mov pc, it's 2 byte long, not 4. 
llvm-svn: 77744
 2009-07-31 22:22:22 +00:00
Evan Cheng 9eb3f88048 Thumb2 movcc need .w suffix. 
llvm-svn: 77743
 2009-07-31 22:21:55 +00:00
Chris Lattner 4d2c0f9008 switch off of 'Section' onto MCSection. We're not properly using 
MCSection subclasses yet, but this is a step in the right direction.

llvm-svn: 77708
 2009-07-31 18:48:30 +00:00
Evan Cheng be8422e8e0 Until we have a "ALIGN" pseudo instruction, have asm printer emitted a .align 
to ensure the instruction that follows a TBB (when the number of table entries
is odd) is 2-byte aligned.
Patch by Sandeep Patel.

llvm-svn: 77705
 2009-07-31 18:35:56 +00:00
Evan Cheng f6d0fa3d33 - Teach TBB / TBH offset limits are 510 and 131070 respectively since the offset 
is scaled by two.
- Teach GetInstSizeInBytes about TBB and TBH.

llvm-svn: 77701
 2009-07-31 18:28:05 +00:00
Chris Lattner 51d5b43cda refactor section construction in TLOF to be through an explicit 
initialize method, which can be called when an MCContext is available.

llvm-svn: 77687
 2009-07-31 17:42:42 +00:00
Evan Cheng 5811ab5cf3 When fp is not eliminated, instructions with T2_i12 modes will be changed to T2_i8 ones. Take that into consideration when determining stack size limit for reserving register scavenging slot. 
llvm-svn: 77642
 2009-07-30 23:29:25 +00:00
David Goodwin 5aae45fb6f Remove redundant match for frame index from imm8 addrmode, it is handled by the imm12 addrmode. 
llvm-svn: 77632
 2009-07-30 22:45:52 +00:00
David Goodwin 0bfc8312c2 Darwin assembler now recognizes "orn", so remove workaround. 
llvm-svn: 77627
 2009-07-30 21:51:41 +00:00
David Goodwin ce774e2383 Darwin assembler now supports "rrx", so remove workaround. 
llvm-svn: 77625
 2009-07-30 21:38:40 +00:00
David Goodwin 79c079b478 Cleanup and include code selection for some frame index cases. 
llvm-svn: 77622
 2009-07-30 18:56:48 +00:00
David Goodwin cab137d294 Add missing D* register clobbers for Thumb-2 call. 
llvm-svn: 77611
 2009-07-30 18:01:09 +00:00
Chris Lattner c667b60b93 add a random codegen deficiency. 
llvm-svn: 77598
 2009-07-30 16:08:58 +00:00
Daniel Dunbar 6afdc5e694 Switch obvious clients to Twine instead of utostr (when they were already using 
a Twine, e.g., for names).
 - I am a little ambivalent about this; we don't want the string conversion of
   utostr, but using overload '+' mixed with string and integer arguments is
   sketchy. On the other hand, this particular usage is something of an idiom.

llvm-svn: 77579
 2009-07-30 04:20:37 +00:00
Bob Wilson 0dbdec8042 Lower a 128-bit BUILD_VECTOR with 2 elements to a pair of INSERT_VECTOR_ELTs. 
llvm-svn: 77557
 2009-07-30 00:31:25 +00:00
Evan Cheng e3493a91cc tbb / tbh instructions only branch forward, not backwards. 
llvm-svn: 77522
 2009-07-29 23:20:20 +00:00
Evan Cheng 1f58eed638 Add VFP3 D registers to the DPR register class. 
llvm-svn: 77521
 2009-07-29 23:03:41 +00:00
Evan Cheng 175bd14967 Make sure Thumb2 uses the right call instructions. 
llvm-svn: 77507
 2009-07-29 21:26:42 +00:00
Chris Lattner ee68a483ec Give getPointerRegClass() a "kind" value so that targets can 
support multiple different pointer register classes.

llvm-svn: 77501
 2009-07-29 20:31:52 +00:00
Evan Cheng 0d98d8b8b3 - Fix an obvious copy and paste error. 
- Darwin Thumb2 call clobbers r9.

llvm-svn: 77500
 2009-07-29 20:10:36 +00:00
Bob Wilson cf19885a32 Change Neon VLDn intrinsics to return multiple values instead of really 
wide vectors.  Likewise, change VSTn intrinsics to take separate arguments
for each vector in a multi-vector struct.  Adjust tests accordingly.

llvm-svn: 77468
 2009-07-29 16:39:22 +00:00
Chris Lattner 5034329f8d pass the mangler down into the various SectionForGlobal methods. 
No functionality change.

llvm-svn: 77432
 2009-07-29 05:09:30 +00:00
Evan Cheng c6d70ae063 Optimize Thumb2 jumptable to use tbb / tbh when all the offsets fit in byte / halfword. 
llvm-svn: 77422
 2009-07-29 02:18:14 +00:00
David Goodwin 0830980141 Thumb-2: fix typo that caused incorrect stack elimination for VFP operations and very large stack frames. 
llvm-svn: 77401
 2009-07-28 23:52:33 +00:00
Devang Patel a4f43fb5dd Rename MDNode.h header. It defines MDnode and other metadata classes. 
New name is Metadata.h.

llvm-svn: 77370
 2009-07-28 21:49:47 +00:00
Evan Cheng c8bed03349 In thumb2 mode, add pc is unpredictable. Use add + mov pc instead (that is until more optimization goes in). 
llvm-svn: 77364
 2009-07-28 20:53:24 +00:00
David Goodwin 68bb69d6e3 Remove support for ORN to workaround <rdar://problem/7096522>. 
llvm-svn: 77363
 2009-07-28 20:51:25 +00:00
Chris Lattner d6b4b29706 more simplifications and cleanup. :) 
llvm-svn: 77350
 2009-07-28 18:48:43 +00:00
David Goodwin 865c6298d7 Add workaround for <rdar://problem/7098328>. 
llvm-svn: 77340
 2009-07-28 18:15:38 +00:00
Chris Lattner a3242e93b7 the apple "ld_classic" linker doesn't support .literal16 in 32-bit 
mode, and "ld64" (the default linker) falls back to it in -static
mode.

llvm-svn: 77334
 2009-07-28 17:50:28 +00:00
David Goodwin e82862e24e Add Thumb-2 patterns for ARMsrl_flag and ARMsra_flag. 
llvm-svn: 77329
 2009-07-28 17:06:49 +00:00
Evan Cheng 12da273f90 tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have. 
llvm-svn: 77305
 2009-07-28 07:38:35 +00:00
Evan Cheng 73a5119675 Code clean up. No functionality changes. 
llvm-svn: 77301
 2009-07-28 06:24:12 +00:00
Evan Cheng 780748d565 - More refactoring. This gets rid of all of the getOpcode calls. 
- This change also makes it possible to switch between ARM / Thumb on a
  per-function basis.
- Fixed thumb2 routine which expand reg + arbitrary immediate. It was using
  using ARM so_imm logic.
- Use movw and movt to do reg + imm when profitable.
- Other code clean ups and minor optimizations.

llvm-svn: 77300
 2009-07-28 05:48:47 +00:00
Chris Lattner 5e693ed07b Rip all of the global variable lowering logic out of TargetAsmInfo. Since 
it is highly specific to the object file that will be generated in the end,
this introduces a new TargetLoweringObjectFile interface that is implemented
for each of ELF/MachO/COFF/Alpha/PIC16 and XCore.

Though still is still a brutal and ugly refactoring, this is a major step
towards goodness.

This patch also:
1. fixes a bunch of dangling pointer problems in the PIC16 backend.
2. disables the TargetLowering copy ctor which PIC16 was accidentally using.
3. gets us closer to xcore having its own crazy target section flags and
   pic16 not having to shadow sections with its own objects.
4. fixes wierdness where ELF targets would set CStringSection but not
   CStringSection_.  Factor the code better.
5. fixes some bugs in string lowering on ELF targets.

llvm-svn: 77294
 2009-07-28 03:13:23 +00:00
David Goodwin 57b51d9f82 ORN does not require (and can not have) the ".w" suffix. "Orthogonality" is a dirty word at ARM. 
llvm-svn: 77275
 2009-07-27 23:34:12 +00:00
David Goodwin e5b969f6a6 Remove TPat. No patterns depend on just isThumb(). Must use either T1Pat (isThumb1Only()) or T2Pat (is Thumb2). 
llvm-svn: 77242
 2009-07-27 19:59:26 +00:00
Chris Lattner 375a01c34a remove dead code. 
llvm-svn: 77233
 2009-07-27 19:00:33 +00:00
Evan Cheng 38b7eee164 More DCE. 
llvm-svn: 77231
 2009-07-27 18:48:45 +00:00
Evan Cheng 0e075e2429 convertToThreeAddress can't handle Thumb2 instructions (which don't have same address mode as ARM instructions). 
llvm-svn: 77230
 2009-07-27 18:44:00 +00:00
Evan Cheng 18688f431d Get rid of more dead code. 
llvm-svn: 77227
 2009-07-27 18:38:54 +00:00
Evan Cheng 239ed4b343 Cosmetic change. 
llvm-svn: 77222
 2009-07-27 18:31:40 +00:00
Evan Cheng 8f2ed1bc5a Clean up. 
llvm-svn: 77221
 2009-07-27 18:25:24 +00:00
Evan Cheng 056c669e93 Get rid of some more getOpcode calls. 
This also fixes potential problems in ARMBaseInstrInfo routines not recognizing thumb1 instructions when 32-bit and 16-bit instructions mix.

llvm-svn: 77218
 2009-07-27 18:20:05 +00:00
David Goodwin 007031d1b4 Thumb-2 does not have RSC. 
llvm-svn: 77201
 2009-07-27 16:39:05 +00:00
David Goodwin 782f242fd7 Add ".w" suffix for wide thumb-2 instructions. 
llvm-svn: 77199
 2009-07-27 16:31:55 +00:00
Chris Lattner 86b7255776 Eliminate getNamed/getUnnamedSection, adding a new and unified getOrCreateSection 
instead.

llvm-svn: 77186
 2009-07-27 06:17:14 +00:00
Chris Lattner 149465ea06 Eliminate SectionFlags, just embed a SectionKind into Section 
instead and drive things based off of that.

llvm-svn: 77184
 2009-07-27 05:32:16 +00:00
Evan Cheng 371ec9e810 If CPSR is modified but the def is dead, then it's ok to fold the load / store. 
llvm-svn: 77182
 2009-07-27 04:18:04 +00:00
Evan Cheng c47e109335 Use t2LDRi12 and t2STRi12 to load / store to / from stack frames. Eliminate more getOpcode calls. 
llvm-svn: 77181
 2009-07-27 03:14:20 +00:00
Evan Cheng 186332f898 Use the right instructions to copy between GPR and the more strictive tGPR classes. t2MOV does not match the RC requirements. 
llvm-svn: 77175
 2009-07-27 00:33:08 +00:00
Evan Cheng 0e5b149930 Merge isLoadFromStackSlot into one since it behaves the same regardless of sub-target. 
llvm-svn: 77174
 2009-07-27 00:24:36 +00:00
Evan Cheng 26b51b15ed Just use a single isMoveInstr to catch all the cases. 
llvm-svn: 77173
 2009-07-27 00:05:15 +00:00
Evan Cheng faede73a32 Rename tMOVhi2lor to tMOVgpr2tgpr. It's not moving from a high register to a low register. It's moving from a GPR register class to a more restrictive tGPR class. Also change tMOVlor2hir, and tMOVhir2hir. 
llvm-svn: 77172
 2009-07-26 23:59:01 +00:00
Chris Lattner 602d44fa70 untangle a TargetAsmInfo hack where ELFTargetAsmInfo would create a 
'unnamed' bss section, but some impls would want a named one.  Since
they don't have consistent behavior, just make each target do their
own thing, instead of doing something "sortof common" then having
targets change immutable objects later.

llvm-svn: 77165
 2009-07-26 19:23:28 +00:00
Evan Cheng 8953720f23 Refactor. Get rid of a few more getOpcode() calls. 
llvm-svn: 77164
 2009-07-26 18:55:14 +00:00
Daniel Dunbar 9813b0b025 Eliminate some uses of DOUT, cerr, and getNameStart(). 
llvm-svn: 77145
 2009-07-26 07:49:05 +00:00
Daniel Dunbar ee01b242e8 Factor commonality in triple match routines into helper template for registering 
classes, and migrate existing targets over.

llvm-svn: 77126
 2009-07-26 05:03:33 +00:00
Daniel Dunbar bc981d8efa Kill Target specific ModuleMatchQuality stuff. 
- This was overkill and inconsistently implemented.

llvm-svn: 77114
 2009-07-26 02:22:58 +00:00
Bob Wilson 8a37bbebfd Add support for ARM Neon VREV instructions. 
Patch by Anton Korzh, with some modifications from me.

llvm-svn: 77101
 2009-07-26 00:39:34 +00:00
Daniel Dunbar e03eecb75f Remove Value::{isName, getNameRef}. 
Also, change MDString to use a StringRef.

llvm-svn: 77098
 2009-07-25 23:55:21 +00:00
Daniel Dunbar 691a4784db Simplify JIT target selection. 
- Instead of requiring targets to define a JIT quality match function, we just
   have them specify if they support a JIT.

 - Target selection for the JIT just gets the host triple and looks for the best
   target which matches the triple and has a JIT.

llvm-svn: 77060
 2009-07-25 10:09:50 +00:00
Daniel Dunbar 5680b4f285 Add new helpers for registering targets. 
- Less boilerplate == good.

llvm-svn: 77052
 2009-07-25 06:49:55 +00:00
Evan Cheng ea23c3ba46 80 col violation. 
llvm-svn: 77041
 2009-07-25 01:55:25 +00:00
Evan Cheng c1a5cfa9a0 Get rid of a couple of unnecessary getOpcode calls. 
llvm-svn: 77035
 2009-07-25 01:25:08 +00:00
Evan Cheng b2c22f00de Another TODO. 
llvm-svn: 77026
 2009-07-25 00:39:37 +00:00
Evan Cheng f3a1fce8ae Change Thumb2 jumptable codegen to one that uses two level jumps: 
Before:
      adr r12, #LJTI3_0_0
      ldr pc, [r12, +r0, lsl #2]
LJTI3_0_0:
      .long    LBB3_24
      .long    LBB3_30
      .long    LBB3_31
      .long    LBB3_32

After:
      adr r12, #LJTI3_0_0
      add pc, r12, +r0, lsl #2
LJTI3_0_0:
      b.w    LBB3_24
      b.w    LBB3_30
      b.w    LBB3_31
      b.w    LBB3_32

This has several advantages.
1. This will make it easier to optimize this to a TBB / TBH instruction +
   (smaller) table.
2. This eliminate the need for ugly asm printer hack to force the address
   into thumb addresses (bit 0 is one).
3. Same codegen for pic and non-pic.
4. This eliminate the need to align the table so constantpool island pass
   won't have to over-estimate the size.

Based on my calculation, the later is probably slightly faster as well since
ldr pc with shifter address is very slow. That is, it should be a win as long
as the HW implementation can do a reasonable job of branch predict the second
branch.

llvm-svn: 77024
 2009-07-25 00:33:29 +00:00
Daniel Dunbar 0dd5e1ed39 More migration to raw_ostream, the water has dried up around the iostream hole. 
- Some clients which used DOUT have moved to DEBUG. We are deprecating the
   "magic" DOUT behavior which avoided calling printing functions when the
   statement was disabled. In addition to being unnecessary magic, it had the
   downside of leaving code in -Asserts builds, and of hiding potentially
   unnecessary computations.

llvm-svn: 77019
 2009-07-25 00:23:56 +00:00
Evan Cheng f297256136 ARM code emitter can't handle Thumb2 instructions yet. So don't even try. 
llvm-svn: 77018
 2009-07-25 00:13:11 +00:00
Owen Anderson edb4a70325 Revert the ConstantInt constructors back to their 2.5 forms where possible, thanks to contexts-on-types. More to come. 
llvm-svn: 77011
 2009-07-24 23:12:02 +00:00
Evan Cheng c64ce30c67 Uh. It would be useful to actually print the operand. 
llvm-svn: 77004
 2009-07-24 20:47:38 +00:00
Evan Cheng c26c76ec1d Disable my constant island pass optimization (to make use soimm more effectively). It caused infinite looping on lencod. 
llvm-svn: 76995
 2009-07-24 19:31:03 +00:00
Evan Cheng 5a49c54061 Add a workaround for Darwin assembler bug where it's not setting the thumb bit in Thumb2 jumptable entries. We now pass Olden. 
llvm-svn: 76991
 2009-07-24 18:54:23 +00:00