Commit Graph

147335 Commits

Author SHA1 Message Date
Craig Topper 540823f679 [IR] Fix copy and paste mistake in comment. NFC
llvm-svn: 300031
2017-04-12 05:57:46 +00:00
Craig Topper b5194eeebf [InstCombine][IR] Add a commutable BinOp matcher. Use it to reduce some code. NFC
llvm-svn: 300030
2017-04-12 05:49:28 +00:00
Serguei Katkov ecebc3db72 [BPI] Refactor post domination calculation and simple fix for ColdCall
Collection of PostDominatedByUnreachable and PostDominatedByColdCall have been
split out of heuristics itself. Update of the data happens now for each basic
block (before update for PostDominatedByColdCall might be skipped if
unreachable or matadata heuristic handled this basic block).

This separation allows re-ordering of heuristics without loosing
the post-domination information.

Reviewers: sanjoy, junbuml, vsk, chandlerc, reames

Reviewed By: chandlerc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31701

llvm-svn: 300029
2017-04-12 05:42:14 +00:00
Serguei Katkov 51c220cbeb [INC] Test commit. NFC.
Just an update of comment.

llvm-svn: 300026
2017-04-12 04:41:35 +00:00
Kannan Narayanan acb089e12a [AMDGPU] Add a new pass to insert waitcnts. Leave under an option for testing.
Based on comments in https://reviews.llvm.org/D31161.

llvm-svn: 300023
2017-04-12 03:25:12 +00:00
Kyle Butt 04300b033e CodeGen: BlockPlacement: Clear ComputedEdges between functions.
Not clearing was causing non-deterministic compiles for large files. Addresses
for MachineBasicBlocks would end up colliding and we would lay out a block that
we assumed had been pre-computed when it had not been.

llvm-svn: 300022
2017-04-12 03:18:20 +00:00
Bob Haarman 4075ccc717 ThinLTOBitcodeWriter: keep comdats together, rename if leader is renamed
Summary:
COFF requires that every comdat contain a symbol with the same name as
the comdat. ThinLTOBitcodeWriter renames symbols, which may cause this
requirement to be violated. This change avoids such violations by
renaming comdats if their leaders are renamed. It also keeps comdats
together when splitting modules.

Reviewers: pcc, mehdi_amini, tejohnson

Reviewed By: pcc

Subscribers: rnk, Prazek, llvm-commits

Differential Revision: https://reviews.llvm.org/D31963

llvm-svn: 300019
2017-04-12 01:43:07 +00:00
Derek Schuff 821637aa52 Revert "[WebAssembly] Update use of Attributes after r299875"
This reverts commit 2a0eb61dcccb15058d5b2a572bb3da0cf47fd550, r300015

I raced with rnk on the commit.

llvm-svn: 300016
2017-04-12 01:17:31 +00:00
Derek Schuff 857a7e5473 [WebAssembly] Update use of Attributes after r299875
This fixes the failing WebAssemblyLowerEmscriptenEHSjLj tests

llvm-svn: 300015
2017-04-12 01:09:34 +00:00
Reid Kleckner c2cb560045 [IR] Add AttributeSet to hide AttributeSetNode* again, NFC
Summary:
For now, it just wraps AttributeSetNode*. Eventually, it will hold
AvailableAttrs as an inline bitset, and adding and removing enum
attributes will be super cheap.

This sinks AttributeSetNode back down to lib/IR/AttributeImpl.h.

Reviewers: pete, chandlerc

Subscribers: llvm-commits, jfb

Differential Revision: https://reviews.llvm.org/D31940

llvm-svn: 300014
2017-04-12 00:38:00 +00:00
Yi Kong 0b5eed24c5 Remove xgene1 from host detection
This is not a supported mcpu tuning option. We should treat it as
"generic" variant.

Also, add record for cortex-a35.

llvm-svn: 300003
2017-04-11 22:39:55 +00:00
Matt Arsenault 9ac40026dd AMDGPU: Insert wait at start of callee functions
llvm-svn: 300000
2017-04-11 22:29:31 +00:00
Matt Arsenault efa9f4b210 AMDGPU: Refactor SIMachineFunctionInfo slightly
Prepare for handling non-entry functions.

llvm-svn: 299999
2017-04-11 22:29:28 +00:00
Matt Arsenault e622dc3803 AMDGPU: Refactor argument lowering
Split into smaller functions and prepare for handling
non-entry functions.

llvm-svn: 299998
2017-04-11 22:29:24 +00:00
Matt Arsenault fe78ffba92 AMDGPU: Fix folding reg_sequence into copy to phys reg
This was producing an illegal reg_sequence defining
a physical register with virtual register inputs.

llvm-svn: 299997
2017-04-11 22:29:19 +00:00
Matt Arsenault 978b1667d2 AMDGPU: Prune unecessary include
llvm-svn: 299996
2017-04-11 22:29:16 +00:00
Evgeniy Stepanov 90fd87303c [asan] Give global metadata private linkage.
Internal linkage preserves names like "__asan_global_foo" which may
account to 2% of unstripped binary size.

llvm-svn: 299995
2017-04-11 22:28:13 +00:00
Balaram Makam c53c44cec4 [AArch64] Fix scheduling info for INS(vector, general) instruction.
llvm-svn: 299994
2017-04-11 22:14:10 +00:00
Vedant Kumar bb35249308 Avoid some string copies, NFC
llvm-svn: 299993
2017-04-11 22:11:46 +00:00
Andrew Kaylor caf24d2b6c Minor updates to floating point intrinsic documentation
llvm-svn: 299991
2017-04-11 21:52:40 +00:00
Zvi Rackover 30efd24d78 InstSimplify: A shuffle of a splat is always the splat itself
Summary:
Fold:
 shuffle (splat-shuffle), undef, M --> splat-shuffle

Reviewers: spatel, RKSimon, craig.topper

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31527

llvm-svn: 299990
2017-04-11 21:37:02 +00:00
Zvi Rackover f720c036f4 [DAGCombine] Add more test cases for shuffle of splat. NFC.
Tests added contain splat-masks with undef elements.

llvm-svn: 299988
2017-04-11 21:16:59 +00:00
Easwaran Raman ddb9ae192a [x86] Relax the check in areLoadsFromSameBasePtr
Check if the scale operand is identical (doesn't have to be 1) and
do not check the chaain operand.

Differential revision: https://reviews.llvm.org/D31833

llvm-svn: 299986
2017-04-11 21:05:02 +00:00
Anna Thomas 00dc1b74b7 [LV] Avoid vectorizing first order recurrence when phi uses are outside loop
In the vectorization of first order recurrence, we vectorize such
that the last element in the vector will be the one extracted to pass into the
scalar remainder loop. However, this is not true when there is a phi (other
than the primary induction variable) is used outside the loop.
In such a case, we need the value from the second last iteration (i.e.
the phi value), not the last iteration (which would be the phi update).
I've added a test case for this. Also see PR32396.

A follow up patch would generate the correct code gen for such cases,
and turn this vectorization on.

Differential Revision: https://reviews.llvm.org/D31910

Reviewers: mssimpso
llvm-svn: 299985
2017-04-11 21:02:00 +00:00
Sanjay Patel f0cb5a80ad [InstSimplify] add tests for chains of shuffles; NFC
llvm-svn: 299984
2017-04-11 20:54:57 +00:00
Daniel Berlin 554dcd8c89 MemorySSA: Move to Analysis, from Transforms/Utils. It's used as
Analysis, it has Analysis passes, and once NewGVN is made an Analysis,
this removes the cross dependency from Analysis to Transform/Utils.
NFC.

llvm-svn: 299980
2017-04-11 20:06:36 +00:00
Justin Bogner 20dd36a48a MIR: Allow parsing of empty machine functions
If you run llc -stop-after=codegenprepare and feed the resulting MIR
to llc -start-after=codegenprepare, you'll have an empty machine
function since we haven't run any isel yet. Of course, this only works
if the MIRParser believes you that this is okay.

This is essentially a revert of r241862 with a fix for the problem it
was papering over.

llvm-svn: 299975
2017-04-11 19:32:41 +00:00
Evandro Menezes 203eef0ed5 [AArch64] Simplify MacroFusion
This patch assumes that the dependents to be scanned for the ExitSU are its
predecessors; otherwise, the successors of the instr are scanned.

Furthermore, sometimes the ExitSU was being fused twice, since it may be
fused once when scanning the successors from the beginning of the BB and
then again when scanning the predecessors of ExitSU.  Thus, when scanning
the successors of an instr, skip the ExitSU.

llvm-svn: 299974
2017-04-11 19:13:11 +00:00
Davide Italiano 8455f7d623 [X86] Create the correct ADC/SBB SDNode when lowering add.
Differential Revision:  https://reviews.llvm.org/D31911

llvm-svn: 299973
2017-04-11 19:11:20 +00:00
Andrea Di Biagio 8e26936bfd [AddDiscriminators] Assign discriminators to MemIntrinsic calls.
Before this patch, pass AddDiscriminators always avoided to assign
discriminators to intrinsic calls. This was done mainly for two reasons:
 1) We wanted to minimize the number of based discriminators used.
 2) We wanted to avoid non-deterministic discriminator assignment for
    different debug levels.

Unfortunately, that approach was problematic for MemIntrinsic calls.
MemIntrinsic calls can be split by SROA into loads and stores, and each new
load/store instruction would obtain the debug location from the original
intrinsic call.
If we don't assign a discriminator to MemIntrinsic calls, then we cannot
correctly set the discriminator for the newly created loads and stores.
This may have a negative impact on the basic block weight computation
performed by the SampleLoader.

This patch fixes the issue by letting MemIntrinsic calls have a discriminator.

Differential Revision: https://reviews.llvm.org/D31900

llvm-svn: 299972
2017-04-11 19:07:30 +00:00
Craig Topper 9eac2717c6 [InstCombine] Add testcases for (B&A)^A -> ~B & A and (B|A)^A -> B & ~A
llvm-svn: 299971
2017-04-11 18:50:48 +00:00
Craig Topper 957a94cc03 Fix spelling compliment->complement. Mostly refering to 2s complement. NFC
llvm-svn: 299970
2017-04-11 18:47:58 +00:00
Anna Thomas 98cbb067ce [LV] Move first order recurrence test to common folder. NFC
llvm-svn: 299969
2017-04-11 18:31:42 +00:00
Vitaly Buka ea997e10cb [libFuzzer] fix type in signal name.
Fixes PR32576.

Patch by Jakub Zawadzki.

llvm-svn: 299968
2017-04-11 18:20:05 +00:00
Peter Collingbourne 7faa60c406 llvm-lto2: Move the LTO::run() action behind a subcommand.
Move LTO::run() to a "run" subcommand so that we can introduce new subcommands
for testing different parts of the LTO implementation.

This doesn't use llvm::cl subcommands because it doesn't appear to be currently
possible to pass an argument not associated with a subcommand to a subcommand
(e.g. -lto-use-new-pm, -mcpu=yonah).

Differential Revision: https://reviews.llvm.org/D31410

llvm-svn: 299967
2017-04-11 18:12:00 +00:00
Craig Topper 271b2245f4 [InstCombine] Use ConstantExpr::getBinOpIdentity to implement getIdentityValue.
This removes a TODO in getIdentityValue and may allow some transforms to occur earlier. But I was unable to find any transforms we didn't already handle.

llvm-svn: 299966
2017-04-11 17:42:40 +00:00
Yaxun Liu e95df719e1 [AMDGPU] Add A5 to data layout for amdgiz environment
Differential Revision: https://reviews.llvm.org/D31589

llvm-svn: 299964
2017-04-11 17:18:13 +00:00
Xinliang David Li 93bac56bf9 Revert 299953 : test failure needs to be fixed
llvm-svn: 299959
2017-04-11 16:27:20 +00:00
Reid Kleckner 6e545ffc4e [PDB] Emit index/offset pairs for TPI and IPI streams
Summary:
This lets PDB readers lookup type record data by type index in O(log n)
time. It also enables makes `cvdump -t` work on PDBs produced by LLD.
cvdump will not dump a PDB that doesn't have an index-to-offset table.

The table is sorted by type index, and has an entry every 8KB. Looking
up a type record by index is a binary search of this table, followed by
a scan of at most 8KB.

Reviewers: ruiu, zturner, inglorion

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31636

llvm-svn: 299958
2017-04-11 16:26:15 +00:00
Sanjay Patel 28611acef9 revert r299851 - [InstCombine] fix matching of or-of-icmps constants (PR32524)
This is a candidate culprit for multiple bot fails, so reverting pending investigation.

llvm-svn: 299955
2017-04-11 15:57:32 +00:00
Xinliang David Li 249b75c55d [Profile] PE binary coverage bug fix
PR/32584

Differential Revision: https://reviews.llvm.org/D31939

llvm-svn: 299953
2017-04-11 15:51:32 +00:00
Serge Guelton 59a2d7b909 Module::getOrInsertFunction is using C-style vararg instead of variadic templates.
From a user prospective, it forces the use of an annoying nullptr to mark the end of the vararg, and there's not type checking on the arguments.
The variadic template is an obvious solution to both issues.

Differential Revision: https://reviews.llvm.org/D31070

llvm-svn: 299949
2017-04-11 15:01:18 +00:00
Vassil Vassilev e1f12fadc0 Remove unused functions. Remove static qualifier from functions in header files. NFC.
llvm-svn: 299947
2017-04-11 14:55:32 +00:00
Jonathan Roelofs 5e39c44654 [AVR] Migrate to new MCAsmBackend applyFixup
https://reviews.llvm.org/D31875

Patch by Leslie Zhai!

llvm-svn: 299946
2017-04-11 14:51:49 +00:00
Sam Parker 83b64654fd [ARM] Refactor Thumb2 sat instructions
Refactor the USAT, SSAT, USAT16 and SSAT16 instruction descriptions
for Thumb2.

Differential Revision: https://reviews.llvm.org/D31933

llvm-svn: 299945
2017-04-11 14:42:08 +00:00
Geoff Berry 9d597adde4 [GVNHoist] Re-enable GVNHoist by default
Turn GVNHoist back on by default now that PR32153 has been fixed.

llvm-svn: 299944
2017-04-11 14:36:30 +00:00
Nirav Dave a55dad3c33 [SDAG] Factor CandidateMatch check into lambda. NFC.
llvm-svn: 299939
2017-04-11 13:41:19 +00:00
Nirav Dave 83defd1902 [SDAG] Factor ChainMerge into helper function NFCI.
llvm-svn: 299938
2017-04-11 13:41:17 +00:00
Nirav Dave 233eb7a636 [SDAG] Reorder expensive StoreMerge Check after cheaper one. NFC
llvm-svn: 299937
2017-04-11 13:41:16 +00:00
Keno Fischer 30779772cf [StripDeadDebug/DIFinder] Track inlined SPs
Summary:
In rL299692 I improved strip-dead-debug-info's ability to drop CUs that are not
referenced from the current module. However, in doing so I neglected to realize
that some SPs could be referenced entirely from inlined functions. It appears
I was not the only one to make this mistake, because DebugInfoFinder, doesn't
find those SPs either. Fix this in DebugInfoFinder and then use that to make
sure not to drop those CUs in strip-dead-debug-info.

Reviewers: aprantl

Reviewed By: aprantl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31904

llvm-svn: 299936
2017-04-11 13:32:11 +00:00