Commit Graph

421493 Commits

Author SHA1 Message Date
Matt Arsenault 53f3f2bbb1 AArch64: Use Register 2022-04-19 21:07:04 -04:00
Matt Arsenault 4271ae22be AMDGPU: Remove some unreachable code in WWM pass
Defs must be registers and there's no point to code after
llvm_unreachable.
2022-04-19 21:04:33 -04:00
Matt Arsenault bc7902f148 AMDGPU: Remove unused MachineFunctionInfo fields
These were leftovers from a half-implement spill to LDS attempt.
2022-04-19 21:04:33 -04:00
Matt Arsenault 8591328e15 Intrinsics: Mark llvm.eh.sjlj.callsite argument as immarg
The assert in SelectionDAG implies that it is
2022-04-19 21:04:33 -04:00
Matt Arsenault d16945d31b AArch64/GlobalISel: Add -global-isel-abort=1 to select tests
Otherwise the legalizer verifier error isn't triggered since the
default is fallback.
2022-04-19 21:04:32 -04:00
Matt Arsenault 507259820a GlobalISel: Add LegalizeMutations to help use More/FewerElements 2022-04-19 21:04:32 -04:00
Matt Arsenault d6457ec04a AArch64/GlobalISel: Reduce use of getMinClassForRegBank
getMinClassForRegBank and getRegClassForTypeOnBank were basically
identical functions with different APIs. Consolidate on the version
that uses LLT instead of a bitwidth, since that would be more
appropriate to use in a generic API. Keep getMinClassForRegBank around
for now, since copies are a special case that can't simply read the
type from the register operands.
2022-04-19 21:04:32 -04:00
Matt Arsenault 12d79b1514 GlobalISel: Add LLT helper to multiply vector sizes 2022-04-19 21:04:32 -04:00
Matt Arsenault e38c5fded6 AArch64/GlobalISel: Remove some null checks for getVRegDef
getVRegDef is not allowed to fail for generic virtual registers, so
there's not much point in checking it.
2022-04-19 21:04:32 -04:00
Matt Arsenault 96c9190761 AArch64/GlobalISel: Remove asserts on copy instructions
These things are checked in the verifier already, so there's not much
point in re-asserting them here. They aren't directly verified for the
copy-like extension artifacts, but the incorrect output copies would
be caught on the other side.
2022-04-19 21:04:32 -04:00
Fangrui Song c129220eaa [lldb/gdb-remote] Fix -Wswitch after D116462 2022-04-19 18:01:06 -07:00
Mehdi Amini 8608ed1441 Apply clang-tidy fixes for llvm-twine-local in OpenMPToLLVMIRTranslation.cpp (NFC) 2022-04-20 00:39:10 +00:00
Fangrui Song a57d16bf80 [CodeGen] Fix -Wswitch after D116462 2022-04-19 17:33:15 -07:00
Fangrui Song 8b0e7f2293 [CodeGen] Fix -Wswitch after D116462 2022-04-19 17:28:54 -07:00
Andrew Browne 204c12eef9 [DFSan] Print an error before calling null extern_weak functions, incase dfsan instrumentation optimized out a null check.
Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D124051
2022-04-19 17:01:41 -07:00
Vitaly Buka 700442dee3 [msan] Destroy ConstantTokenNone before types above
~ConstantTokenNone access them, so it should be destroyed first.
2022-04-19 16:57:32 -07:00
Vitaly Buka 33c5d8f939 [msan] Disable assert with msan
The assert uses data from just destroyed BasicBlock.
2022-04-19 16:42:05 -07:00
Vitaly Buka 0d0a99cb96 [msan] Advance before destroying entry
-fsanitize-memory-use-after-dtor reports this memory access.
2022-04-19 16:42:04 -07:00
Ilia Diachkov 153dee34f1 [SPIR-V](6/6) Add the module analysis pass and the simplest tests
This patch adds one SPIRV analysis pass and extends AsmPrinter. It is
essential for minimum SPIR-V output. Also it adds several simplest tests
to show that the target basically works.

Differential Revision: https://reviews.llvm.org/D116465

Authors: Aleksandr Bezzubikov, Lewis Crawford, Ilia Diachkov,
Michal Paszkowski, Andrey Tretyakov, Konrad Trifunovic

Co-authored-by: Aleksandr Bezzubikov <zuban32s@gmail.com>
Co-authored-by: Ilia Diachkov <iliya.diyachkov@intel.com>
Co-authored-by: Michal Paszkowski <michal.paszkowski@outlook.com>
Co-authored-by: Andrey Tretyakov <andrey1.tretyakov@intel.com>
Co-authored-by: Konrad Trifunovic <konrad.trifunovic@intel.com>
2022-04-20 01:10:25 +02:00
Ilia Diachkov eab7d3639b [SPIR-V](5/6) Add LegalizerInfo, InstructionSelector and utilities
The patch adds SPIRVLegalizerInfo, SPIRVInstructionSelector and
SPIRV-specific utilities.

Differential Revision: https://reviews.llvm.org/D116464

Authors: Aleksandr Bezzubikov, Lewis Crawford, Ilia Diachkov,
Michal Paszkowski, Andrey Tretyakov, Konrad Trifunovic

Co-authored-by: Aleksandr Bezzubikov <zuban32s@gmail.com>
Co-authored-by: Ilia Diachkov <iliya.diyachkov@intel.com>
Co-authored-by: Michal Paszkowski <michal.paszkowski@outlook.com>
Co-authored-by: Andrey Tretyakov <andrey1.tretyakov@intel.com>
Co-authored-by: Konrad Trifunovic <konrad.trifunovic@intel.com>
2022-04-20 01:10:25 +02:00
Ilia Diachkov ec2590362e [SPIR-V](4/6) Add target lowering, TargetMachine and AsmPrinter
The patch contains target lowering for SPIRV. Also it implements
TargetMachine and AsmPrinter.

Differential Revision: https://reviews.llvm.org/D116463

Authors: Aleksandr Bezzubikov, Lewis Crawford, Ilia Diachkov,
Michal Paszkowski, Andrey Tretyakov, Konrad Trifunovic

Co-authored-by: Aleksandr Bezzubikov <zuban32s@gmail.com>
Co-authored-by: Ilia Diachkov <iliya.diyachkov@intel.com>
Co-authored-by: Michal Paszkowski <michal.paszkowski@outlook.com>
Co-authored-by: Andrey Tretyakov <andrey1.tretyakov@intel.com>
Co-authored-by: Konrad Trifunovic <konrad.trifunovic@intel.com>
2022-04-20 01:10:25 +02:00
Ilia Diachkov 6c69427e88 [SPIR-V](3/6) Add MC layer, object file support, and InstPrinter
The patch adds SPIRV-specific MC layer implementation, SPIRV object
file support and SPIRVInstPrinter.

Differential Revision: https://reviews.llvm.org/D116462

Authors: Aleksandr Bezzubikov, Lewis Crawford, Ilia Diachkov,
Michal Paszkowski, Andrey Tretyakov, Konrad Trifunovic

Co-authored-by: Aleksandr Bezzubikov <zuban32s@gmail.com>
Co-authored-by: Ilia Diachkov <iliya.diyachkov@intel.com>
Co-authored-by: Michal Paszkowski <michal.paszkowski@outlook.com>
Co-authored-by: Andrey Tretyakov <andrey1.tretyakov@intel.com>
Co-authored-by: Konrad Trifunovic <konrad.trifunovic@intel.com>
2022-04-20 01:10:25 +02:00
Ilia Diachkov 40114dd5bf [SPIR-V](2/6) Add SPIRV target description files
Differential Revision: https://reviews.llvm.org/D115786

Authors: Aleksandr Bezzubikov, Lewis Crawford, Ilia Diachkov,
Michal Paszkowski, Andrey Tretyakov, Konrad Trifunovic

Co-authored-by: Aleksandr Bezzubikov <zuban32s@gmail.com>
Co-authored-by: Ilia Diachkov <iliya.diyachkov@intel.com>
Co-authored-by: Michal Paszkowski <michal.paszkowski@outlook.com>
Co-authored-by: Andrey Tretyakov <andrey1.tretyakov@intel.com>
Co-authored-by: Konrad Trifunovic <konrad.trifunovic@intel.com>
2022-04-20 01:10:25 +02:00
Ilia Diachkov 7fd4622d48 [SPIR-V](1/6) Add stub for SPIRV backend
This patch contains enough for lib/Target/SPIRV to compile: a basic
SPIRVTargetMachine and SPIRVTargetInfo.

Differential Revision: https://reviews.llvm.org/D115009

Authors: Aleksandr Bezzubikov, Lewis Crawford, Ilia Diachkov,
Michal Paszkowski, Andrey Tretyakov, Konrad Trifunovic

Co-authored-by: Aleksandr Bezzubikov <zuban32s@gmail.com>
Co-authored-by: Ilia Diachkov <iliya.diyachkov@intel.com>
Co-authored-by: Michal Paszkowski <michal.paszkowski@outlook.com>
Co-authored-by: Andrey Tretyakov <andrey1.tretyakov@intel.com>
Co-authored-by: Konrad Trifunovic <konrad.trifunovic@intel.com>
2022-04-20 01:10:25 +02:00
Nicolai Hähnle b39d34de5e AMDGPU: More mad_64_32 test cases for multiple uses
Also use gfx90a for the gfx9 test, whose code gen should be affected by
faster multiply-add instructions.
2022-04-19 18:00:05 -05:00
Paul Robinson 20c873c12f [PS5] Avoid a driver crash
In some cases, an error constructing a compiler or assembler job could
leave the Inputs in a state that the code for constructing the linker
job was not ready for.
2022-04-19 15:55:32 -07:00
Joseph Huber 8c64928887 [OpenMP] Add necessary registered targets for linker wrapper test
Summary:
The linker wrapper needs to use the registered backend to perform LTO.
This was causing problems on the buildbots that didn't support it.
2022-04-19 18:48:58 -04:00
Joseph Huber dbb10f7097 [OpenMP] Fix deleted move constructor failing on some compiles
Summary:
A previous commit added some new errors that were not correctly casted
to an r-value. This doesn't work on some compilers.
2022-04-19 18:40:15 -04:00
Joseph Huber 260c5df2d5 [OpenMP] Add better testing for the linker wrapper
The linker wrapper is used to perform linking and wrapping of embedded
device object files. Currently its internals are not able to be tested
easily. This patch adds the `--dry-run` and `--print-wrapped-module`
options to investigate the link jobs that will be run along with the
wrapped code that will be created to register the binaries.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D124039
2022-04-19 18:37:09 -04:00
Peter Klausler 497a5f0415 [BPF] Fix a bug in BPFMISimplifyPatchable pass
LLVM BPF pass SimplifyPatchable is used to do necessary
code conversion for CO-RE operations. When studying bpf
selftest 'exhandler', I found a corner case not handled properly.
The following is the C code, modified from original 'exhandler'
code.
  int g;
  int test(struct t1 *p) {
    struct t2 *q = p->q;
    if (q)
      return 0;
    struct t3 *f = q->f;
    if (!f) g = 5;
    return 0;
  }

For code:
  struct t3 *f = q->f;
  if (!f) ...
The IR before BPFMISimplifyPatchable pass looks like:
  %5:gpr = LD_imm64 @"llvm.t2:0:8$0:1"
  %6:gpr = LDD killed %5:gpr, 0
  %7:gpr = LDD killed %6:gpr, 0
  JNE_ri killed %7:gpr, 0, %bb.3
  JMP %bb.2
Note that compiler knows q = 0 based dataflow and value analysis.
The correct generated code after the pass should be
  %5:gpr = LD_imm64 @"llvm.t2:0:8$0:1"
  %7:gpr = LDD killed %5:gpr, 0
  JNE_ri killed %7:gpr, 0, %bb.3
  JMP %bb.2

But the current implementation did further optimization for the
above code and generates
  %5:gpr = LD_imm64 @"llvm.t2:0:8$0:1"
  JNE_ri killed %5:gpr, 0, %bb.3
  JMP %bb.2
which is incorrect.

This patch added a cache to remember those load insns not associated
with CO-RE offset value and will skip these load insns during
transformation.

Differential Revision: https://reviews.llvm.org/D123883
2022-04-19 15:24:26 -07:00
John Demme 6b0bed7ea5 [MLIR] [Python] Add a method to clear live operations map
Introduce a method on PyMlirContext (and plumb it through to Python) to
invalidate all of the operations in the live operations map and clear
it. Since Python has no notion of private data, an end-developer could
reach into some 3rd party API which uses the MLIR Python API (that is
behaving correctly with regard to holding references) and grab a
reference to an MLIR Python Operation, preventing it from being
deconstructed out of the live operations map. This allows the API
developer to clear the map when it calls C++ code which could delete
operations, protecting itself from its users.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D123895
2022-04-19 15:14:09 -07:00
Craig Topper 6db0afb44e [RISCV] Fold (xor (sllw 1, x), -1) -> (rolw ~1, x).
There's an existing generic combine that does this for legal types.
This patch adds a RISCV specific combine for W instructions.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D123983
2022-04-19 15:03:43 -07:00
Fangrui Song e3cf153522 [Driver][test] Remove unneeded clang from -cc1 CHECK lines
The convention is to omit "clang" for -cc1 CHECK lines and test that -triple is adjacent to -cc1.
2022-04-19 14:58:48 -07:00
Richard Smith 63814be4fa [modules] Merge variable template specializations. 2022-04-19 14:48:42 -07:00
Yonghong Song 954ba6045d [BPF] Emit fatal error if out of range for FK_PCRel_2 branch target
Currently for the branch insn like
   "if $dst "#OpcodeStr#" $imm goto $BrDst"
The $BrDst range needs to be in the range of [INT16_MIN, INT16_MAX].

When running bpf selftest with latest llvm, I found
pyperf600.o generated insn with range outside
of [INT16_MIN, INT16_MAX], which caused verifier failure.
See below insn #12.

  0000000000000000 <on_event>:
  ; {
         0:       7b 1a 00 ff 00 00 00 00 *(u64 *)(r10 - 256) = r1
  ;       uint64_t pid_tgid = bpf_get_current_pid_tgid();
         1:       85 00 00 00 0e 00 00 00 call 14
         2:       bf 06 00 00 00 00 00 00 r6 = r0
  ;       pid_t pid = (pid_t)(pid_tgid >> 32);
         3:       bf 61 00 00 00 00 00 00 r1 = r6
         4:       77 01 00 00 20 00 00 00 r1 >>= 32
         5:       63 1a fc ff 00 00 00 00 *(u32 *)(r10 - 4) = r1
         6:       bf a2 00 00 00 00 00 00 r2 = r10
         7:       07 02 00 00 fc ff ff ff r2 += -4
  ;       PidData* pidData = bpf_map_lookup_elem(&pidmap, &pid);
         8:       18 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 r1 = 0 ll
        10:       85 00 00 00 01 00 00 00 call 1
        11:       bf 08 00 00 00 00 00 00 r8 = r0
  ;       if (!pidData)
        12:       15 08 15 e8 00 00 00 00 if r8 == 0 goto -6123 <LBB0_27588+0xffffffffffdae100>
        13:       b4 01 00 00 00 00 00 00 w1 = 0

We may need to add new insn to extend the range of $BrDst.
This patch added a fatal error if out of range so compiler can warn
the otherwise incorrect code generation.

Differential Revision: https://reviews.llvm.org/D123877
2022-04-19 14:41:08 -07:00
LLVM GN Syncbot 858e40d8f3 [gn build] Port bac6cd5bf8 2022-04-19 21:23:58 +00:00
Paul Kirth bac6cd5bf8 [misexpect] Re-implement MisExpect Diagnostics
Reimplements MisExpect diagnostics from D66324 to reconstruct its
original checking methodology only using MD_prof branch_weights
metadata.

New checks rely on 2 invariants:

1) For frontend instrumentation, MD_prof branch_weights will always be
   populated before llvm.expect intrinsics are lowered.

2) for IR and sample profiling, llvm.expect intrinsics will always be
   lowered before branch_weights are populated from the IR profiles.

These invariants allow the checking to assume how the existing branch
weights are populated depending on the profiling method used, and emit
the correct diagnostics. If these invariants are ever invalidated, the
MisExpect related checks would need to be updated, potentially by
re-introducing MD_misexpect metadata, and ensuring it always will be
transformed the same way as branch_weights in other optimization passes.

Frontend based profiling is now enabled without using LLVM Args, by
introducing a new CodeGen option, and checking if the -Wmisexpect flag
has been passed on the command line.

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D115907
2022-04-19 21:23:48 +00:00
Yitzhak Mandelbaum eb2131bdba [clang][dataflow] Do not crash on missing `Value` for struct-typed variable init.
Remove constraint that an initializing expression of struct type must have an
associated `Value`. This invariant is not and will not be guaranteed by the
framework, because of potentially uninitialized fields.

Differential Revision: https://reviews.llvm.org/D123961
2022-04-19 20:52:29 +00:00
Atmn Patel 489894f363 [Libomptarget][remote] Fix compile-time error
This fixes a compile-time error recently introduced within the remote
offloading plugin. This patch also removes some extra linker flags that are unnecessary, and adds an explicit abseil linker flag without which we occasionally get problems.

Differential Revision: https://reviews.llvm.org/D119984
2022-04-19 16:46:01 -04:00
LLVM GN Syncbot b5e962a510 [gn build] Port c57f03415f 2022-04-19 20:13:49 +00:00
Alex Langford c57f03415f [clang][Sema] Add flag to LookupName to force C/ObjC codepath
Motivation: The intent here is for use in Swift.
When building a clang module for swift consumption, swift adds an
extension block to the module for name lookup purposes. Swift calls
this a SwiftLookupTable. One purpose that this serves is to handle
conflicting names between ObjC classes and ObjC protocols. They exist in
different namespaces in ObjC programs, but in Swift they would exist in
the same namespace. Swift handles this by appending a suffix to a
protocol name if it shares a name with a class. For example, if you have
an ObjC class named "Foo" and a protocol with the same name, the
protocol would be renamed to "FooProtocol" when imported into swift.

When constructing the previously mentioned SwiftLookupTable, we use
Sema::LookupName to look up name conflicts for the previous problem.
By this time, the Parser has long finished its job so the call to
LookupName gets nullptr for its Scope (TUScope will be nullptr
by this point). The C/ObjC path does not have this problem because it
only uses the Scope in specific scenarios. The C++ codepath uses the
Scope quite extensively and will fail early on if the Scope it gets is
null. In our very specific case of looking up ObjC classes with a
specific name, we want to force sema::LookupName to take the C/ObjC
codepath even if C++ or ObjC++ is enabled.
2022-04-19 12:57:14 -07:00
Krzysztof Drewniak ddc2eb0ada [mlir] Adds getUpperBound() to LoopLikeInterface.
getUpperBound is analogous to getLowerBound(), except for the upper
bound, and is used in range analysis.

Reviewed By: Mogball

Differential Revision: https://reviews.llvm.org/D124020
2022-04-19 19:56:44 +00:00
Alex Zinenko 0eb403ad1b [mlir][transform] Introduce transform.sequence op
Sequence is an important transform combination primitive that just indicates
transform ops being applied in a row. The simplest version requires fails
immediately if any transformation in the sequence fails. Introducing this
operation allows one to start placing transform IR within other IR.

Depends On D123135

Reviewed By: Mogball, rriddle

Differential Revision: https://reviews.llvm.org/D123664
2022-04-19 21:41:02 +02:00
Denys Petrov e37726beb2 [analyzer] Implemented RangeSet::Factory::castTo function to perform promotions, truncations and conversions.
Summary: Handle casts for ranges working similarly to APSIntType::apply function but for the whole range set. Support promotions, truncations and conversions.
Example:
promotion: char [0, 42] -> short [0, 42] -> int [0, 42] -> llong [0, 42]
truncation: llong [4295033088, 4295033130] -> int [65792, 65834] -> short [256, 298] -> char [0, 42]
conversion: char [-42, 42] -> uint [0, 42]U[4294967254, 4294967295] -> short[-42, 42]

Differential Revision: https://reviews.llvm.org/D103094
2022-04-19 22:34:03 +03:00
Ashay Rane 25c218be36 [MLIR] Add function to create BFloat16 array attribute
This patch adds a new function `mlirDenseElementsAttrBFloat16Get()`,
which accepts the shaped type, the number of BFloat16 values, and a
pointer to an array of BFloat16 values, each of which is a `uint16_t`
value.

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D123981
2022-04-19 19:27:06 +00:00
Jonas Paulsson 0f8c626723 [BuildLibCalls] Introduce getOrInsertLibFunc() for use when building libcalls.
A new set of overloaded functions named getOrInsertLibFunc() are now supposed
to be used instead of getOrInsertFunction() when building a libcall from
within an LLVM optimizer(). The idea is that this new function also makes
sure that any mandatory argument attributes are added to the function
prototype (after calling getOrInsertFunction()).

inferLibFuncAttributes() is renamed to inferNonMandatoryLibFuncAttrs() as it
only adds attributes that are not necessary for correctness but merely
helping with later optimizations.

Generally, the front end is responsible for building a correct function
prototype with the needed argument attributes. If the middle end however is
the one creating the call, e.g. when replacing one libcall with another, it
then must take this responsibility.

This continues the work of properly handling argument extension if required
by the target ABI when building a lib call. getOrInsertLibFunc() now does
this for all libcalls currently built by any LLVM optimizer. It is expected
that when in the future a new optimization builds a new libcall with an
integer argument it is to be added to getOrInsertLibFunc() with the proper
handling. Note that not all targets have it in their ABI to sign/zero extend
integer arguments to the full register width, but this will be done
selectively as determined by getExtAttrForI32Param().

Review: Eli Friedman, Nikita Popov, Dávid Bolvanský

Differential Revision: https://reviews.llvm.org/D123198
2022-04-19 21:22:07 +02:00
Sanjay Patel 8a9c70fc01 [InstCombine] C0 shift (X add nuw C) --> (C0 shift C) shift X
With 'nuw' we can convert the increment of the shift amount
into a pre-shift (constant fold) of the shifted constant:
https://alive2.llvm.org/ce/z/FkTyR2

Fixes issue #41976
2022-04-19 15:21:34 -04:00
Sanjay Patel a9aa14e0cb [InstCombine] add tests for shift-of-add with constants; NFC 2022-04-19 15:21:34 -04:00
Kirill Stoimenov ab99a414ef [ASan] Removed checks if the tested functions were emitted.
Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D124030
2022-04-19 19:20:52 +00:00
Vasileios Porpodas 8d4b5e0833 [NFC][SLP] Improved description of getShallowScore() and getScoreAtLevelRec()
Differential Revision: https://reviews.llvm.org/D124027
2022-04-19 12:15:36 -07:00