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5 Commits

Author SHA1 Message Date
Tom Stellard a6c6e1bfc2 R600: Rework subtarget info and remove AMDILDevice classes 
This should simplify the subtarget definitions and make it easier to
add new ones.

Reviewed-by: Vincent Lejeune <vljn@ovi.com>
llvm-svn: 183566
 2013-06-07 20:37:48 +00:00
Vincent Lejeune f9f4e1e7db R600: Factorize Fetch size limit inside AMDGPUSubTarget 
llvm-svn: 182122
 2013-05-17 16:49:55 +00:00
Vincent Lejeune c299164284 R600: Add FetchInst bit to instruction defs to denote vertex/tex instructions 
v2[Vincent Lejeune]: Split FetchInst into usesTextureCache/usesVertexCache

llvm-svn: 180755
 2013-04-30 00:13:39 +00:00
Dmitri Gribenko 226fea5bd6 Remove redundant 'llvm::' qualifications 
llvm-svn: 172358
 2013-01-13 16:01:15 +00:00
Tom Stellard 75aadc2813 Add R600 backend 
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX

llvm-svn: 169915
 2012-12-11 21:25:42 +00:00