Commit Graph

129751 Commits

Author SHA1 Message Date
Davide Italiano 5f1c87bf07 [IRVerifier] Don't crash on invalid DIFile inside DISubprogram.
r265515, this time with the correct fix. file inside DISubprogram is not
mandatory.

llvm-svn: 265586
2016-04-06 18:46:39 +00:00
Quentin Colombet 6ac88cc1ec [RegisterBankInfo] Get rid of the assert in the constructor of InstructionMapping.
The default constructor now uses the regular constructor and the assert
is not valid anymore.

llvm-svn: 265585
2016-04-06 18:43:46 +00:00
Quentin Colombet 6bdc41a33b [RegisterBankInfo] Call the other constructor of InstructionMapping from the
default constructor, instead of relying on the default constructor of
unique_ptr.

Second attempt at fixing the windows bot.

llvm-svn: 265584
2016-04-06 18:37:44 +00:00
Evgeniy Stepanov 268826a287 [gold] Save bitcode for module partitions (save-temps + split codegen).
llvm-svn: 265583
2016-04-06 18:32:13 +00:00
Quentin Colombet df4aee09f8 [RegisterBankInfo] Provide a default constructor for InstructionMapping
helper class.

The default constructor creates invalid (isValid() == false) instances
and may be used to communicate that a mapping was not found.

llvm-svn: 265581
2016-04-06 18:24:34 +00:00
Davide Italiano 18c968688e [IRVerifier] Prefer dyn_cast<> over isa<> + cast<>.
Thanks to Rafael for the suggestion!

llvm-svn: 265579
2016-04-06 18:13:44 +00:00
Quentin Colombet bb756dbf39 [RegisterBankInfo] Add an helper function to get the size of a register.
The previous method to get the size was too simple and could fail for
physical registers.

llvm-svn: 265578
2016-04-06 18:04:35 +00:00
Duncan P. N. Exon Smith ef06d445e0 IR: Use DenseSet instead of DenseMap for ConstantUniqueMap; NFC
Use a DenseSet instead of a DenseMap for constants in LLVMContextImpl.
Last time I looked at this was some time before r223588, when
DenseSet<V> had no advantage over DenseMap<V,char>.  After r223588,
there's a 50% memory savings.

This is all mechanical.  There were little bits of missing API from
DenseSet so I added the trivial implementations:

  - iterator::operator++(int)
  - template <class LookupKeyT> insert_as(ValueTy, LookupKeyT)

There should be no functionality change, just reduced memory consumption
(this wasn't on a profile or anything; just a cleanup I stumbled on).

llvm-svn: 265577
2016-04-06 17:56:08 +00:00
Duncan P. N. Exon Smith f3d08ef59a IR: Stop explicitly clearing the MDStringCache
The MDStringCache doesn't need to be explicitly cleared before
destruction.  The destructor handles it at least as efficiently.

llvm-svn: 265576
2016-04-06 17:56:05 +00:00
Quentin Colombet 615aca1a25 [RegisterBankInfo] Add a method to get the mapping RegClass -> RegBank.
This should be TableGen'ed at some point.

llvm-svn: 265574
2016-04-06 17:51:41 +00:00
Quentin Colombet 9af77135e5 [RegisterBankInfo] Add methods to get the possible mapping of an instruction on a register bank.
This will be used by the register bank select pass to assign register banks
for generic virtual registers.

llvm-svn: 265573
2016-04-06 17:45:40 +00:00
Saleem Abdulrasool 8e1524e225 vim: add missing keyword
`source_filename` was introduced as a keyword in SVN r264884, but the syntax
file was not updated.

llvm-svn: 265572
2016-04-06 17:42:16 +00:00
Quentin Colombet 4f03c0b806 [AArch64] Change the CMake to avoid to build GlobalISel related APIs
when GISel is not built.
The positive side effects are:
- We do not have to define dummy implementation
- We do not have to do weird gymnastic to avoid like issues (like
  missing constructor or vtable for the base classes)

llvm-svn: 265570
2016-04-06 17:38:12 +00:00
Quentin Colombet c17f744001 [AArch64] Teach the subtarget how to get to the RegisterBankInfo.
Rework the access to GlobalISel APIs to contain how much of
the APIs we need to access for the final executable to build when
GlobalISel is not built.

This prevents massive usage of ifdefs in various places. Now, all the
GlobalISel ifdefs will be happing only in AArch64TargetMachine.cpp.

llvm-svn: 265567
2016-04-06 17:26:03 +00:00
Quentin Colombet 4c85bdb701 [RegisterBankInfo] Make the destructor public... that may be useful!
llvm-svn: 265565
2016-04-06 17:09:34 +00:00
Quentin Colombet 4812c91f56 [RegisterBankInfo] Implement the verify method of the InstructionMapping helper class.
This checks that all the register operands get a proper mapping.

llvm-svn: 265563
2016-04-06 17:01:43 +00:00
Fiona Glaser 045afc4f66 Loop Unroll: add options and tweak to make Partial unrolling more useful
1. Add FullUnrollMaxCount option that works like MaxCount, but also limits
   the unroll count for fully unrolled loops. So if a loop has an iteration
   count over this, it won't fully unroll.
2. Add CLI options for MaxCount and the new option, so they can be tested
   (plus a test).
3. Make partial unrolling obey MaxCount.

An example use-case (the out of tree one this is originally designed for) is
a target’s TTI can analyze a loop and decide on a max unroll count separate
from the size threshold, e.g. based on register pressure, then constrain
LoopUnroll to not exceed that, regardless of the size of the unrolled loop.

llvm-svn: 265562
2016-04-06 16:57:25 +00:00
Quentin Colombet a1ca39d310 [MachineRegisterInfo] Document what is the expected metric for the size of generic registers
llvm-svn: 265561
2016-04-06 16:51:04 +00:00
Hans Wennborg 6849f8f15f Revert r265450 "[X86] Reuse EFLAGS and form LOCKed ops when only user is SETCC."
It caused ASan 32-bit tests to hang (PR27245).

llvm-svn: 265559
2016-04-06 16:44:38 +00:00
Fiona Glaser 16332ba861 LoopUnroll: only allow non-modulo Partial unrolling when Runtime=true
Patch by Evgeny Stupachenko <evstupac@gmail.com>.

llvm-svn: 265558
2016-04-06 16:43:45 +00:00
Quentin Colombet 3768f7005d [RegisterBankInfo] Implement the verify method for the ValueMapping helper class.
The method checks that the value is fully defined accross the different partial
mappings and that the partial mappings are compatible between each other.

llvm-svn: 265556
2016-04-06 16:40:23 +00:00
Quentin Colombet 2423fc419c [RegisterBankInfo] Add a verify method for the PartialMapping helper class.
This verifies that the PartialMapping can be accomadated into the related
register bank.

llvm-svn: 265555
2016-04-06 16:33:26 +00:00
Valery Pykhtin 1dcb91b4de Revert "[AMDGPU] llvm-objdump: Minimal HSA Code Object disassembler support."
This reverts commit r265550. There're problems with endianness on dumping instruction bytes. Need to find out how to use support::ulittle32_t type properly.

llvm-svn: 265554
2016-04-06 16:30:21 +00:00
Quentin Colombet 89c33caee3 [RegisterBankInfo] Add a couple of helper classes for the future cost model.
llvm-svn: 265553
2016-04-06 16:27:01 +00:00
Hans Wennborg a7e396b5ef Revert "Re-commit r265039 "[X86] Merge adjacent stack adjustments in eliminateCallFramePseudoInstr (PR27140)""
It seems to be causing ASan tests to crash, probably due to
miscompiling the run-time somehow.

llvm-svn: 265551
2016-04-06 16:10:20 +00:00
Valery Pykhtin bd90c60afb [AMDGPU] llvm-objdump: Minimal HSA Code Object disassembler support.
Differential revision: http://reviews.llvm.org/D16998

llvm-svn: 265550
2016-04-06 15:55:10 +00:00
Quentin Colombet d1d324b2ae [AArch64] Use the default constructor of RegisterBankInfo when GlobalISel is not built.
This will avoid link-time error as the defautl constructor of RegisterBankInfo is
the only one available when GlobalISel is not built.

llvm-svn: 265549
2016-04-06 15:53:13 +00:00
Quentin Colombet 911181882e [RegisterBankInfo] Inline the destructor to avoid link-time error when GlobalISel is not built.
llvm-svn: 265548
2016-04-06 15:47:17 +00:00
Wei Mi 18293bef4e Recommit r265309 after fixed an invalid memory reference bug happened
when DenseMap growed and moved memory. I verified it fixed the bootstrap
problem on x86_64-linux-gnu but I cannot verify whether it fixes
the bootstrap error on clang-ppc64be-linux. I will watch the build-bot
result closely.

Replace analyzeSiblingValues with new algorithm to fix its compile
time issue. The patch is to solve PR17409 and its duplicates.

analyzeSiblingValues is a N x N complexity algorithm where N is
the number of siblings generated by reg splitting. Although it
causes siginificant compile time issue when N is large, it is also
important for performance since it removes redundent spills and
enables rematerialization.

To solve the compile time issue, the patch removes analyzeSiblingValues
and replaces it with lower cost alternatives containing two parts. The
first part creates a new spill hoisting method in postOptimization of
register allocation. It does spill hoisting at once after all the spills
are generated instead of inside every instance of selectOrSplit. The
second part queries the define expr of the original register for
rematerializaiton and keep it always available during register allocation
even if it is already dead. It deletes those dead instructions only in
postOptimization. With the two parts in the patch, it can remove
analyzeSiblingValues without sacrificing performance.

Differential Revision: http://reviews.llvm.org/D15302

llvm-svn: 265547
2016-04-06 15:41:07 +00:00
Silviu Baranga a393baf1fd Revert r265535 until we know how we can fix the bots
llvm-svn: 265541
2016-04-06 14:06:32 +00:00
Sam Kolton ff90c60a78 [AMDGPU] AsmParser: disable DPP for unsupported instructions. New dpp tests. Fix v_nop_dpp.
Summary:
1. Disable DPP encoding for instructions that do not support it:
    - VOP1:
        - v_readfirstlane_b32
        - v_clrexcp
        - v_movreld_b32
        - v_movrels_b32
        - v_movrelsd_b32
    - VOP2:
        - v_madmk_f16/32
        - v_madak_f16/32
    - VOPC, VINTRP, VOP3
2. Fix DPP for v_nop
3. New DPP tests for VOP1 and VOP2 instructions

Reviewers: nhaustov, tstellarAMD, vpykhtin

Subscribers: tstellarAMD, arsenm

Differential Revision: http://reviews.llvm.org/D18552

llvm-svn: 265538
2016-04-06 13:29:59 +00:00
Chad Rosier 074ce836f0 Simplify logic. NFC.
llvm-svn: 265537
2016-04-06 13:27:13 +00:00
Silviu Baranga 72b4a4a330 [SCEV] Introduce a guarded backedge taken count and use it in LAA and LV
Summary:
When the backedge taken codition is computed from an icmp, SCEV can
deduce the backedge taken count only if one of the sides of the icmp
is an AddRecExpr. However, due to sign/zero extensions, we sometimes
end up with something that is not an AddRecExpr.

However, we can use SCEV predicates to produce a 'guarded' expression.
This change adds a method to SCEV to get this expression, and the
SCEV predicate associated with it.

In HowManyGreaterThans and HowManyLessThans we will now add a SCEV
predicate associated with the guarded backedge taken count when the
analyzed SCEV expression is not an AddRecExpr. Note that we only do
this as an alternative to returning a 'CouldNotCompute'.

We use new feature in Loop Access Analysis and LoopVectorize to analyze
and transform more loops.

Reviewers: anemet, mzolotukhin, hfinkel, sanjoy

Subscribers: flyingforyou, mcrosier, atrick, mssimpso, sanjoy, mzolotukhin, llvm-commits

Differential Revision: http://reviews.llvm.org/D17201

llvm-svn: 265535
2016-04-06 13:18:26 +00:00
Evgeny Astigeevich 9c24ebfa6d [AArch64][CodeGen] NFC refactor AArch64InstrInfo::optimizeCompareInstr to prepare it for fixing a bug in it
AArch64InstrInfo::optimizeCompareInstr has a bug which causes generation of incorrect code (PR#27158).
The patch refactors the function to simplify reviewing the fix of the bug.

1. Function name ‘modifiesConditionCode’ is changed to ‘areCFlagsAccessedBetweenInstrs’
   to reflect that the function can check modifying accesses, reading accesses or both.
2. Function ‘AArch64InstrInfo::optimizeCompareInstr’
   - Documented the function
   - Cmp_NZCV is DeadNZCVIdx to reflect that it is an operand index of dead NZCV
   - The code for the case of substituting CmpInstr is put into separate
     functions the main of them is ‘substituteCmpInstr’.

Differential Revision: http://reviews.llvm.org/D18609

llvm-svn: 265531
2016-04-06 11:39:00 +00:00
Chuang-Yu Cheng 6e1408a891 [ppc64] Temporary disable sibling call optimization on ppc64 due to breaking test case
r265506 breaks print-stack-trace.cc test case of compiler-rt in bootstrap
test.

http://lab.llvm.org:8011/builders/clang-ppc64be-linux-multistage/builds/1708

llvm-svn: 265528
2016-04-06 10:48:36 +00:00
David Majnemer 12fd50410d [SLPVectorizer] Vectorizing the libm sqrt to llvm's sqrt intrinsic requires nnan
To quote the langref "Unlike sqrt in libm, however, llvm.sqrt has
undefined behavior for negative numbers other than -0.0 (which allows
for better optimization, because there is no need to worry about errno
being set). llvm.sqrt(-0.0) is defined to return -0.0 like IEEE sqrt."

This means that it's unsafe to replace sqrt with llvm.sqrt unless the
call is annotated with nnan.

Thanks to Hal Finkel for pointing this out!

llvm-svn: 265521
2016-04-06 07:04:53 +00:00
Duncan P. N. Exon Smith 3e0430e0a8 IR: Move MDStrings to a BumpPtrAllocator
We never delete any MDString until the context is destroyed.  Might as
well throw them onto a BumpPtrAllocator.

llvm-svn: 265520
2016-04-06 06:41:54 +00:00
Duncan P. N. Exon Smith bdfc984679 IRMover: Steal arguments when moving functions, NFC
Instead of copying arguments from the source function to the
destination, steal them.  This has a few advantages.

  - The ValueMap doesn't need to be seeded with (or cleared of)
    Arguments.

  - Often the destination function won't have created any arguments yet,
    so this avoids malloc traffic.

  - Argument names don't need to be copied.

Because argument lists are lazy, this required a new
Function::stealArgumentListFrom helper.

llvm-svn: 265519
2016-04-06 06:38:15 +00:00
Davide Italiano 22680e1c5c Revert "[IRVerifier] Don't crash on invalid DIFile inside DISubprogram."
This reverts commit r265515 as lots of tests need to be fixed before
this actually can go in.

llvm-svn: 265517
2016-04-06 04:34:38 +00:00
Richard Trieu f35d4b0928 Add parentheses to silence warning.
llvm-svn: 265516
2016-04-06 04:22:00 +00:00
Davide Italiano 2deceb0339 [IRVerifier] Don't crash on invalid DIFile inside DISubprogram.
llvm-svn: 265515
2016-04-06 03:57:47 +00:00
Davide Italiano 8dc23a3cb5 [IRVerifier] Avoid crashing on an invalid compile unit.
llvm-svn: 265514
2016-04-06 03:07:58 +00:00
Matthias Braun 8e594fdf19 AArch64: Fix compile error
Fixed to adapt a use of enterBasicBlock() in my last commit (because I
had follow on patches in my repository that change the code).

llvm-svn: 265513
2016-04-06 02:59:44 +00:00
Matthias Braun 7dc03f060e RegisterScavenger: Take a reference as enterBasicBlock() argument.
Make it obvious that the argument cannot be nullptr.
Remove an unnecessary nullptr check in initRegState.

llvm-svn: 265511
2016-04-06 02:47:09 +00:00
Matthias Braun 61da4cef6c LivePhysRegs: removeReg() must remove aliased registers
We must remove all aliased registers which may be more than the all sub
and super registers combined.

Bug found while reading the code. The bug does not affect any existing
target as the only use of register aliases I could found were control
registers on ARM and Hexagon which are all reserved.

llvm-svn: 265510
2016-04-06 02:46:35 +00:00
Matthias Braun 3bb0fcc118 LivePhysRegs: Remove redundant check
llvm-svn: 265509
2016-04-06 02:46:04 +00:00
Duncan P. N. Exon Smith 6f2e37429a ValueMapper: Fix delayed blockaddress handling after r265273
r265273 added Mapper::mapBlockAddress, which delays mapping a
blockaddress value until the function has a body.  The condition was
backwards, and should be checking Function::empty instead of
GlobalValue::isDeclaration.

llvm-svn: 265508
2016-04-06 02:25:12 +00:00
Duncan P. N. Exon Smith 29883866a4 AsmParser: Don't crash on unresolved !tbaa
Instead of crashing, give a nice error.  As a drive-by, fix the location
associated with the errors for unresolved metadata (the location was off
by one token).

llvm-svn: 265507
2016-04-06 02:06:40 +00:00
Chuang-Yu Cheng 2e5973ef74 [ppc64] Enable sibling call optimization on ppc64 ELFv1/ELFv2 abi
This patch enable sibling call optimization on ppc64 ELFv1/ELFv2 abi, and
add a couple of test cases. This patch also passed llvm/clang bootstrap
test, and spec2006 build/run/result validation.

Original issue: https://llvm.org/bugs/show_bug.cgi?id=25617

Great thanks to Tom's (tjablin) help, he contributed a lot to this patch.
Thanks Hal and Kit's invaluable opinions!

Reviewers: hfinkel kbarton

http://reviews.llvm.org/D16315

llvm-svn: 265506
2016-04-06 02:04:38 +00:00
Chuang-Yu Cheng 024a623c55 [Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random number, set bool, and dfp test significance
This patch implement the following instructions:
- addpcis subpcis
- maddhd maddhdu maddld
- modsw moduw modsd modud
- darn
- extswsli extswsli.
- setb
- dtstsfi dtstsfiq

Total 15 instructions

Reviewers: nemanjai hfinkel tjablin amehsan kbarton

http://reviews.llvm.org/D17885

llvm-svn: 265505
2016-04-06 01:47:02 +00:00
Chuang-Yu Cheng eaf4b3d75c [Power9] Implement copy-paste, msgsync, slb, and stop instructions
This patch implements the following BookII and Book III instructions:
- copy copy_first cp_abort paste paste. paste_last
- msgsync
- slbieg slbsync
- stop

Total 10 instructions

Reviewers: nemanjai hfinkel tjablin amehsan kbarton
llvm-svn: 265504
2016-04-06 01:46:45 +00:00
Sanjoy Das 99abb2728b [RS4GC] Add a comment
llvm-svn: 265503
2016-04-06 01:33:54 +00:00
Sanjoy Das 65a60670e8 Lower @llvm.experimental.deoptimize as a noreturn call
While preserving the return value for @llvm.experimental.deoptimize at
the IR level is useful during mid-level optimization, doing so at the
machine instruction level requires generating some extra code and a
return that is non-ideal.  This change has LLVM lower

```
  %val = call @llvm.experimental.deoptimize
  ret %val
```

to effectively

```
  call @__llvm_deoptimize()
  unreachable
```

instead.

llvm-svn: 265502
2016-04-06 01:33:49 +00:00
Tom Stellard 3ec09e61d1 AMDGPU: Document address space mapping
Summary:
Address space mapping is described in lib/Target/AMDGPU/AMDGPU.h in
Doxygen comments. This patch adds the description to user guide for
AMDGPU back-end.

Patch By: Vedran Miletić

Reviewers: tstellarAMD, arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17046

llvm-svn: 265500
2016-04-06 01:29:19 +00:00
NAKAMURA Takumi 285c8ff753 AArch64CodeGen: Make AArch64RegisterBankInfo.cpp optional along LLVM_BUILD_GLOBAL_ISEL.
llvm-svn: 265499
2016-04-06 01:18:08 +00:00
David Majnemer 25d03dbcde [SLPVectorizer] Vectorize libcalls of sqrt
We didn't realize that we could transform the libcall into a vectorized
intrinsic.

llvm-svn: 265493
2016-04-06 00:14:59 +00:00
Quentin Colombet 8deb5eb37d [RegisterBankInfo] Include RegisterBank.h.
We actually need the definition of a RegisterBank to be able to inline
the implementation of the subscript operator.

llvm-svn: 265492
2016-04-05 23:57:25 +00:00
Quentin Colombet 60f507bf3b [RegisterBankInfo] Add missing include for assert.
This should appease the linux bot.

llvm-svn: 265491
2016-04-05 23:43:58 +00:00
Davide Italiano ea04026c13 [DebugInfo] Fix tests so that each subprogram belongs to a CU.
llvm-svn: 265490
2016-04-05 23:37:08 +00:00
Quentin Colombet 5300950f3a [AArch64] Initial implementation of the targeting of the register bank information.
llvm-svn: 265489
2016-04-05 23:34:59 +00:00
Quentin Colombet 06bdd3c914 [RegisterBankInfo] Simplify the API for build a register bank.
As part of the TRI argument of addRegBankCoverage we already have access to
the TargetRegisterClass through the ID of that register class.
Therefore, there is no point in needing a TargetRegisterClass instance,
the ID is enough to get to it.

llvm-svn: 265487
2016-04-05 23:26:39 +00:00
Sanjoy Das 8d89a2b296 [RS4GC] NFC cleanup of the DeferredReplacement class
Instead of constructors use clearly named factory methods.

llvm-svn: 265486
2016-04-05 23:18:53 +00:00
Sanjoy Das 49e974b33b [RS4GC] Better codegen for deoptimize calls
Don't emit a gc.result for a statepoint lowered from
@llvm.experimental.deoptimize since the call into __llvm_deoptimize is
effectively noreturn.  Instead follow the corresponding gc.statepoint
with an "unreachable".

llvm-svn: 265485
2016-04-05 23:18:35 +00:00
Quentin Colombet 6ae3b78df6 [Target] Remove a deprecated comment.
llvm-svn: 265484
2016-04-05 23:04:54 +00:00
Quentin Colombet 62c1b916f4 [Target] Add an accessor to the register bank information.
llvm-svn: 265483
2016-04-05 22:50:40 +00:00
Manman Ren 802cd6f9d7 Swift Calling Convention: swiftcc for ARM.
Differential Revision: http://reviews.llvm.org/D18769

llvm-svn: 265482
2016-04-05 22:44:44 +00:00
Evgeniy Stepanov dde29e2799 Faster stack-protector for Android/AArch64.
Bionic has a defined thread-local location for the stack protector
cookie. Emit a direct load instead of going through __stack_chk_guard.

llvm-svn: 265481
2016-04-05 22:41:50 +00:00
Manman Ren f8bdd88cd9 Swift Calling Convention: add swiftcc.
Differential Revision: http://reviews.llvm.org/D17863

llvm-svn: 265480
2016-04-05 22:41:47 +00:00
Quentin Colombet 64bba01a63 [RegisterBank] Implement the verify method to check for the obvious mistakes.
llvm-svn: 265479
2016-04-05 22:34:01 +00:00
Quentin Colombet 0195826998 [RegisterBankInfo] Add debug print to check how the initialization is going.
llvm-svn: 265475
2016-04-05 21:47:56 +00:00
George Burgess IV 7e5404cc20 [CFLAA] Fix PR27213; incorrect tagging of args/globals
Prior to this patch, CFLAA wouldn't tag arguments/globals properly if
it didn't find any "interesting" edges on them. This means that, if all
you do is store constants to a global or argument, we would never
actually treat it as a global/argument.

Test case:

define void @foo(i32* %A, i32* %B) #0 {
entry:
  store i32 0, i32* %A, align 4
  store i32 0, i32* %B, align 4
  ret void
}

CFLAA would say that %A can't alias %B, because neither pointer was
used in an interesting way. This patch makes us note whether something
is an argument, global, ... regardless of how interesting CFLAA thinks
its uses are.

(For the record, using a value in an interesting way means loading
from it, using it in a GEP, ...)

llvm-svn: 265474
2016-04-05 21:40:45 +00:00
Quentin Colombet c94fbee9f6 [RegisterBank] Add printable capabilities for future debugging.
llvm-svn: 265473
2016-04-05 21:40:43 +00:00
Duncan P. N. Exon Smith 818e5f38d2 Try harder to appease MSVC after r265456
r265465 wasn't good enough.  I need to spell out all the moves.

llvm-svn: 265470
2016-04-05 21:25:33 +00:00
Quentin Colombet 85689d934a [RegisterBankInfo] Make addRegBankCoverage more capable to ease
targeting jobs.
Now, addRegBankCoverage also adds the subreg-classes not just the
sub-classes of the given register class.

llvm-svn: 265469
2016-04-05 21:20:12 +00:00
Junmo Park 53470fc451 Minor code cleanups. NFC.
llvm-svn: 265468
2016-04-05 21:14:31 +00:00
Duncan P. N. Exon Smith 1de3c7e790 IR: Introduce ConstantAggregate, NFC
Add a common parent class for ConstantArray, ConstantVector, and
ConstantStruct called ConstantAggregate.  These are the aggregate
subclasses of Constant that take operands.

This is mainly a cleanup, adding common `isa` target and removing
duplicated code.  However, it also simplifies caching which constants
point transitively at `GlobalValue` (a possible future direction).

llvm-svn: 265466
2016-04-05 21:10:45 +00:00
Duncan P. N. Exon Smith f880d35b80 Try to appease MSVC after r265456
I can't remember if adding `= default` will make MSVC happy, or if I
have to spell this out.  Let's try the cleaner version first.

llvm-svn: 265465
2016-04-05 21:07:01 +00:00
Quentin Colombet d347d695c2 [RegisterBankInfo] Implement the methods to create register banks.
llvm-svn: 265464
2016-04-05 21:06:15 +00:00
Duncan P. N. Exon Smith db63bda88d IR: Add missing assertion for ConstantVector::ConstantVector
Use the same assertion as ConstantArray.  Vectors should have the right
number of elements.

llvm-svn: 265463
2016-04-05 20:53:47 +00:00
Quentin Colombet c4db2ad5b8 [RegisterBank] Provide a way to check if a register bank is valid.
Change the default constructor to create invalid object.
The target will have to properly initialize the register banks before
using them.

llvm-svn: 265460
2016-04-05 20:48:32 +00:00
Duncan P. N. Exon Smith 91d3cfed78 Revert "Fix Clang-tidy modernize-deprecated-headers warnings in remaining files; other minor fixes."
This reverts commit r265454 since it broke the build.  E.g.:

  http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental_build/22413/

llvm-svn: 265459
2016-04-05 20:45:04 +00:00
Duncan P. N. Exon Smith 27e95f7c7b Make constructors for final subclasses of Constant private, NFC
These were `protected` before, but might as well be `private`.  Also
marked the classes themselves `final`.

llvm-svn: 265458
2016-04-05 20:31:23 +00:00
David Blaikie 62be5ae577 llvm-dwp: Handle GCC's use of multiple debug_types.dwo sections in a single .dwo file
(also includes the .test file missing from my previous commit, r265452)

llvm-svn: 265457
2016-04-05 20:26:50 +00:00
Duncan P. N. Exon Smith ea7df770ae ValueMapper: Rewrite Mapper::mapMetadata without recursion
This commit completely rewrites Mapper::mapMetadata (the implementation
of llvm::MapMetadata) using an iterative algorithm.  The guts of the new
algorithm are in MDNodeMapper::map, the entry function in a new class.

Previously, Mapper::mapMetadata performed a recursive exploration of the
graph with eager "just in case there's a reason" malloc traffic.

The new algorithm has these benefits:

  - New nodes and temporaries are not created eagerly.
  - Uniquing cycles are not duplicated (see new unit test).
  - No recursion.

Given a node to map, it does this:

 1. Use a worklist to perform a post-order traversal of the transitively
    referenced unmapped nodes.

 2. Track which nodes will change operands, and which will have new
    addresses in the mapped scheme.  Propagate the changes through the
    POT until fixed point, to pick up uniquing cycles that need to
    change.

 3. Map all the distinct nodes without touching their operands.  If
    RF_MoveDistinctMetadata, they get mapped to themselves; otherwise,
    they get mapped to clones.

 4. Map the uniqued nodes (bottom-up), lazily creating temporaries for
    forward references as needed.

 5. Remap the operands of the distinct nodes.

Mehdi helped me out by profiling this with -flto=thin.  On his workload
(importing/etc. for opt.cpp), MapMetadata sped up by 15%, contributed
about 50% less to persistent memory, and made about 100x fewer calls to
malloc.  The speedup is less than I'd hoped.  The profile mainly blames
DenseMap lookups; perhaps there's a way to reduce them (e.g., by
disallowing remapping of MDString).

It would be nice to break the strange remaining recursion on the Value
side: MapValue => materializeInitFor => RemapInstruction => MapValue.  I
think we could do this by having materializeInitFor return a worklist of
things to be remapped.

llvm-svn: 265456
2016-04-05 20:23:21 +00:00
Quentin Colombet 47de6c7ff4 [TargetRegisterClass] Improve the comment for how to use getSubClassMask.
llvm-svn: 265455
2016-04-05 20:21:53 +00:00
Eugene Zelenko 1760dc2a23 Fix Clang-tidy modernize-deprecated-headers warnings in remaining files; other minor fixes.
Some Include What You Use suggestions were used too.

Use anonymous namespaces in source files.

Differential revision: http://reviews.llvm.org/D18778

llvm-svn: 265454
2016-04-05 20:19:49 +00:00
David Blaikie 60fbd3bdb7 llvm-dwp: Handle dwo files produced by GCC
To start with, handle DW_FORM_string names. Follow up commit will handle
the interesting quirk with type units I was originally aiming for here.

llvm-svn: 265452
2016-04-05 20:16:38 +00:00
Lang Hames ee5417da8f [llvm-rtdyld] Fix the return type on ErrorAndExit.
As suggested by Rafael - this function no longer returns a value as of r264425.

llvm-svn: 265451
2016-04-05 20:11:24 +00:00
Ahmed Bougacha 50e6cd4a3a [X86] Reuse EFLAGS and form LOCKed ops when only user is SETCC.
We only generate LOCKed versions of add/sub when the result is unused.
It often happens that the result is used, but only by a comparison. We
can optimize those out by reusing EFLAGS, which lets us use the proper
instructions, instead of having to fallback to LXADD.

Instead of doing this as an MI peephole (as we do for the other
non-LOCKed (really, non-MR) forms), do it in ISel. It becomes quite
tricky later.

This also makes it eventually possible to stop expanding and/or/xor
if the only user is an icmp (also see D18141).

This uses the LOCK ISD opcodes added by r262244.

Differential Revision: http://reviews.llvm.org/D17633

llvm-svn: 265450
2016-04-05 20:02:57 +00:00
Quentin Colombet b235d32e74 [GlobalISel] Add the RegisterBankInfo class for the handling of register banks.
llvm-svn: 265449
2016-04-05 20:02:47 +00:00
Ahmed Bougacha b76e7253e9 [X86] Add tests for ATOMIC_LOAD_OP EFLAGS reuse. NFC.
llvm-svn: 265448
2016-04-05 20:02:44 +00:00
Ahmed Bougacha 629446ba03 [X86] Simplify early-exit check. NFC.
llvm-svn: 265447
2016-04-05 20:02:22 +00:00
Lang Hames 580ca237db [Support] Add a checked flag to Expected<T>, require checks before access or
destruction.

This makes the Expected<T> class behave like Error, even when in success mode.
Expected<T> values must be checked to see whether they contain an error prior
to being dereferenced, assigned to, or destructed.

llvm-svn: 265446
2016-04-05 19:57:03 +00:00
Quentin Colombet bdc3b4d523 [GlobalISel] Add a class, RegisterBank, to represent register banks.
llvm-svn: 265445
2016-04-05 19:54:44 +00:00
Sanjay Patel 16be4df94c fixed to discard earlier advertising
Also, hardcode (there must be a better way...) the 'utils' dir in the 
advertisement, so it's easier to find.

llvm-svn: 265444
2016-04-05 19:50:21 +00:00
Sanjay Patel 4c7d094451 fix typo; NFC
llvm-svn: 265442
2016-04-05 19:27:39 +00:00
Quentin Colombet 811da0efbc [AArch64][Test] Do not override the suffixes for test cases.
llvm-svn: 265441
2016-04-05 19:26:42 +00:00
Quentin Colombet 8e8e85c19f [GlobalISel] Add the skeleton of the RegBankSelect pass.
This pass is reponsible for assigning the generic virtual registers to register
banks.

llvm-svn: 265440
2016-04-05 19:06:01 +00:00
Lang Hames bbdccbe963 [Support] clang-format Error.h.
This tidies up the ExitOnError class and some other recently added code. NFC.

llvm-svn: 265438
2016-04-05 18:50:09 +00:00
Sanjay Patel f3bb6c51bc fix documentation comments; NFC
llvm-svn: 265434
2016-04-05 18:23:30 +00:00
Manman Ren e221a870d3 Swift Calling Convention: swifterror target-independent change.
At IR level, the swifterror argument is an input argument with type
ErrorObject**. For targets that support swifterror, we want to optimize it
to behave as an inout value with type ErrorObject*; it will be passed in a
fixed physical register.

The main idea is to track the virtual registers for each swifterror value. We
define swifterror values as AllocaInsts with swifterror attribute or a function
argument with swifterror attribute.

In SelectionDAGISel.cpp, we set up swifterror values (SwiftErrorVals) before
handling the basic blocks.

When iterating over all basic blocks in RPO, before actually visiting the basic
block, we call mergeIncomingSwiftErrors to merge incoming swifterror values when
there are multiple predecessors or to simply propagate them. There, we create a
virtual register for each swifterror value in the entry block. For predecessors
that are not yet visited, we create virtual registers to hold the swifterror
values at the end of the predecessor. The assignments are saved in
SwiftErrorWorklist and will be materialized at the end of visiting the basic
block.

When visiting a load from a swifterror value, we copy from the current virtual
register assignment. When visiting a store to a swifterror value, we create a
virtual register to hold the swifterror value and update SwiftErrorMap to
track the current virtual register assignment.

Differential Revision: http://reviews.llvm.org/D18108

llvm-svn: 265433
2016-04-05 18:13:16 +00:00
Sanjay Patel fd16e62d56 add tests to show missing optimization from D18230
llvm-svn: 265431
2016-04-05 18:09:36 +00:00
Sanjay Patel 4064158ccc add example usage and workflow to --help output
llvm-svn: 265430
2016-04-05 18:00:47 +00:00
David Blaikie 9b49256fa8 llvm-dwp: Simplify hashing code a bit
llvm-svn: 265426
2016-04-05 17:51:40 +00:00
Sanjay Patel 6ecf1b6760 [InstCombine] regenerate checks
utils/update_test_checks.py was improved with:
http://reviews.llvm.org/rL265414
to CHECK-NEXT the first line of the IR function. This ensures that nothing bad
has happened before that.

llvm-svn: 265417
2016-04-05 17:24:54 +00:00
Sanjay Patel 0484879fe7 [x86] regenerate checks
utils/update_test_checks.py was improved with:
http://reviews.llvm.org/rL265414
to include the first line of the function (expected to be
a comment line). This ensures that nothing bad has happened
before the first actual line of checked asm. It also matches
the existing behavior of the old script.

llvm-svn: 265416
2016-04-05 17:12:19 +00:00
JF Bastien c6ba5ead5e WebAssembly: fix cfg-stackify test
It was broken by reshuffling induced by r265397 'Don't delete empty preheaders in CodeGenPrepare if it would create a critical edge'.

llvm-svn: 265415
2016-04-05 17:01:52 +00:00
Sanjay Patel 96241e78ed check or check-next the first line of the function too
We could make this an option if people don't like it. 
But since part of the reason for using a script to generate
checks is to prevent lazy checking that lets bugs crawl 
through, let's have the script check the first line too. 

For asm tests, it ensures that nothing unexpected has 
happened before the first line of asm. This matches the
existing behavior of update_llc_test_checks.py. 

More discussion in PR22897:
https://llvm.org/bugs/show_bug.cgi?id=22897

llvm-svn: 265414
2016-04-05 16:49:07 +00:00
Valery Pykhtin 020c29e2b7 [TableGen] AsmMatcherEmitter.cpp: replace a sequence of "if" to "switch" in emitValidateOperandClass.
Differential Revision: http://reviews.llvm.org/D18394

llvm-svn: 265412
2016-04-05 16:18:16 +00:00
Jacques Pienaar 42991b3e5a [lanai] LanaiSetflagAluCombiner more conservative
Summary: LanaiSetflagAluCombiner could previously combine instructions across basic building blocks even when not legal. Make the LanaiSetflagAluCombiner more conservative to avoid this.

Reviewers: eliben

Subscribers: joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D18746

llvm-svn: 265411
2016-04-05 16:18:13 +00:00
Sam Parker 0d3a3a537c [ARM] Cleanup of smul and smla instruction descriptions
Removed the SDNode argument passed to the AI_smul and AI_smla multiclass
definitions as they are always mul.

Differential Revision: http://reviews.llvm.org/D18791

llvm-svn: 265409
2016-04-05 16:01:25 +00:00
Konstantin Zhuravlyov e63e02cb0c [AMDGPU] Emit linkonce and linkonce_odr symbols
Differential Revision: http://reviews.llvm.org/D18726

llvm-svn: 265408
2016-04-05 16:00:58 +00:00
Haicheng Wu 3618fa786f [BlockPlacement] Remove an unnecessary continue
NFC.

llvm-svn: 265407
2016-04-05 15:37:08 +00:00
Rafael Espindola aafcf758c9 Use ArrayRef for contiguous areas in ELF. NFC.
This just simplifies the code a bit. More so in lld.

llvm-svn: 265403
2016-04-05 14:47:22 +00:00
Chuang-Yu Cheng f0eba83571 Add missing test for the "Don't delete empty preheaders" added in r265397
Author: Tom Jablin (tjablin)
llvm-svn: 265402
2016-04-05 14:21:32 +00:00
Rafael Espindola 1d3c43b293 Centralize the definition of a few types. NFC.
llvm-svn: 265399
2016-04-05 14:10:18 +00:00
Chuang-Yu Cheng d3fb38cae5 Don't delete empty preheaders in CodeGenPrepare if it would create a critical edge
Presently, CodeGenPrepare deletes all nearly empty (only phi and branch)
basic blocks. This pass can delete loop preheaders which frequently creates
critical edges. A preheader can be a convenient place to spill registers to
the stack. If the entrance to a loop body is a critical edge, then spills
may occur in the loop body rather than immediately before it. This patch
protects loop preheaders from deletion in CodeGenPrepare even if they are
nearly empty.

Since the patch alters the CFG, it affects a large number of test cases.
In most cases, the changes are merely cosmetic (basic blocks have different
names or instruction orders change slightly). I am somewhat concerned about
the test/CodeGen/Mips/brdelayslot.ll test case. If the loop preheader is not
deleted, then the MIPS backend does not take advantage of a branch delay
slot. Consequently, I would like some close review by a MIPS expert.

The patch also partially subsumes D16893 from George Burgess IV. George
correctly notes that CodeGenPrepare does not actually preserve the dominator
tree. I think the dominator tree was usually not valid when CodeGenPrepare
ran, but I am using LoopInfo to mark preheaders, so the dominator tree is
now always valid before CodeGenPrepare.

Author: Tom Jablin (tjablin)
Reviewers: hfinkel george.burgess.iv vkalintiris dsanders kbarton cycheng

http://reviews.llvm.org/D16984

llvm-svn: 265397
2016-04-05 14:06:20 +00:00
Peter Zotov 0a2fa0a13b [llvm-c] Expose LLVM{Get,Set}ModuleIdentifier
Patch by Nicole Mazzuca <npmazzuca@gmail.com>.

Differential Revision: http://reviews.llvm.org/D18736

llvm-svn: 265394
2016-04-05 13:56:59 +00:00
Simon Dardis d9d41f531e [mips] MIPSR6 Compact jump support
This patch adds support for compact jumps similiar to the previous compact
branch support for MIPSR6. Unlike compact branches, compact jumps do not
have a forbidden slot.

As MipsInstrInfo::getEquivalentCompactForm can determine the correct
expansion for jumps and branches for both microMIPS and MIPSR6, remove the
unnecessary distinction in the delay slot filler.

Reviewers: vkalintiris

Subscribers: llvm-commits, dsanders
llvm-svn: 265390
2016-04-05 12:50:29 +00:00
Justin Holewinski c79979299a [NVPTX] Handle ldg created from sign-/zero-extended load
Reviewers: jingyue

Subscribers: jholewinski

Differential Revision: http://reviews.llvm.org/D18053

llvm-svn: 265389
2016-04-05 12:38:01 +00:00
David L Kreitzer 188de5ae69 Adds the ability to use an epilog remainder loop during loop unrolling and makes
this the default behavior.

Patch by Evgeny Stupachenko (evstupac@gmail.com).

Differential Revision: http://reviews.llvm.org/D18158

llvm-svn: 265388
2016-04-05 12:19:35 +00:00
Tamas Berghammer 849045f2aa Set the thumb flag for thumb symbols coming from an ELF file
Without setting the flag there is no way to determine if a symbol
points to an arm or to a thumb function as the LSB of the address
masked out in all getter function.

Note: Currently the thumb flag is only used for MachO files so
adding a test to this change is not possible. It will be used
by the upcoming fix for llvm-objdump for disassembling thumb
functions what is easily testable.

Differential revision: http://reviews.llvm.org/D17956

llvm-svn: 265387
2016-04-05 12:11:40 +00:00
Haojian Wu 591ae46820 Add parentheses around `&&` within `||` to avoid compiler warning message.
Summary: The assert code is introduced by r265370.

Reviewers: bkramer

Subscribers: tejohnson

Differential Revision: http://reviews.llvm.org/D18786

llvm-svn: 265383
2016-04-05 09:07:47 +00:00
Dmitry Polukhin a3d5b0b218 [IFUNC] Use GlobalIndirectSymbol when aliases and ifuncs have something similar
Second part extracted from http://reviews.llvm.org/D15525

Use GlobalIndirectSymbol in all cases when aliases and ifuncs have
something in common.

Differential Revision: http://reviews.llvm.org/D18754

llvm-svn: 265382
2016-04-05 08:47:51 +00:00
Etienne Bergeron 1562f69feb [Support] Fix an invalid character escaping in string literal (unittest).
Summary:
A character within a string literal is not escaped correctly.
In this case, there is no semantic change because the invalid character turn out to be NUL anyway.

note: "\0x12" is equivalent to {0, 'x', '1', '2'} and not { 12 }.

This issue was found by clang-tidy.

Reviewers: rnk

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D18747

llvm-svn: 265376
2016-04-05 01:46:26 +00:00
Teresa Johnson fb7c764496 [ThinLTO] Refactor some common code into getGlobalValueInfo method (NFC)
Refactor common code that queries the ModuleSummaryIndex for a value's
GlobalValueInfo struct into getGlobalValueInfo helper methods, which
will also be used by D18763.

llvm-svn: 265370
2016-04-05 00:40:16 +00:00
JF Bastien 86d8d87640 Docs: dampen story time for atomics
Story time was nice a few years ago, but by now it's nice to state how things are, rather than explain the diff from ye olden atomic history. These were dark times.

llvm-svn: 265369
2016-04-05 00:31:25 +00:00
JF Bastien 1c3c223b65 Lanai: fix -Wsign-compare warning
llvm-svn: 265368
2016-04-05 00:20:27 +00:00
Teresa Johnson f4cf1c3eb4 Don't fold double constant to an integer if dest type not integral
Summary:
I encountered this issue when constant folding during inlining tried to
fold away a bitcast of a double to an x86_mmx, which is not an integral
type. The test case exposes the same issue with a smaller code snippet
during early CSE.

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18528

llvm-svn: 265367
2016-04-04 23:50:46 +00:00
JF Bastien 393b79ee00 Lanai: fix -Wpedantic warnings
Extra semicolon.

llvm-svn: 265365
2016-04-04 23:47:30 +00:00
Reid Kleckner 7de6761561 Fix non-determinism in order of LLVM attributes
We were using array_pod_sort on an array of type 'Attribute', which
wraps a pointer to AttributeImpl. For the most part this didn't matter
because the printing code prints enum attributes in a defined order, but
integer attributes such as 'align' and 'dereferenceable' were not
ordered.

Furthermore, AttributeImpl::operator< was broken for integer attributes.
An integer attribute is a kind and an integer value, and both pieces
need to be compared.

By fixing the comparison operator, we can go back to std::sort, and
things look good now.  This should fix clang arm-swiftcall.c test
failures on Windows.

llvm-svn: 265361
2016-04-04 23:06:05 +00:00
Sanjay Patel e77c7de459 use range loop; NFCI
llvm-svn: 265360
2016-04-04 23:05:06 +00:00
Sanjay Patel 769b5fd546 fix typos; NFC
llvm-svn: 265356
2016-04-04 22:45:56 +00:00
Amaury Sechet 56f056c01f Style update in Core.h/Core.cpp . NFC
llvm-svn: 265353
2016-04-04 22:00:25 +00:00
Justin Bogner 35c6903f22 Revert "CodeGen: Remove dead code in TailDuplicate"
It seems this is reachable after all. It hit on 7zip-benchmark in lnt
on ppc64:

  http://lab.llvm.org:8011/builders/clang-ppc64be-linux-lnt/builds/2317

This reverts r265347.

llvm-svn: 265352
2016-04-04 21:41:54 +00:00
Matthias Braun 7511abd5c1 MachineScheduler: Ignore COPYs with undef/dead op in CopyConstrain mutation.
There is no problem with the code today, but the fix will avoid a crash
in test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll once the
DetectDeadLanes pass is added.

llvm-svn: 265351
2016-04-04 21:23:46 +00:00
Matthias Braun 571e3481e7 test: Always treat .mir files as tests even outside of CodeGen/MIR
We missed a handful of .mir tests that existed outside the
test/CodeGen/MIR directory.

Also fix the three powerpc .mir tests that nobody noticed were broken.

llvm-svn: 265350
2016-04-04 21:23:44 +00:00
Teresa Johnson 3c35e0999b Clean up calls to WriteBitcodeToFile (NFC)
Remove a default parameter value being passed unnecessarily, which
also reduces the changes required when this parameter is changed in
D18763.

Document the remaining non-default bool value passed for another
parameter.

llvm-svn: 265348
2016-04-04 21:19:31 +00:00
Justin Bogner 9ab8131a57 CodeGen: Remove dead code in TailDuplicate
I noticed that this isn't covered by our existing tests and spent some
time trying to come up with an example it actually hits. I tried hand
rolling something based on the explanation in the comment, but couldn't
get anything that didn't abort tail duplication earlier for one reason
or another.

Then, I tried cranking tail-dup-size cranked up so this would fire
more and ran a bootstrap of clang and the nightly test suite - those
don't hit this either.

This reverts r132816 and replaces it with an assert.

llvm-svn: 265347
2016-04-04 21:11:40 +00:00
Teresa Johnson 7ddec63d8f clang-format llvm-as.cpp (NFC)
This reduces unrelated changes in other patches (such as D18763) when
changes to this file are clang formatted.

llvm-svn: 265346
2016-04-04 21:06:17 +00:00
Hans Wennborg a47a692341 Re-commit r265039 "[X86] Merge adjacent stack adjustments in eliminateCallFramePseudoInstr (PR27140)"
The original commit miscompiled things on 32-bit Windows, e.g. a Clang
boostrap. It turns out that mergeSPUpdates() was a bit too generous in
what it interpreted as a stack adjustment, causing the following code:

        addl    $12, %esp
        leal    -4(%ebp), %esp

To be "optimized" into simply:

        addl    $8, %esp

This commit tightens up mergeSPUpdates() and includes a new test
(test14 in movtopush.ll) for this situation.

llvm-svn: 265345
2016-04-04 21:02:46 +00:00
Zia Ansari a82a58a4e5 Enable unroll for constant bound loops when TripCount is not modulo of unroll factor, reducing it to maximum power-of-2 that satisfies threshold limit.
Commit for Evgeny Stupachenko (evstupac@gmail.com)

Differential Revision: http://reviews.llvm.org/D18290

llvm-svn: 265337
2016-04-04 19:24:46 +00:00
Teresa Johnson 03e93bab7f Fix bot errors from r265327, exact GUID which depends on path
E.g. http://bb.pgr.jp/builders/ninja-x64-msvc-RA-centos6/builds/21919

The source file path name will affect exact GUID, don't try to match
exact value.

llvm-svn: 265334
2016-04-04 19:11:00 +00:00
Sean Silva f4517a15b8 Beef up some dllexport tests.
Adds some dllexport tests to verify that:
  - Variables in bss are exported appropriately
  - Non-dllexport symbols aliased to dllexport symbols are not exported
  - Symbols declared as dllexport but are not defined are not exported

We plan to enable dllimport/dllexport support for the PS4, and these
additional tests are for points we noticed in our internal testing.

Patch by Warren Ristow!

Differential Revision: http://reviews.llvm.org/D18682

llvm-svn: 265333
2016-04-04 19:10:55 +00:00
Chandler Carruth 613eec8210 Revert r263460: [SpillPlacement] Fix a quadratic behavior in spill placement.
That commit looks wonderful and awesome. Sadly, it greatly exacerbates
PR17409 and effectively regresses build time for a lot of (very large)
code when compiled with ASan or MSan.

We thought this could be fixed forward by landing D15302 which at last
fixes that PR, but some issues were discovered and it looks like that
got reverted, so reverting this as well temporarily. As soon as the fix
for PR17409 lands and sticks, we should re-land this patch as it won't
trigger more significant test cases hitting that bug.

Many thanks to Quentin and Wei here as they're doing all the awesome
hard work!!!

llvm-svn: 265331
2016-04-04 18:57:50 +00:00
Betul Buyukkurt 18131c4216 [PGO] Avoid instrumenting direct callee's at value sites.
Direct callees' that are cast to other function prototypes,
show up in the Call/Invoke instructions as ConstantExpr's.
Currently llvm::CallSite's getCalledFunction() fails
to return the callees in such expressions as direct calls.
Value profiling should avoid instrumenting such cases. Mostly NFC.

llvm-svn: 265330
2016-04-04 18:56:36 +00:00
Matthias Braun 870c34f0cf ARM, AArch64, X86: Check preserved registers for tail calls.
We can only perform a tail call to a callee that preserves all the
registers that the caller needs to preserve.

This situation happens with calling conventions like preserver_mostcc or
cxx_fast_tls. It was explicitely handled for fast_tls and failing for
preserve_most. This patch generalizes the check to any calling
convention.

Related to rdar://24207743

Differential Revision: http://reviews.llvm.org/D18680

llvm-svn: 265329
2016-04-04 18:56:13 +00:00
Teresa Johnson 916495d894 [ThinLTO] Add option to dump value name to GUID mapping
Summary:
Useful for debugging since we lose this correlation after the permodule
summary/VST is read and until we later materialize source modules in the
function importer.

Reviewers: joker.eph

Subscribers: llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D18555

llvm-svn: 265327
2016-04-04 18:52:58 +00:00
Teresa Johnson 0beb858e97 [ThinLTO] Augment FunctionImport dump with value name to GUID map
Summary:
To aid in debugging, dump out the correlation between value names and
GUID for each source module when it is materialized. This will make it
easier to comprehend the earlier summary-based function importing debug
trace which only has access to and prints the GUIDs.

Reviewers: joker.eph

Subscribers: llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D18556

llvm-svn: 265326
2016-04-04 18:52:23 +00:00
Sanjay Patel 87a50c4f26 fix documentation comments; NFC
llvm-svn: 265321
2016-04-04 18:25:06 +00:00