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62 Commits

Author SHA1 Message Date
Akira Hatanaka 334dad6aea MIPS DSP: ADDUH.QB instruction sub-class. 
llvm-svn: 164840
 2012-09-28 20:16:04 +00:00
Akira Hatanaka a9183eda74 MIPS DSP: ABSQ_S.PH instruction sub-class. 
llvm-svn: 164787
 2012-09-27 19:09:21 +00:00
Akira Hatanaka 892b1046c6 MIPS DSP: SHLL.QB instruction sub-class. 
llvm-svn: 164786
 2012-09-27 19:05:08 +00:00
Akira Hatanaka 314b43b781 MIPS DSP: rddsp (instruction which reads DSPControl register fields to a GPR). 
llvm-svn: 164756
 2012-09-27 04:08:42 +00:00
Akira Hatanaka b664ae67ce MIPS DSP: CMPU.EQ.QB instruction sub-class. 
llvm-svn: 164755
 2012-09-27 03:58:34 +00:00
Akira Hatanaka d09642beb3 MIPS DSP: ADDU.QB instruction sub-class. 
llvm-svn: 164754
 2012-09-27 03:13:59 +00:00
Akira Hatanaka e4bd054f98 MIPS DSP: Branch on Greater Than or Equal To Value 32 in DSPControl Pos Field instruction. 
llvm-svn: 164751
 2012-09-27 02:15:57 +00:00
Akira Hatanaka 9061a46443 MIPS DSP: all the remaining instructions which read or write accumulators. 
llvm-svn: 164750
 2012-09-27 02:11:20 +00:00
Akira Hatanaka 1babeaa44c MIPS DSP: add support for extract-word instructions. 
llvm-svn: 164749
 2012-09-27 02:05:42 +00:00
Akira Hatanaka de8231eada MIPS DSP: add bitcast patterns between vectors and int. 
No test cases. These patterns will get tested along with dsp intrinsics.

llvm-svn: 164746
 2012-09-27 01:56:38 +00:00
Akira Hatanaka 5eeac4f813 MIPS DSP: add vector load/store patterns. 
llvm-svn: 164744
 2012-09-27 01:50:59 +00:00
Akira Hatanaka ecfb828341 MIPS DSP: Add immediate leaves. 
llvm-svn: 164435
 2012-09-22 00:07:12 +00:00