Commit Graph

187 Commits

Author SHA1 Message Date
Joerg Sonnenberger b696d46045 Fix tabs.
llvm-svn: 215311
2014-08-10 11:37:07 +00:00
Joerg Sonnenberger 752b91bd82 If available, pass down the Fixup object to EvaluateAsRelocatable.
At least on PowerPC, the interpretation of certain modifiers depends on
the context they appear in.

llvm-svn: 215310
2014-08-10 11:35:12 +00:00
Zoran Jovanovic b355e8f604 [mips][mips64r6] Add Relocations R_MIPS_PCHI16, R_MIPS_PCLO16
Differential Revision: http://reviews.llvm.org/D3860

llvm-svn: 209659
2014-05-27 14:58:51 +00:00
Rafael Espindola 3d082fa507 Fix pr19645.
The fix itself is fairly simple: move getAccessVariant to MCValue so that we
replace the old weak expression evaluation with the far more general
EvaluateAsRelocatable.

This then requires that EvaluateAsRelocatable stop when it finds a non
trivial reference kind. And that in turn requires the ELF writer to look
harder for weak references.

Last but not least, this found a case where we were being bug by bug
compatible with gas and accepting an invalid input. I reported pr19647
to track it.

llvm-svn: 207920
2014-05-03 19:57:04 +00:00
Joerg Sonnenberger dd18d5b0f6 Parse and create GOT_PREL relocations.
llvm-svn: 207526
2014-04-29 13:42:02 +00:00
Rafael Espindola bc91d7e25a Add an option for evaluating past symbols.
When evaluating an assembly expression for a relocation, we want to
stop at MCSymbols that are in the symbol table, even if they are variables.
This is needed since the semantics may require that the relocation use them.

That is not the case when computing the value of a symbol in the symbol table.
There are no relocations in this case and we have to keep going until we hit
a section or find out that the expression doesn't have an assembly time
value.

llvm-svn: 207445
2014-04-28 20:53:11 +00:00
David Blaikie 908f4d4bf5 Spread some const around for non-mutating uses of MCSymbolData.
I discovered this const-hole while attempting to coalesnce the Symbol
and SymbolMap data structures. There's some pending issues with that,
but I figured this change was easy to flush early.

llvm-svn: 207124
2014-04-24 16:59:40 +00:00
Chandler Carruth f58e376d23 [Modules] Fix potential ODR violations by sinking the DEBUG_TYPE
definition below all the header #include lines. This updates most of the
miscellaneous other lib/... directories. A few left though.

llvm-svn: 206845
2014-04-22 03:04:17 +00:00
Craig Topper bb694de649 [C++11] More 'nullptr' conversion or in some cases just using a boolean check instead of comparing to nullptr.
llvm-svn: 206129
2014-04-13 04:57:38 +00:00
Tim Northover 00ed9964c6 ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

llvm-svn: 205090
2014-03-29 10:18:08 +00:00
Rafael Espindola 7fadc0ea7d Look through variables when computing relocations.
Given

bar = foo + 4
	.long bar

MC would eat the 4. GNU as includes it in the relocation. The rule seems to be
that a variable that defines a symbol is used in the relocation and one that
does not define a symbol is evaluated and the result included in the relocation.

Fixing this unfortunately required some other changes:

* Since the variable is now evaluated, it would prevent the ELF writer from
  noticing the weakref marker the elf streamer uses. This patch then replaces
  that with a VariantKind in MCSymbolRefExpr.

* Using VariantKind then requires us to look past other VariantKind to see

	.weakref	bar,foo
	call	bar@PLT

  doing this also fixes

	zed = foo +2
	call zed@PLT

  so that is a good thing.

* Looking past VariantKind means that the relocation selection has to use
  the fixup instead of the target.

This is a reboot of the previous fixes for MC. I will watch the sanitizer
buildbot and wait for a build before adding back the previous fixes.

llvm-svn: 204294
2014-03-20 02:12:01 +00:00
Rafael Espindola 3d5d464df8 Try harder to evaluate expressions when printing assembly.
When printing assembly we don't have a Layout object, but we can still
try to fold some constants.

Testcase by Ulrich Weigand.

llvm-svn: 203677
2014-03-12 16:55:59 +00:00
Saleem Abdulrasool 56e06e8640 ARM: suuport .tlsdescseq directive
This enhances the ARMAsmParser to handle .tlsdescseq directives.  This is a
slightly special relocation.  We must be able to generate them, but not consume
them in assembly.  The relocation is meant to assist the linker in generating a
TLS descriptor sequence.  The ELF target streamer is enhanced to append
additional fixups into the current segment and that is used to emit the new
R_ARM_TLS_DESCSEQ relocations.

llvm-svn: 200448
2014-01-30 04:02:47 +00:00
Saleem Abdulrasool a3f12bdeec ARM: support TLS descriptor relocations
Add support for tlsdesc relocations which are part of the ABI, marked as
experimental.  These relocations permit the linker to perform TLS reference
optimizations.

llvm-svn: 200447
2014-01-30 04:02:38 +00:00
Saleem Abdulrasool 6e00ca887e ARM: support tlscall relocations
This adds support for TLS CALL relocations.  TLS CALL relocations are used to
indicate to the linker to generate appropriate entries to resolve TLS references
via an appropriate function invocation (e.g. __tls_get_addr(PLT)).

In order to accomodate the linker relaxation of the TLS access model for the
references (GD/LD -> IE, IE -> LE), the relocation addend must be incomplete.
This requires that the partial inplace value is also incomplete (i.e. 0).  We
simply avoid the offset value calculation at the time of the fixup adjustment in
the ARM assembler backend.

llvm-svn: 200446
2014-01-30 04:02:31 +00:00
Kai Nacke e51c813859 ARM: add tlsldo relocation
Add support for the symbol(tlsldo) relocation. This is required in order to 
solve PR18554.

Reviewed by R. Golin, A. Korobeynikov.

llvm-svn: 199644
2014-01-20 11:00:40 +00:00
David Peixotto 8ad70b3542 Add support for parsing ARM symbol variants on ELF targets
ARM symbol variants are written with parens instead of @ like this:

  .word __GLOBAL_I_a(target1)

This commit adds support for parsing these symbol variants in
expressions. We introduce a new flag to MCAsmInfo that indicates the
parser should use parens to parse the symbol variant. The expression
parser is modified to look for symbol variants using parens instead
of @ when the corresponding MCAsmInfo flag is true.

The MCAsmInfo parens flag is enabled only for ARM on ELF.

By adding this flag to MCAsmInfo, we are able to get rid of
redundant ARM-specific symbol variants and use the generic variants
instead (e.g. VK_GOT instead of VK_ARM_GOT). We use the new
UseParensForSymbolVariant attribute in MCAsmInfo to correctly print
the symbol variants for arm.

To achive this we need to keep a handle to the MCAsmInfo in the
MCSymbolRefExpr class that we can check when printing the symbol
variant.

Updated Tests:
  Changed case of symbol variant to match the generic kind.
  test/CodeGen/ARM/tls-models.ll
  test/CodeGen/ARM/tls1.ll
  test/CodeGen/ARM/tls2.ll
  test/CodeGen/Thumb2/tls1.ll
  test/CodeGen/Thumb2/tls2.ll

PR18080

llvm-svn: 196424
2013-12-04 22:43:20 +00:00
Ulrich Weigand 52cf8e4488 [PowerPC] Revert r185476 and fix up TLS variant kinds
In the commit message to r185476 I wrote:

>The PowerPC-specific modifiers VK_PPC_TLSGD and VK_PPC_TLSLD
>correspond exactly to the generic modifiers VK_TLSGD and VK_TLSLD.
>This causes some confusion with the asm parser, since VK_PPC_TLSGD
>is output as @tlsgd, which is then read back in as VK_TLSGD.
>
>To avoid this confusion, this patch removes the PowerPC-specific
>modifiers and uses the generic modifiers throughout.  (The only
>drawback is that the generic modifiers are printed in upper case
>while the usual convention on PowerPC is to use lower-case modifiers.
>But this is just a cosmetic issue.)

This was unfortunately incorrect, there is is fact another,
serious drawback to using the default VK_TLSLD/VK_TLSGD
variant kinds: using these causes ELFObjectWriter::RelocNeedsGOT
to return true, which in turn causes the ELFObjectWriter to emit
an undefined reference to _GLOBAL_OFFSET_TABLE_.

This is a problem on powerpc64, because it uses the TOC instead
of the GOT, and the linker does not provide _GLOBAL_OFFSET_TABLE_,
so the symbol remains undefined.  This means shared libraries
using TLS built with the integrated assembler are currently
broken.

While the whole RelocNeedsGOT / _GLOBAL_OFFSET_TABLE_ situation
probably ought to be properly fixed at some point, for now I'm
simply reverting the r185476 commit.  Now this in turn exposes
the breakage of handling @tlsgd/@tlsld in the asm parser that
this check-in was originally intended to fix.

To avoid this regression, I'm also adding a different fix for
this problem: while common code now parses @tlsgd as VK_TLSGD,
a special hack in the asm parser translates this code to the
platform-specific VK_PPC_TLSGD that the back-end now expects.
While this is not really pretty, it's self-contained and
shouldn't hurt anything else for now.  One the underlying
problem is fixed, this hack can be reverted again.

llvm-svn: 185945
2013-07-09 16:41:09 +00:00
Ulrich Weigand 4050995650 [PowerPC] Remove VK_PPC_TLSGD and VK_PPC_TLSLD
The PowerPC-specific modifiers VK_PPC_TLSGD and VK_PPC_TLSLD
correspond exactly to the generic modifiers VK_TLSGD and VK_TLSLD.
This causes some confusion with the asm parser, since VK_PPC_TLSGD
is output as @tlsgd, which is then read back in as VK_TLSGD.

To avoid this confusion, this patch removes the PowerPC-specific
modifiers and uses the generic modifiers throughout.  (The only
drawback is that the generic modifiers are printed in upper case
while the usual convention on PowerPC is to use lower-case modifiers.
But this is just a cosmetic issue.)

llvm-svn: 185476
2013-07-02 21:29:06 +00:00
Ulrich Weigand f11efe7f48 [PowerPC] Add support for TLS data relocations
This adds support for TLS data relocations and modifiers:
       .quad target@dtpmod
       .quad target@tprel
       .quad target@dtprel
Currently exploited by the asm parser only.

llvm-svn: 185394
2013-07-01 23:33:29 +00:00
Ulrich Weigand 93372b4583 [PowerPC] Support @got modifier
Add VK_... values and relocation types necessary to support
the @got family of modifiers.  Used by the asm parser only.

llvm-svn: 184860
2013-06-25 16:49:50 +00:00
Ulrich Weigand 876a0d0133 [PowerPC] Support various tls-related modifiers
The current code base only supports the minimum set of tls-related
relocations and @modifiers that are necessary to support compiler-
generated code.  This patch extends this to the full set defined
in the ABI (and supported by the GNU assembler) for the benefit
of the assembler parser.

llvm-svn: 184551
2013-06-21 14:44:15 +00:00
Ulrich Weigand e9126f5534 [PowerPC] Support @higher et.al. modifiers
This adds support for the @higher, @highera, @highest, and @highesta
modifers, including some missing relocation types.

llvm-svn: 184550
2013-06-21 14:43:42 +00:00
Ulrich Weigand 72ddbd656e [PowerPC] Support @toc@h modifier
This adds the relocation type and other necessary infrastructure
to use the @toc@h modifier in the assembler.

llvm-svn: 184549
2013-06-21 14:43:10 +00:00
Ulrich Weigand e67c565dc1 [PowerPC] Support @h modifier
This adds necessary infrastructure to support the @h modifier.
Note that all required relocation types were already present
(and unused).

This patch provides support for using @h in the assembler;
it would also be possible to now use this feature in code
generated by the compiler, but this is not done yet.

llvm-svn: 184548
2013-06-21 14:42:49 +00:00
Ulrich Weigand d51c09f5d9 [PowerPC] Rename some more VK_PPC_ enums
This renames more VK_PPC_ enums, to make them more closely reflect
the @modifier string they represent.  This also prepares for adding
a bunch of new VK_PPC_ enums in upcoming patches.

For consistency, some MO_ flags related to VK_PPC_ enums are
likewise renamed.

No change in behaviour.

llvm-svn: 184547
2013-06-21 14:42:20 +00:00
Ulrich Weigand 68e2e1b32b [PowerPC] Clean up VK_PPC_TOC... names
This is another minor cleanup; to bring enum names in line
with the corresponding @modifier names, this renames:

  VK_PPC_TOC -> VK_PPC_TOCBASE
  VK_PPC_TOC_ENTRY -> VK_PPC_TOC16

No code change intended.

llvm-svn: 184491
2013-06-20 22:39:42 +00:00
Ulrich Weigand 41789de165 [PowerPC] Clean up generation of ha16() / lo16() markers
When targeting the Darwin assembler, we need to generate markers ha16() and
lo16() to designate the high and low parts of a (symbolic) immediate.  This
is necessary not just for plain symbols, but also for certain symbolic
expression, typically along the lines of ha16(A - B).  The latter doesn't
work when simply using VariantKind flags on the symbol reference.
This is why the current back-end uses hacks (explicitly called out as such
via multiple FIXMEs) in the symbolLo/symbolHi print methods.

This patch uses target-defined MCExpr codes to represent the Darwin
ha16/lo16 constructs, following along the lines of the equivalent solution
used by the ARM back end to handle their :upper16: / :lower16: markers.
This allows us to get rid of special handling both in the symbolLo/symbolHi
print method and in the common code MCExpr::print routine.  Instead, the
ha16 / lo16 markers are printed simply in a custom print routine for the
target MCExpr types.  (As a result, the symbolLo/symbolHi print methods
can now replaced by a single printS16ImmOperand routine that also handles
symbolic operands.)

The patch also provides a EvaluateAsRelocatableImpl routine to handle
ha16/lo16 constructs.  This is not actually used at the moment by any
in-tree code, but is provided as it makes merging into David Fang's
out-of-tree Mach-O object writer simpler.

Since there is no longer any need to treat VK_PPC_GAS_HA16 and
VK_PPC_DARWIN_HA16 differently, they are merged into a single
VK_PPC_ADDR16_HA (and likewise for the _LO16 types).

llvm-svn: 182616
2013-05-23 22:26:41 +00:00
Ulrich Weigand 2c3a219b76 [PowerPC] Parse platform-specifc variant kinds in AsmParser
This patch adds support for PowerPC platform-specific variant
kinds in MCSymbolRefExpr::getVariantKindForName, and also
adds a test case to verify they are translated to the appropriate
fixup type.

llvm-svn: 181053
2013-05-03 19:52:35 +00:00
Rafael Espindola b770f897ee Fix section relocation for SECTIONREL32 with immediate offset.
Patch by Kai Nacke. This matches the gnu as output.

llvm-svn: 180568
2013-04-25 19:27:05 +00:00
Nico Rieck 1da4529b15 MC: Support COFF image-relative MCSymbolRefs
Add support for the COFF relocation types IMAGE_REL_I386_DIR32NB and
IMAGE_REL_AMD64_ADDR32NB for 32- and 64-bit respectively. These are
similar to normal 4-byte relocations except that they do not include
the base address of the image.

Image-relative relocations are used for debug information (32-bit) and
SEH unwind tables (64-bit).

A new MCSymbolRef variant called 'VK_COFF_IMGREL32' is introduced to
specify such relocations. For AT&T assembly, this variant can be accessed
using the symbol suffix '@imgrel'.

llvm-svn: 179240
2013-04-10 23:28:17 +00:00
Benjamin Kramer 9c9e0a2c04 Change '@SECREL' suffix to GAS-compatible '@SECREL32'.
'@SECREL' is what is used by the Microsoft assembler, but GNU as expects '@SECREL32'.
With the patch, the MC-generated code works fine in combination with a recent GNU as (2.23.51.20120920 here).

Patch by David Nadlinger!
Differential Revision: http://llvm-reviews.chandlerc.com/D429

llvm-svn: 178427
2013-03-30 16:21:50 +00:00
Bill Schmidt 9f0b4ec0f5 This patch improves the 64-bit PowerPC InitialExec TLS support by providing
for a wider range of GOT entries that can hold thread-relative offsets.
This matches the behavior of GCC, which was not documented in the PPC64 TLS
ABI.  The ABI will be updated with the new code sequence.

Former sequence:

  ld 9,x@got@tprel(2)
  add 9,9,x@tls

New sequence:

  addis 9,2,x@got@tprel@ha
  ld 9,x@got@tprel@l(9)
  add 9,9,x@tls

Note that a linker optimization exists to transform the new sequence into
the shorter sequence when appropriate, by replacing the addis with a nop
and modifying the base register and relocation type of the ld.

llvm-svn: 170209
2012-12-14 17:02:38 +00:00
Bill Schmidt 24b8dd6eb7 This patch implements local-dynamic TLS model support for the 64-bit
PowerPC target.  This is the last of the four models, so we now have 
full TLS support.

This is mostly a straightforward extension of the general dynamic model.
I had to use an additional Chain operand to tie ADDIS_DTPREL_HA to the
register copy following ADDI_TLSLD_L; otherwise everything above the
ADDIS_DTPREL_HA appeared dead and was removed.

As before, there are new test cases to test the assembly generation, and
the relocations output during integrated assembly.  The expected code
gen sequence can be read in test/CodeGen/PowerPC/tls-ld.ll.

There are a couple of things I think can be done more efficiently in the
overall TLS code, so there will likely be a clean-up patch forthcoming;
but for now I want to be sure the functionality is in place.

Bill

llvm-svn: 170003
2012-12-12 19:29:35 +00:00
Logan Chien 4dd14fb5eb Add ARM NONE and PREL31 relocation types.
Add R_ARM_NONE and R_ARM_PREL31 relocation types
to MCExpr.  Both of them will be used while
generating .ARM.extab and .ARM.exidx sections.

llvm-svn: 169965
2012-12-12 07:14:46 +00:00
Bill Schmidt c56f1d34bc This patch implements the general dynamic TLS model for 64-bit PowerPC.
Given a thread-local symbol x with global-dynamic access, the generated
code to obtain x's address is:

     Instruction                            Relocation            Symbol
  addis ra,r2,x@got@tlsgd@ha           R_PPC64_GOT_TLSGD16_HA       x
  addi  r3,ra,x@got@tlsgd@l            R_PPC64_GOT_TLSGD16_L        x
  bl __tls_get_addr(x@tlsgd)           R_PPC64_TLSGD                x
                                       R_PPC64_REL24           __tls_get_addr
  nop
  <use address in r3>

The implementation borrows from the medium code model work for introducing
special forms of ADDIS and ADDI into the DAG representation.  This is made
slightly more complicated by having to introduce a call to the external
function __tls_get_addr.  Using the full call machinery is overkill and,
more importantly, makes it difficult to add a special relocation.  So I've
introduced another opcode GET_TLS_ADDR to represent the function call, and
surrounded it with register copies to set up the parameter and return value.

Most of the code is pretty straightforward.  I ran into one peculiarity
when I introduced a new PPC opcode BL8_NOP_ELF_TLSGD, which is just like
BL8_NOP_ELF except that it takes another parameter to represent the symbol
("x" above) that requires a relocation on the call.  Something in the 
TblGen machinery causes BL8_NOP_ELF and BL8_NOP_ELF_TLSGD to be treated
identically during the emit phase, so this second operand was never
visited to generate relocations.  This is the reason for the slightly
messy workaround in PPCMCCodeEmitter.cpp:getDirectBrEncoding().

Two new tests are included to demonstrate correct external assembly and
correct generation of relocations using the integrated assembler.

Comments welcome!

Thanks,
Bill

llvm-svn: 169910
2012-12-11 20:30:11 +00:00
Bill Schmidt ca4a0c9dbd This patch introduces initial-exec model support for thread-local storage
on 64-bit PowerPC ELF.

The patch includes code to handle external assembly and MC output with the
integrated assembler.  It intentionally does not support the "old" JIT.

For the initial-exec TLS model, the ABI requires the following to calculate
the address of external thread-local variable x:

 Code sequence            Relocation                  Symbol
  ld 9,x@got@tprel(2)      R_PPC64_GOT_TPREL16_DS      x
  add 9,9,x@tls            R_PPC64_TLS                 x

The register 9 is arbitrary here.  The linker will replace x@got@tprel
with the offset relative to the thread pointer to the generated GOT
entry for symbol x.  It will replace x@tls with the thread-pointer
register (13).

The two test cases verify correct assembly output and relocation output
as just described.

PowerPC-specific selection node variants are added for the two
instructions above:  LD_GOT_TPREL and ADD_TLS.  These are inserted
when an initial-exec global variable is encountered by
PPCTargetLowering::LowerGlobalTLSAddress(), and later lowered to
machine instructions LDgotTPREL and ADD8TLS.  LDgotTPREL is a pseudo
that uses the same LDrs support added for medium code model's LDtocL,
with a different relocation type.

The rest of the processing is straightforward.

llvm-svn: 169281
2012-12-04 16:18:08 +00:00
Bill Schmidt 34627e3434 This patch implements medium code model support for 64-bit PowerPC.
The default for 64-bit PowerPC is small code model, in which TOC entries
must be addressable using a 16-bit offset from the TOC pointer.  Additionally,
only TOC entries are addressed via the TOC pointer.

With medium code model, TOC entries and data sections can all be addressed
via the TOC pointer using a 32-bit offset.  Cooperation with the linker
allows 16-bit offsets to be used when these are sufficient, reducing the
number of extra instructions that need to be executed.  Medium code model
also does not generate explicit TOC entries in ".section toc" for variables
that are wholly internal to the compilation unit.

Consider a load of an external 4-byte integer.  With small code model, the
compiler generates:

	ld 3, .LC1@toc(2)
	lwz 4, 0(3)

	.section	.toc,"aw",@progbits
.LC1:
	.tc ei[TC],ei

With medium model, it instead generates:

	addis 3, 2, .LC1@toc@ha
	ld 3, .LC1@toc@l(3)
	lwz 4, 0(3)

	.section	.toc,"aw",@progbits
.LC1:
	.tc ei[TC],ei

Here .LC1@toc@ha is a relocation requesting the upper 16 bits of the
32-bit offset of ei's TOC entry from the TOC base pointer.  Similarly,
.LC1@toc@l is a relocation requesting the lower 16 bits.  Note that if
the linker determines that ei's TOC entry is within a 16-bit offset of
the TOC base pointer, it will replace the "addis" with a "nop", and
replace the "ld" with the identical "ld" instruction from the small
code model example.

Consider next a load of a function-scope static integer.  For small code
model, the compiler generates:

	ld 3, .LC1@toc(2)
	lwz 4, 0(3)

	.section	.toc,"aw",@progbits
.LC1:
	.tc test_fn_static.si[TC],test_fn_static.si
	.type	test_fn_static.si,@object
	.local	test_fn_static.si
	.comm	test_fn_static.si,4,4

For medium code model, the compiler generates:

	addis 3, 2, test_fn_static.si@toc@ha
	addi 3, 3, test_fn_static.si@toc@l
	lwz 4, 0(3)

	.type	test_fn_static.si,@object
	.local	test_fn_static.si
	.comm	test_fn_static.si,4,4

Again, the linker may replace the "addis" with a "nop", calculating only
a 16-bit offset when this is sufficient.

Note that it would be more efficient for the compiler to generate:

	addis 3, 2, test_fn_static.si@toc@ha
        lwz 4, test_fn_static.si@toc@l(3)

The current patch does not perform this optimization yet.  This will be
addressed as a peephole optimization in a later patch.

For the moment, the default code model for 64-bit PowerPC will remain the
small code model.  We plan to eventually change the default to medium code
model, which matches current upstream GCC behavior.  Note that the different
code models are ABI-compatible, so code compiled with different models will
be linked and execute correctly.

I've tested the regression suite and the application/benchmark test suite in
two ways:  Once with the patch as submitted here, and once with additional
logic to force medium code model as the default.  The tests all compile
cleanly, with one exception.  The mandel-2 application test fails due to an
unrelated ABI compatibility with passing complex numbers.  It just so happens
that small code model was incredibly lucky, in that temporary values in 
floating-point registers held the expected values needed by the external
library routine that was called incorrectly.  My current thought is to correct
the ABI problems with _Complex before making medium code model the default,
to avoid introducing this "regression."

Here are a few comments on how the patch works, since the selection code
can be difficult to follow:

The existing logic for small code model defines three pseudo-instructions:
LDtoc for most uses, LDtocJTI for jump table addresses, and LDtocCPT for
constant pool addresses.  These are expanded by SelectCodeCommon().  The
pseudo-instruction approach doesn't work for medium code model, because
we need to generate two instructions when we match the same pattern.
Instead, new logic in PPCDAGToDAGISel::Select() intercepts the TOC_ENTRY
node for medium code model, and generates an ADDIStocHA followed by either
a LDtocL or an ADDItocL.  These new node types correspond naturally to
the sequences described above.

The addis/ld sequence is generated for the following cases:
 * Jump table addresses
 * Function addresses
 * External global variables
 * Tentative definitions of global variables (common linkage)

The addis/addi sequence is generated for the following cases:
 * Constant pool entries
 * File-scope static global variables
 * Function-scope static variables

Expanding to the two-instruction sequences at select time exposes the
instructions to subsequent optimization, particularly scheduling.

The rest of the processing occurs at assembly time, in
PPCAsmPrinter::EmitInstruction.  Each of the instructions is converted to
a "real" PowerPC instruction.  When a TOC entry needs to be created, this
is done here in the same manner as for the existing LDtoc, LDtocJTI, and
LDtocCPT pseudo-instructions (I factored out a new routine to handle this).

I had originally thought that if a TOC entry was needed for LDtocL or
ADDItocL, it would already have been generated for the previous ADDIStocHA.
However, at higher optimization levels, the ADDIStocHA may appear in a 
different block, which may be assembled textually following the block
containing the LDtocL or ADDItocL.  So it is necessary to include the
possibility of creating a new TOC entry for those two instructions.

Note that for LDtocL, we generate a new form of LD called LDrs.  This
allows specifying the @toc@l relocation for the offset field of the LD
instruction (i.e., the offset is replaced by a SymbolLo relocation).
When the peephole optimization described above is added, we will need
to do similar things for all immediate-form load and store operations.

The seven "mcm-n.ll" test cases are kept separate because otherwise the
intermingling of various TOC entries and so forth makes the tests fragile
and hard to understand.

The above assumes use of an external assembler.  For use of the
integrated assembler, new relocations are added and used by
PPCELFObjectWriter.  Testing is done with "mcm-obj.ll", which tests for
proper generation of the various relocations for the same sequences
tested with the external assembler.

llvm-svn: 168708
2012-11-27 17:35:46 +00:00
Akira Hatanaka 64b52d8434 Add relocations used for mips big GOT.
llvm-svn: 168448
2012-11-21 19:50:22 +00:00
Anton Korobeynikov a305ea5511 Add ARM TARGET2 relocation. The testcase will follow with actualy use-case.
Based on the patch by Logan Chien!

llvm-svn: 167633
2012-11-09 20:20:12 +00:00
Craig Topper 2a6a08b1cd Rename virtual table anchors from Anchor() to anchor() for consistency with the rest of the tree.
llvm-svn: 164666
2012-09-26 06:36:36 +00:00
Manman Ren 49d684e1e2 Release build: guard dump functions with
"#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)"

No functional change. Update r163344.

llvm-svn: 163679
2012-09-12 05:06:18 +00:00
Manman Ren c3366ccecb Release build: guard dump functions with "ifndef NDEBUG"
No functional change.

llvm-svn: 163344
2012-09-06 19:55:56 +00:00
Roman Divacky ace4707ea6 Lower constant pools and jump tables via TOC on PPC64/SVR4.
In collaboration with Adhemerval Zanella.

llvm-svn: 162562
2012-08-24 16:26:02 +00:00
Akira Hatanaka f73e362758 Add VK_Mips_HIGHER and VK_Mips_HIGHEST to MCSymbolRefExpr::VariantKind.
Test case will be added later when long branch patch is checked in.

llvm-svn: 160597
2012-07-21 02:15:19 +00:00
Roman Divacky e3f15c98d1 Implement local-exec TLS on PowerPC.
llvm-svn: 157935
2012-06-04 17:36:38 +00:00
Craig Topper 6e80c28017 Prune some includes and forward declarations.
llvm-svn: 153429
2012-03-26 06:58:25 +00:00
Jim Grosbach 213039a5a1 ARM Thumb symbol references in assembly need the low bit set.
Add support for a missed case when the symbols in a difference
expression are in the same section but not the same fragment.

rdar://10924681

llvm-svn: 151345
2012-02-24 05:12:18 +00:00
Anton Korobeynikov c6b4017ce2 Add support for implicit TLS model used with MS VC runtime.
Patch by Kai Nacke!

llvm-svn: 150307
2012-02-11 17:26:53 +00:00
Craig Topper a2886c21d9 Convert assert(0) to llvm_unreachable
llvm-svn: 149967
2012-02-07 05:05:23 +00:00
James Molloy 6685c08e5f Add support for the R_ARM_TARGET1 relocation, which should be given to relocations applied to all C++ constructors and destructors.
This enables the linker to match concrete relocation types (absolute or relative) with whatever library or C++ support code is being linked against.

llvm-svn: 149057
2012-01-26 09:25:43 +00:00
Chandler Carruth f3e8502cc1 Add 'llvm_unreachable' to passify GCC's understanding of the constraints
of several newly un-defaulted switches. This also helps optimizers
(including LLVM's) recognize that every case is covered, and we should
assume as much.

llvm-svn: 147861
2012-01-10 18:08:01 +00:00
David Blaikie edbb58c577 Remove unnecessary default cases in switches that cover all enum values.
llvm-svn: 147855
2012-01-10 16:47:17 +00:00
Akira Hatanaka e2eed9649e Local dynamic TLS model for direct object output. Create the correct TLS MIPS
ELF relocations.

Patch by Jack Carter.

llvm-svn: 147118
2011-12-22 01:05:17 +00:00
Akira Hatanaka d519d8ca83 Remove function printMipsSymbolRef.
llvm-svn: 144663
2011-11-15 18:38:35 +00:00
Bruno Cardoso Lopes 82b077ec22 This is the first of several patches for Mips direct object generation.
This first patch is for expression variable kinds.

Patch by Jack Carter!

llvm-svn: 142934
2011-10-25 18:13:20 +00:00
Evan Cheng 5928e69d20 Rename TargetAsmBackend to MCAsmBackend; rename createAsmBackend to createMCAsmBackend.
llvm-svn: 136010
2011-07-25 23:24:55 +00:00
Evan Cheng f2596bc62a Move TargetAsmParser.h TargetAsmBackend.h and TargetAsmLexer.h to MC where they belong.
llvm-svn: 135833
2011-07-23 00:45:41 +00:00
Roman Divacky 4b5665a1f7 Fix emission of PPC64 assembler on non-darwin platforms by splitting
VK_PPC_{HA,LO}16 into darwin and gas variants.

Darwin wants {ha,lo}16(symbol) while gnu as wants symbol@{ha,l}.

llvm-svn: 132802
2011-06-09 20:25:38 +00:00
Daniel Dunbar dc3e4cc5ed MCExpr: Add FindAssociatedSection, which attempts to mirror the 'as' semantics
that associate sections with expressions.

llvm-svn: 130517
2011-04-29 18:00:03 +00:00
Chris Lattner 0ab5e2cded Fix a ton of comment typos found by codespell. Patch by
Luis Felipe Strano Moraes!

llvm-svn: 129558
2011-04-15 05:18:47 +00:00
Owen Anderson 9746286bec Add support for Thumb interworking addresses for symbol offsets that get constant folded very early.
This fixes SPASS with -integrated-as.  <rdar://problem/9165399>

llvm-svn: 128037
2011-03-21 23:13:43 +00:00
Rafael Espindola 8bac423ddb Add support for lowercase variants.
llvm-svn: 124071
2011-01-23 16:11:25 +00:00
Evan Cheng 965b3c7323 Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a step
in the right direction. It eliminated some hacks and will unblock codegen
work. But it's far from being done. It doesn't reject illegal expressions,
e.g. (FOO - :lower16:BAR). It also doesn't work in Thumb2 mode at all.

llvm-svn: 123369
2011-01-13 07:58:56 +00:00
Rafael Espindola 4124ab1255 Add r122359 back now that the bug in MCDwarfLineAddrFragment fragment has been
fixed.

llvm-svn: 122448
2010-12-22 22:16:24 +00:00
Rafael Espindola 0e14b61c0b Revert r122359 while I debug PR8845.
llvm-svn: 122427
2010-12-22 19:05:49 +00:00
Rafael Espindola 50ce2f06de Use references and simplify.
llvm-svn: 122405
2010-12-22 16:11:57 +00:00
Rafael Espindola a468ae02cb Simplify EvaluateAsAbsolute now that EvaluateAsRelocatableImpl does all
the folding it can.

llvm-svn: 122359
2010-12-21 20:51:42 +00:00
Rafael Espindola ee54636f0a Fixed version of 122160 (the previous one would fold undefined symbols).
llvm-svn: 122167
2010-12-19 04:18:56 +00:00
Rafael Espindola 9a2d4e04c7 Revert 122160 while I debug it.
llvm-svn: 122165
2010-12-19 03:22:05 +00:00
Rafael Espindola 6fd80a5593 Move all folding to AttemptToFoldSymbolOffsetDifference.
llvm-svn: 122160
2010-12-19 02:15:04 +00:00
Rafael Espindola b403e098a1 Merge isAbsolute into IsSymbolRefDifferenceFullyResolved.
llvm-svn: 122148
2010-12-18 06:27:54 +00:00
Rafael Espindola 8396dd0893 Remove the MCObjectFormat class.
llvm-svn: 122147
2010-12-18 05:37:28 +00:00
Rafael Espindola 293a7c1840 Add a FIXME and explain a hack.
llvm-svn: 122144
2010-12-18 04:19:20 +00:00
Rafael Espindola 1ea7f18caa Fix the note.
llvm-svn: 122139
2010-12-18 04:01:45 +00:00
Rafael Espindola 5004f4a9b5 Revert 122011, 122012, 122013, 122023 adding back an important optimization.
I added a note, but suggestions on how to add a test are really welcome.

llvm-svn: 122138
2010-12-18 03:57:21 +00:00
Daniel Dunbar 137d422e50 MC/Expr: Implemnt more aggressive folding during symbol evaluation using
IsSymbolRefDifferenceFullyResolved(). For example, we will now fold away
something like:
--
_a:
...
L0:
...
L1:
...
.long (L1 - L0) / 2
--

llvm-svn: 122043
2010-12-17 05:50:33 +00:00
Daniel Dunbar e491ea4630 MC/Expr: Simplify.
llvm-svn: 122023
2010-12-17 02:05:45 +00:00
Daniel Dunbar f89156da92 MC: Remove another dead MCAssembler argument, and update clients.
llvm-svn: 122013
2010-12-17 01:07:35 +00:00
Daniel Dunbar f15aeb8d01 MC: Remove dead MCAssembler argument -- Rafael, can you check the FIXME I added
here?

llvm-svn: 122012
2010-12-17 01:07:31 +00:00
Daniel Dunbar 9af1335b5d MC: Simplify (remove unnecessary MCAssembler argument, obsoleted by containment
in MCAsmLayout).

llvm-svn: 122011
2010-12-17 01:07:28 +00:00
Daniel Dunbar 33d571e2ae Write => in a more normal form.
llvm-svn: 122009
2010-12-17 01:07:22 +00:00
Daniel Dunbar 76793bac89 MC/Expr: Simplify (and add a FIXME).
llvm-svn: 122008
2010-12-17 01:07:20 +00:00
Daniel Dunbar 395a09922b MC/Expr: Add a doxyment.
llvm-svn: 121988
2010-12-16 18:36:25 +00:00
Rafael Espindola 93e3cf0ebd Sorry for such a large commit. The summary is that only MachO cares about the
actuall addresses in a .o file, so it is better to let the MachO writer compute
it.

This is good for two reasons. First, areas that shouldn't care about
addresses now don't have access to it. Second, the layout of each section
is independent. I should use this in a subsequent commit to speed it up.

Most of the patch is just removing the section address computation. The two
interesting parts are the change on how we handle padding in the end
of sections and how MachO can get the address of a-b when a and b are in
different sections.

Since now the expression evaluation normally doesn't know the section address,
it will think that a-b needs relocation and let the MachO writer know. Once
it has computed the section addresses, it calls back the expression evaluation
with the section addresses to resolve these expressions.

The remaining problem is the handling of padding. Currently it will create
a special alignment fragment at the end. Since that fragment doesn't update
the alignment of the section, it needs the real address to be computed.

Since now the layout will not compute a-b with a and b in different sections,
the only effect that the special alignment fragment has is update the
address size of the section. This can also be done by the MachO writer.

llvm-svn: 121076
2010-12-07 00:27:36 +00:00
Rafael Espindola 1055f72b97 Use references to simplify the code a bit.
llvm-svn: 121050
2010-12-06 22:30:54 +00:00
Rafael Espindola 46e40188f7 Simplify a bit.
llvm-svn: 120980
2010-12-06 03:36:43 +00:00
Rafael Espindola 57ab708bdd Try to resolve symbol differences early, and if successful create a plain
data fragment. This reduces the time to assemble the test in 8711 from 60s to
54s.

llvm-svn: 120767
2010-12-03 00:55:40 +00:00
Rafael Espindola bf792065a9 Add a fast path to EvaluateSymbolicAdd. This avoids computing symbol addresses
which then avoids running EnsureValid.
This cuts the assembly time of the testcase in PR8711 from 2:50 minutes to 1
minute.

llvm-svn: 120697
2010-12-02 07:53:12 +00:00
Jim Grosbach d82684c7fc Fix typo.
llvm-svn: 119542
2010-11-17 19:30:11 +00:00
Rafael Espindola 8c3039b67b Change MCExpr::EvaluateAsRelocatableImpl of variables to return the original
variable if recursing fails to simplify it.

Factor AliasedSymbol to be a method of MCSymbol.

Update MCAssembler::EvaluateFixup to match the change in
EvaluateAsRelocatableImpl.

Remove the WeakRefExpr hack, as the object writer now sees the weakref with
no extra effort needed.

Nothing else is using MCTargetExpr, but keep it for now.

Now that the ELF writer sees relocations with aliases, handle

    .weak    foo2
foo2:
    .weak    bar2
    .set    bar2,foo2
    .quad    bar2

the same way gas does and produce a relocation with bar2.

llvm-svn: 119152
2010-11-15 16:33:49 +00:00
Chris Lattner edb9d84dcc add targetoperand flags for jump tables, constant pool and block address
nodes to indicate when ha16/lo16 modifiers should be used.  This lets
us pass PowerPC/indirectbr.ll.

The one annoying thing about this patch is that the MCSymbolExpr isn't
expressive enough to represent ha16(label1-label2) which we need on
PowerPC.  I have a terrible hack in the meantime, but this will have
to be revisited at some point.

Last major conversion item left is global variable references.

llvm-svn: 119105
2010-11-15 02:46:57 +00:00
Chris Lattner 94f0c14cb0 reimplement ppc asmprinter "toc" handling to use a VariantKind
on the operand, required for .o file writing and fixing 
the PowerPC/mult-alt-generic-powerpc64.ll failure with the new
instprinter.

llvm-svn: 119087
2010-11-14 22:22:59 +00:00
Jim Grosbach f23b2d9d8d Update ARMConstantPoolValue to not use a modifier string. Use an explicit
VariantKind marker to indicate the additional information necessary. Update
MC to handle the new Kinds. rdar://8647623

llvm-svn: 118671
2010-11-10 03:26:07 +00:00
Rafael Espindola 2dbec3f762 Implement TLSLD.
llvm-svn: 117547
2010-10-28 15:02:40 +00:00
Rafael Espindola e8f08be11c Implement DTPOFF.
llvm-svn: 117546
2010-10-28 14:48:59 +00:00
Rafael Espindola 6f23eb380d Implement TLSLDM.
llvm-svn: 117544
2010-10-28 14:37:09 +00:00
Rafael Espindola b3b49bbc39 Implement VK_GOTNTPOFF and switch RelocNeedsGOT to use VariantKind.
llvm-svn: 117543
2010-10-28 14:22:44 +00:00
Rafael Espindola 8ba86f801d Do not recurse into symbol refs that have a variant kind. This prevents us
from losing the variant when producing a relocation on an alias.

llvm-svn: 117037
2010-10-21 18:00:20 +00:00
Rafael Espindola 4262a22225 Add a MCObjectFormat class so that code common to all targets that use a
single object format can be shared.

This also adds support for

mov zed+(bar-foo), %eax

on ELF and COFF targets.

llvm-svn: 116675
2010-10-16 18:23:53 +00:00