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6522 Commits

Author SHA1 Message Date
Stuart Hastings c08336adc3 Testcase to insure C strings go to the cstring 
section. Darwin-specific.

llvm-svn: 65655
 2009-02-27 22:35:12 +00:00
Rafael Espindola 000421eade Refactor TLS code and add some tests. The tests and expected results are: 
pic |  declaration | linkage  | visibility |

!pic |  declaration | external | default    | tls1.ll     tls2.ll     | local exec
 pic |  declaration | external | default    | tls1-pic.ll tls2-pic.ll | general dynamic
!pic | !declaration | external | default    | tls3.ll     tls4.ll     | initial exec
 pic | !declaration | external | default    | tls3-pic.ll tls4-pic.ll | general dynamic

!pic |  declaration | external | hidden     | tls7.ll     tls8.ll     | local exec
 pic |  declaration | external | hidden     | X                       | local dynamic
!pic | !declaration | external | hidden     | tls9.ll     tls10.ll    | local exec
 pic | !declaration | external | hidden     | X                       | local dynamic

!pic |  declaration | internal | default    | tls5.ll     tls6.ll     | local exec
 pic |  declaration | internal | default    | X                       | local dynamic

The ones marked with an X have not been implemented since local dynamic is not implemented.

llvm-svn: 65632
 2009-02-27 13:37:18 +00:00
Evan Cheng 2ad43a97cc Make sure this test passes on linux-ppc. 
llvm-svn: 65600
 2009-02-27 00:51:50 +00:00
Dan Gohman b2f5eaefbe Update another test for the LoopInfo::print changes. 
llvm-svn: 65598
 2009-02-27 00:20:19 +00:00
Dan Gohman b4e896baed Update this test for the LoopInfo::print changes. 
llvm-svn: 65597
 2009-02-27 00:17:49 +00:00
Evan Cheng 8d0b4d4fd6 MachineLICM CSE should match destination register classes; avoid hoisting implicit_def's. 
llvm-svn: 65592
 2009-02-27 00:02:22 +00:00
Chris Lattner df86f29347 make sure that make fully evaluates variables when determining how compile_c and 
friends should work.  This fixes 2006-11-30-Pubnames.cpp and friends on darwin
with the new -mmacosx-version-min change.

llvm-svn: 65564
 2009-02-26 19:19:26 +00:00
Zhou Sheng 264e46e1e9 Ignore dbg info intrinsics when folding conditional branch to 
conditional branch predecessors.

llvm-svn: 65509
 2009-02-26 06:56:37 +00:00
Evan Cheng 40abb7b5d0 ADDS{D|S}rr_Int and MULS{D|S}rr_Int are not commutable. The users of these intrinsics expect the high bits will not be modified. 
llvm-svn: 65499
 2009-02-26 03:12:02 +00:00
Evan Cheng ca2d65467b The last commit was overly conservative. It's ok to reuse value that's already marked livein. 
llvm-svn: 65498
 2009-02-26 03:02:21 +00:00
Julien Lerouge 8b08bf9eca Fix a typo that prevents hello.mm from running (and runs hello.m twice). 
llvm-svn: 65493
 2009-02-26 00:16:33 +00:00
Evan Cheng a49de9de2e Revert BuildVectorSDNode related patches: 65426, 65427, and 65296. 
llvm-svn: 65482
 2009-02-25 22:49:59 +00:00
Chris Lattner af618171f4 Fix PR3667 
llvm-svn: 65464
 2009-02-25 18:20:01 +00:00
Duncan Sands c642e53b8c Check that records with a known constant size are not 
copied field by LLVM field if the record has a variable
sized field in it.  The problem is that the LLVM field
will not completely cover the variable sized gcc field.

llvm-svn: 65463
 2009-02-25 18:10:49 +00:00
Zhou Sheng 5d9cc1763b Don't block basic block with only SwitchInst to fold into predecessors. 
llvm-svn: 65456
 2009-02-25 15:34:27 +00:00
Dan Gohman 0bddac16a8 Rename ScalarEvolution's getIterationCount to getBackedgeTakenCount, 
to more accurately describe what it does. Expand its doxygen comment
to describe what the backedge-taken count is and how it differs
from the actual iteration count of the loop. Adjust names and
comments in associated code accordingly.

llvm-svn: 65382
 2009-02-24 18:55:53 +00:00
Bill Wendling 786c5973f7 - Use the "Fast" flag instead of "OptimizeForSize" to determine whether to emit 
a DBG_LABEL or not. We want to fall back to the original way of emitting debug
  info when we're in -O0/-fast mode.
- Add plumbing in to pass the "Fast" flag to places that need it.
- XFAIL DebugInfo/deaddebuglabel.ll. This is finding 11 labels instead of 8. I
  need to investigate still.

llvm-svn: 65367
 2009-02-24 02:35:30 +00:00
Dan Gohman 3204dac652 Add a testcase for the problem fixed in r65289. 
llvm-svn: 65365
 2009-02-24 02:17:42 +00:00
Dan Gohman 4f356bb9b0 Fix a ValueTracking rule: RHS means operand 1, not 0. Add a simple 
ashr instcombine to help expose this code. And apply the fix to
SelectionDAG's copy of this code too.

llvm-svn: 65364
 2009-02-24 02:00:40 +00:00
Bill Wendling 98bac99265 Un-XFAIL this test. 
llvm-svn: 65355
 2009-02-24 00:37:28 +00:00
Devang Patel e288082644 While folding unconditional return move DbgRegionEndInst into the predecessor, instead of removing it. This fixes following tests from llvmgcc42 testsuite. 
gcc.c-torture/execute/20000605-3.c
gcc.c-torture/execute/20020619-1.c
gcc.c-torture/execute/20030920-1.c
gcc.c-torture/execute/loop-ivopts-1.c

llvm-svn: 65353
 2009-02-24 00:05:16 +00:00
Dan Gohman f6e8c77e1c Back out the change in 64918 that used sign-extensions when promoting 
trip counts that use signed comparisons. It's not obviously the best
approach for preserving trip count information, and at any rate there
isn't anything in the tree right now that makes use of that, so for
now always using zero-extensions is preferable.

llvm-svn: 65347
 2009-02-23 23:20:35 +00:00
Dan Gohman 318d7376ba Fast-isel can't do TLS yet, so it should fall back to SDISel 
if it sees TLS addresses.

llvm-svn: 65341
 2009-02-23 22:03:08 +00:00
Dan Gohman 0fd45016c2 Use the -stack-alignment option instead of using a target triple 
for avoiding dynamic stack realignment.

llvm-svn: 65319
 2009-02-23 16:34:46 +00:00
Zhou Sheng 7c528e95af Add test case for checkin @r65314. 
llvm-svn: 65315
 2009-02-23 10:15:04 +00:00
Evan Cheng 9f8fddeed8 Only v1i16 (i.e. _m64) is returned via RAX / RDX. 
llvm-svn: 65313
 2009-02-23 09:03:22 +00:00
Nate Begeman 9af0d0c97e Make this test use darwin targe triple, to avoid stack traffic on linux. 
llvm-svn: 65312
 2009-02-23 09:03:06 +00:00
Nate Begeman e684da3e5d Generate better code for v8i16 shuffles on SSE2 
Generate better code for v16i8 shuffles on SSE2 (avoids stack)
Generate pshufb for v8i16 and v16i8 shuffles on SSSE3 where it is fewer uops.
Document the shuffle matching logic and add some FIXMEs for later further
  cleanups.
New tests that test the above.

Examples:

New:
_shuf2:
	pextrw	$7, %xmm0, %eax
	punpcklqdq	%xmm1, %xmm0
	pshuflw	$128, %xmm0, %xmm0
	pinsrw	$2, %eax, %xmm0

Old:
_shuf2:
	pextrw	$2, %xmm0, %eax
	pextrw	$7, %xmm0, %ecx
	pinsrw	$2, %ecx, %xmm0
	pinsrw	$3, %eax, %xmm0
	movd	%xmm1, %eax
	pinsrw	$4, %eax, %xmm0
	ret

=========

New:
_shuf4:
	punpcklqdq	%xmm1, %xmm0
	pshufb	LCPI1_0, %xmm0

Old:
_shuf4:
	pextrw	$3, %xmm0, %eax
	movsd	%xmm1, %xmm0
	pextrw	$3, %xmm1, %ecx
	pinsrw	$4, %ecx, %xmm0
	pinsrw	$5, %eax, %xmm0

========

New:
_shuf1:
	pushl	%ebx
	pushl	%edi
	pushl	%esi
	pextrw	$1, %xmm0, %eax
	rolw	$8, %ax
	movd	%xmm0, %ecx
	rolw	$8, %cx
	pextrw	$5, %xmm0, %edx
	pextrw	$4, %xmm0, %esi
	pextrw	$3, %xmm0, %edi
	pextrw	$2, %xmm0, %ebx
	movaps	%xmm0, %xmm1
	pinsrw	$0, %ecx, %xmm1
	pinsrw	$1, %eax, %xmm1
	rolw	$8, %bx
	pinsrw	$2, %ebx, %xmm1
	rolw	$8, %di
	pinsrw	$3, %edi, %xmm1
	rolw	$8, %si
	pinsrw	$4, %esi, %xmm1
	rolw	$8, %dx
	pinsrw	$5, %edx, %xmm1
	pextrw	$7, %xmm0, %eax
	rolw	$8, %ax
	movaps	%xmm1, %xmm0
	pinsrw	$7, %eax, %xmm0
	popl	%esi
	popl	%edi
	popl	%ebx
	ret

Old:
_shuf1:
	subl	$252, %esp
	movaps	%xmm0, (%esp)
	movaps	%xmm0, 16(%esp)
	movaps	%xmm0, 32(%esp)
	movaps	%xmm0, 48(%esp)
	movaps	%xmm0, 64(%esp)
	movaps	%xmm0, 80(%esp)
	movaps	%xmm0, 96(%esp)
	movaps	%xmm0, 224(%esp)
	movaps	%xmm0, 208(%esp)
	movaps	%xmm0, 192(%esp)
	movaps	%xmm0, 176(%esp)
	movaps	%xmm0, 160(%esp)
	movaps	%xmm0, 144(%esp)
	movaps	%xmm0, 128(%esp)
	movaps	%xmm0, 112(%esp)
	movzbl	14(%esp), %eax
	movd	%eax, %xmm1
	movzbl	22(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm1, %xmm2
	movzbl	42(%esp), %eax
	movd	%eax, %xmm1
	movzbl	50(%esp), %eax
	movd	%eax, %xmm3
	punpcklbw	%xmm1, %xmm3
	punpcklbw	%xmm2, %xmm3
	movzbl	77(%esp), %eax
	movd	%eax, %xmm1
	movzbl	84(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm1, %xmm2
	movzbl	104(%esp), %eax
	movd	%eax, %xmm1
	punpcklbw	%xmm1, %xmm0
	punpcklbw	%xmm2, %xmm0
	movaps	%xmm0, %xmm1
	punpcklbw	%xmm3, %xmm1
	movzbl	127(%esp), %eax
	movd	%eax, %xmm0
	movzbl	135(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm0, %xmm2
	movzbl	155(%esp), %eax
	movd	%eax, %xmm0
	movzbl	163(%esp), %eax
	movd	%eax, %xmm3
	punpcklbw	%xmm0, %xmm3
	punpcklbw	%xmm2, %xmm3
	movzbl	188(%esp), %eax
	movd	%eax, %xmm0
	movzbl	197(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm0, %xmm2
	movzbl	217(%esp), %eax
	movd	%eax, %xmm4
	movzbl	225(%esp), %eax
	movd	%eax, %xmm0
	punpcklbw	%xmm4, %xmm0
	punpcklbw	%xmm2, %xmm0
	punpcklbw	%xmm3, %xmm0
	punpcklbw	%xmm1, %xmm0
	addl	$252, %esp
	ret

llvm-svn: 65311
 2009-02-23 08:49:38 +00:00
Scott Michel 9d31aca679 Introduce the BuildVectorSDNode class that encapsulates the ISD::BUILD_VECTOR 
instruction. The class also consolidates the code for detecting constant
splats that's shared across PowerPC and the CellSPU backends (and might be
useful for other backends.) Also introduces SelectionDAG::getBUID_VECTOR() for
generating new BUILD_VECTOR nodes.

llvm-svn: 65296
 2009-02-22 23:36:09 +00:00
Richard Pennington d853864705 bug 3610: Test case. 
llvm-svn: 65287
 2009-02-22 15:54:44 +00:00
Evan Cheng e779595af0 If a use operand is marked isKill, don't forget to add kill to its live interval as well. 
llvm-svn: 65279
 2009-02-22 08:35:56 +00:00
Evan Cheng e4ffc030e2 Be bug compatible with gcc by returning MMX values in RAX. 
llvm-svn: 65274
 2009-02-22 08:05:12 +00:00
Nick Lewycky d44e80d7fc Don't sign extend the char when expanding char -> int during 
load(bitcast(char[4] to i32*)) evaluation.

llvm-svn: 65246
 2009-02-21 20:50:42 +00:00
Anton Korobeynikov 42aae86590 Drop bunch of half-working stuff in the ext_weak linkage support. 
Now we're using one gross, but quite robust hack :) (previous ones
did not work, for example, when ext_weak symbol was used deep inside
constant expression in the initializer).

The proper fix of this problem will require some quite huge asmprinter
changes and that's why was postponed. This fixes PR3629 by the way :)

llvm-svn: 65230
 2009-02-21 11:53:32 +00:00
Evan Cheng 34806b1fa4 If two-address def is dead and the instruction does not define other registers, and it doesn't produce side effects, just delete the instruction. 
llvm-svn: 65218
 2009-02-21 03:14:25 +00:00
Evan Cheng 107b06c4b9 Teach LSR sink to sink the immediate portion of the common expression back into uses if they fit in address modes of all the uses. 
llvm-svn: 65215
 2009-02-21 02:06:47 +00:00
Chris Lattner bef6b2098e rename a function to indicate that it checks for profitability as well 
as legality.  Make load sinking and gep sinking more careful: we only
do it when it won't pessimize loads from the stack.  This has the added
benefit of not producing code that is unanalyzable to SROA.

llvm-svn: 65209
 2009-02-21 00:46:50 +00:00
Evan Cheng 8a9481d50d Fix strange logic in CollectIVUsers used to determine whether all uses are 
addresses, part 1. This fixes an obvious logic bug. Previously if the only
in-loop use is a PHI, it would return AllUsesAreAddresses as true.

llvm-svn: 65178
 2009-02-20 22:16:49 +00:00
Evan Cheng 2a9bad5ac1 Support return of MMX values in 64-bit mode. 
llvm-svn: 65152
 2009-02-20 20:43:02 +00:00
Owen Anderson f13820148b Fix a crash in the pre-alloc splitter exposed by recent codegen changes. 
llvm-svn: 65121
 2009-02-20 10:02:23 +00:00
Chris Lattner 52e8d4cc5d make these tests pass when run on a G5. 
llvm-svn: 65117
 2009-02-20 07:10:11 +00:00
Dan Gohman 2a12ae7d1f Implement "superhero" strength reduction, or full strength 
reduction of address calculations down to basic pointer arithmetic.
This is currently off by default, as it needs a few other features
before it becomes generally useful. And even when enabled, full
strength reduction is only performed when it doesn't increase
register pressure, and when several other conditions are true.

This also factors out a bunch of exisiting LSR code out of
StrengthReduceStridedIVUsers into separate functions, and tidies
up IV insertion. This actually decreases register pressure even
in non-superhero mode. The change in iv-users-in-other-loops.ll
is an example of this; there are two more adds because there are
two fewer leas, and there is less spilling.

llvm-svn: 65108
 2009-02-20 04:17:46 +00:00
Bill Wendling dce6011eb5 Temporarily XFAIL this test. 
llvm-svn: 64987
 2009-02-19 00:13:55 +00:00
Chris Lattner 778c62ccb5 add proper asmwriter and asmparser support for anonymous functions. 
llvm-svn: 64953
 2009-02-18 21:48:13 +00:00
Devang Patel 66c5a1dd50 The subprogram die may not exist while creating "default" scope. 
llvm-svn: 64920
 2009-02-18 17:29:38 +00:00
Dan Gohman 8078b8bddc Use a sign-extend instead of a zero-extend when promoting a 
trip count value when the original loop iteration condition is
signed and the canonical induction variable won't undergo signed
overflow. This isn't required for correctness; it just preserves
more information about original loop iteration values.

Add a getTruncateOrSignExtend method to ScalarEvolution,
following getTruncateOrZeroExtend.

llvm-svn: 64918
 2009-02-18 17:22:41 +00:00
Owen Anderson ad4254935f Add a test for r61358, which I forgot to add way back when. 
llvm-svn: 64904
 2009-02-18 07:50:22 +00:00
Dan Gohman b694533a54 Change the argument type in this test to something less convoluted, 
since it isn't actually used. 

llvm-svn: 64883
 2009-02-18 04:25:04 +00:00
Evan Cheng a40d5e14ab GV with null value initializer shouldn't go to BSS if it's meant for a mergeable strings section. Currently it only checks for Darwin. Someone else please check if it should apply to other targets as well. 
llvm-svn: 64877
 2009-02-18 02:19:52 +00:00
Dan Gohman 8212ebb5cf Fix a corner case in the new indvars promotion logic: if there 
are multiple IV's in a loop, some of them may under go signed
or unsigned wrapping even if the IV that's used in the loop
exit condition doesn't. Restrict sign-extension-elimination
and zero-extension-elimination to only those that operate on
the original loop-controlling IV.

llvm-svn: 64866
 2009-02-18 00:52:00 +00:00