Commit Graph

433296 Commits

Author SHA1 Message Date
Philip Reames 531dd3634d [LV] Restructure isPredicatedInst and isScalarWithPredication (w/a fix for uniform mem ops)
This change reorganizes the code and comments to make the expected semantics of these routines more clear. However, this is *not* an NFC change. The functional change is having isScalarWithPredication return false if the instruction does not need predicated. Specifically, for the case of a uniform memory operation we were previously considering it *not* to be a predicated instruction, but *were* considering it to be scalable with predication.

As can be seen with the test changes, this causes uniform memory ops which should have been lowered as uniform-per-parts values to instead be lowering via naive scalarization or if scalarization is infeasible (i.e. scalable vectors) aborted entirely. I also don't trust the code to bail out correctly 100% of the time, so it's possible we had a crash or miscompile from trying to scalarize something which isn't scalaralizable. I haven't found a concrete example here, but I am suspicious.

Differential Revision: https://reviews.llvm.org/D131093
2022-08-18 07:14:04 -07:00
Christian Kandeler 1c056f8df2 [clangd] Use the "macro" semantic token for pre-defined identifiers
This matches user expectations.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D131175
2022-08-18 16:12:55 +02:00
Peter Steinfeld 053498ccd3 [Flang] Mark 128 float MODULO intrinsic calls as "TODO"
The code generated for this version of the intrinsic is broken.  I'm
marking it as a "TODO" for now so that people don't get unannounce bad
results.

Differential Revision: https://reviews.llvm.org/D132082
2022-08-18 06:24:07 -07:00
Simon Pilgrim 55b1a147f2 [CostModel][X86] getArithmeticInstrCost - use MUL/DIV/REM expansions for all cost kinds
The costs tables still assume throughput, but the general expansion patterns should be good for any cost kind
2022-08-18 14:18:54 +01:00
Simon Pilgrim 8d26f5cf86 [CostModel][X86] Add cost kinds test coverage for integer division/remainder operators 2022-08-18 13:48:42 +01:00
Martin Storsjö 9ad0ace2ba [clang-tidy] Rename a local cmake variables to match the new tool name. NFC.
This shouldn't have any externally visible effect.

This matches the new name from 18b4a8bcf3.

Differential Revision: https://reviews.llvm.org/D130701
2022-08-18 14:27:45 +03:00
Simon Pilgrim fdec50182d [CostModel] Replace getUserCost with getInstructionCost
* Replace getUserCost with getInstructionCost, covering all cost kinds.
* Remove getInstructionLatency, it's not implemented by any backends, and we should fold the functionality into getUserCost (now getInstructionCost) to make it easier for targets to handle the cost kinds with their existing cost callbacks.

Original Patch by @samparker (Sam Parker)

Differential Revision: https://reviews.llvm.org/D79483
2022-08-18 11:55:23 +01:00
Ties Stuij 27cbfa7cc8 [Clang] Propagate const context info when emitting compound literal
This patch fixes a crash when trying to emit a constant compound literal.

For C++ Clang evaluates either casts or binary operations at translation time,
but doesn't pass on the InConstantContext information that was inferred when
parsing the statement.  Because of this, strict FP evaluation (-ftrapping-math)
which shouldn't be in effect yet, then causes checkFloatingpointResult to return
false, which in tryEmitGlobalCompoundLiteral will trigger an assert that the
compound literal wasn't constant.

The discussion here around 'manifestly constant evaluated contexts' was very
helpful to me when trying to understand what LLVM's position is on what
evaluation context should be in effect, together with the explanatory text in
that patch itself:
https://reviews.llvm.org/D87528

Reviewed By: rjmccall, DavidSpickett

Differential Revision: https://reviews.llvm.org/D131555
2022-08-18 11:25:20 +01:00
wanglian eeac894418 Precommit tests for D132115
Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D132116
2022-08-18 17:58:15 +08:00
Dmitry Preobrazhensky 89d53a9b9e [AMDGPU][MC][GFX11][NFC] Add missing tests for DS opcodes
Differential Revision: https://reviews.llvm.org/D132026
2022-08-18 12:52:44 +03:00
Matthias Springer adc93e0d38 [mlir][SCF] Loop lb/ub are symbols during Affine Min/Max canonicalization
This fixes a bug in SCF/AffineCanonicalizationUtils.cpp. Loop lb/ub were previously considered dimensions, which caused a crash when a (non-optimizable) affine.min / affine.max expression was processed (due to multiplication of two dims). Lb/ub are now considered symbols and symbols may be multiplied. (The scope of the analysis is "within the loop body", at which point lb/ub are constants.)

Differential Revision: https://reviews.llvm.org/D132021
2022-08-18 11:44:48 +02:00
Simon Pilgrim e48892ee42 [Transforms] LICM.cpp - pull out repeated getUserCost call
Pulled out of D79483
2022-08-18 10:43:29 +01:00
Simon Pilgrim b994f87184 [Analysis] CostModel.cpp - merge isa<IntrinsicInst> and dyn_cast<IntrinsicInst> checks
Pulled out of D79483
2022-08-18 10:43:29 +01:00
Dmitry Preobrazhensky 7e29d5c04b [AMDGPU][MC][GFX10][NFC] Split large test
Split gfx10_dasm_all.txt by encoding.

Differential Revision: https://reviews.llvm.org/D132044
2022-08-18 12:39:34 +03:00
Matthias Springer 3f914d84c3 [mlir][bufferize] Better error handling: Fail if ToMemrefOps are found
bufferization.to_memref ops are not supported in One-Shot Analysis. They often trigger a failed assertion that can be confusing. Instead, scan for to_memref ops before running the analysis and immediately abort with a proper error message.

Differential Revision: https://reviews.llvm.org/D132027
2022-08-18 11:37:57 +02:00
zhongyunde 319fd6a69c [NFC][AArch64] precommit sched model for tsv110
Part of the schedule model is not accurate, so need a initial test record the changes.
This assemble list is refer to the basic part of D128631

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D132103
2022-08-18 17:33:45 +08:00
Mats Petersson 5334a6337d [MLIR][NFC] Sort table of operations alphabetically
Arrange the operations in alphabetical order, rather than what
appears to be the order they were added. This was suggested in
a review when adding new operations.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D132046
2022-08-18 10:31:27 +01:00
Rainer Orth ca98e0dd6c [mlir][test] Require JIT support in JIT tests
A number of mlir tests `FAIL` on Solaris/sparcv9 with `Target has no JIT
support`.  This patch fixes that by mimicing `clang/test/lit.cfg.py` which
implements a `host-supports-jit` keyword for this.  The gtest-based unit
tests don't support `REQUIRES:`, so lack of support needs to be hardcoded
there.

Tested on `amd64-pc-solaris2.11` (`check-mlir` results unchanged) and
`sparcv9-sun-solaris2.11` (only one unrelated failure left).

Differential Revision: https://reviews.llvm.org/D131151
2022-08-18 11:26:07 +02:00
Uday Bondhugula d7ac92f27b [MLIR] Remove hardcoded usage of alloc/dealloc; use memory effects
Remove hardcoded usage of memref.alloc/dealloc ops in affine utils; use memory
effects instead. This is NFC for existing test cases, but strictly more
general/powerful in terms of functionality: it allows other allocation and
freeing ops (like gpu.alloc/dealloc) to work in conjunction with affine ops and
utilities.

Differential Revision: https://reviews.llvm.org/D132011
2022-08-18 14:46:03 +05:30
Güray Özen 85882e7d64 [mlir][Vector] Support 0-D vectors in ReductionOp
This commit adds support for 0-D vectors in ReductionOp.

Reviewed By: nicolasvasilache, dcaballe

Differential Revision: https://reviews.llvm.org/D131896
2022-08-18 09:12:47 +00:00
Haohai Wen f4410d471f [X86] Add schedule module for Alderlake-P
The X86SchedAlderlakeP.td file is automatically generated by schedtool
(D130897). Most of instruction's scheduling information is based on
measured ADL-P data in uops.info. Some data is from GLC tpt/lat data
provided by intel doc. The rest instruction's scheduling information is
from skylake client schedule model in order to get a relative complete
model.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D130959
2022-08-18 16:40:14 +08:00
Utkarsh Saxena 0e0e8b6576 Do not evaluate dependent immediate invocations
We deferred the evaluation of dependent immediate invocations in https://reviews.llvm.org/D119375 until instantiation.
We should also not consider them referenced from a non-consteval context.

Fixes: https://github.com/llvm/llvm-project/issues/55601

```
template<typename T>
class Bar {
  consteval static T x() { return 5; }
 public:
  Bar() : a(x()) {}

 private:
  int a;
};

Bar<int> g();
```
Is now accepted by clang. Previously it errored with: `cannot take address of consteval function 'x' outside of an immediate invocation  Bar() : a(x()) {}`

Differential Revision: https://reviews.llvm.org/D132031
2022-08-18 10:30:40 +02:00
Vitaly Buka e9c5bde88e [tsan] Keep thread/stack for closed FD
Fixes b/242869837

Reviewed By: dvyukov

Differential Revision: https://reviews.llvm.org/D132068
2022-08-18 01:29:29 -07:00
Petr Hosek 6741f0f912 Revert "[Driver] Support libc++ in MSVC"
This reverts commit a4230319f7.

This is causing build failures in the 2-stage build.
2022-08-18 08:22:43 +00:00
gonglingqin 36038b5cb6 [LoongArch] Supports brcond with 21 bit offsets
Differential Revision: https://reviews.llvm.org/D132006
2022-08-18 15:55:50 +08:00
wanglian 989ebc1783 [DAGCombiner][NFC] Tidy up unnecessary brackets in visitADD.
Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D132107
2022-08-18 15:48:22 +08:00
Daniel Bertalan 11443ef85d [llvm-objdump] Support dumping segment information with -chained_fixups
This commit adds the definitions for `dyld_chained_starts_in_image`,
`dyld_chained_starts_in_segment`, and related enums. Dumping their
contents is possible with the -chained_fixups flag of llvm-otool.

The chained-fixups.yaml test was changed to cover bindings/rebases, as
well as weak imports, weak symbols and flat namespace symbols. Now that
we have actual fixup entries, the __DATA segment contains data that
would need to be hexdumped in YAML. We also test empty pages (to look
for the "DYLD_CHAINED_PTR_START_NONE" annotation), so the YAML would end
up quite large. So instead, this commit includes a binary file.

When Apple's effort to upstream their chained fixups code continues,
we'll replace this code with the then-upstreamed code. But we need
something in the meantime for testing ld64.lld's chained fixups code.

Differential Revision: https://reviews.llvm.org/D131961
2022-08-18 09:29:27 +02:00
David Blaikie ed342d9d29 Add missing bazel dep 2022-08-18 07:13:19 +00:00
Vitaly Buka fae656b2dd [test] Add 'hwasan' feature and disable a test 2022-08-17 23:50:35 -07:00
Vitaly Buka 4ceff69636 [test][Sema] Ignore stderr in test
Mixing stdout and stderr may break lines we try to match.
2022-08-17 23:50:35 -07:00
Valentin Clement 56d856c195
[flang] Add specific TODO for the REDUCE instrinsic
Add a proper TODO for the REDUCE instrinsic instead of crashing.

Reviewed By: PeteSteinfeld, vdonaldson

Differential Revision: https://reviews.llvm.org/D132020
2022-08-18 07:53:47 +02:00
WANG Xuerui 929d201b7a [LoongArch] Add support for llvm.eh.dwarf.cfa
It's the same as D126181 for RISCV.

Differential Revision: https://reviews.llvm.org/D132012
2022-08-18 13:17:49 +08:00
Timm Bäder a2a5470fc2 [clang][Interp] Implement boolean and nullptr literals
Handle CXX bool literals as well as nullptr literals and add a few tests
for each.

Differential Revision: https://reviews.llvm.org/D131942
2022-08-18 07:11:48 +02:00
WuXinlong 515ece1a90 [RISCV] Add MC support of RISCV Zca Extension
This patch adds support for part of Zc extension which will be frozen soon.

This extension is designed to continue reducing the binary size of RISC-V programs.
In this patch:
`Zca` is a subset of C extension instructions that are compatible with the Zc extension.

The spec of Zc ext is [[ https://github.com/riscv/riscv-code-size-reduction/releases | Here ]]

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D130141
2022-08-18 12:13:35 +08:00
Petr Hosek a4230319f7 [Driver] Support libc++ in MSVC
This implements support for using libc++ headers in MSVC toolchain.
We only support libc++ headers that are part of the toolchain, and
not headers installed elsewhere on the system.

Differential Revision: https://reviews.llvm.org/D101479
2022-08-18 04:04:40 +00:00
Amir Ayupov e33599371e [BOLT][NFC] Reformat strings in handleRelocation
With reduced indentation, some strings can be reformatted to take less lines.
Also strategically apply `formatv` to shorten them.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D132088
2022-08-17 20:45:18 -07:00
Amir Ayupov 70d0134f1d [BOLT][NFC] Split out handleRelocation
Split out the body of a for-loop in `RewriteInstance::readRelocations` into a
separate function (`handleRelocation`). It's still over 300 lines of code,
so it's worth splitting down further.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D132078
2022-08-17 20:43:51 -07:00
wanglian 230e277dfe [DAGCombiner][NFC] Merge two if statement into one.
Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D131941
2022-08-18 10:12:35 +08:00
Vitaly Buka 3f5f2905c4 [test] Propagate HWASAN_OPTIONS 2022-08-17 18:59:49 -07:00
Vitaly Buka 36c9f5a58b [NFC][OpenMP] Simplify 2f9be69d84 2022-08-17 18:59:48 -07:00
Konstantina 5bc8791187 [NewGVN][PHIOFOPS] Bail out if an operand is in OpSafeForPHIOfOps but it is not safe for the current basic block.
NewGVN tables are not cleared out between the initial run of NewGVN and the verification. In case of phi-of-ops optimization, OpSafeForPHIOfOps goes out of sync between the two runs. One operand might not be safe for one basic block, but it might be safe for one of its successors. In this case, the operand will be added in OpSafeForPHIOfOps map. In verification phase, we reuse OpSafeForPHIOfOps without updating it again. As a result, the operand will be considered safe for phi-of-ops optimization even for the case that it is not. This patch fixes this problem.

Fix for 53807.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D130910
2022-08-17 18:57:46 -07:00
Jakub Kuderski 95c4e51839 [mlir][spirv] Add arith.addi_carry to spv.IAddCarry conversion
Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D131908
2022-08-17 21:33:34 -04:00
Lang Hames 2bf87a4946 [ORC][MachO] Fix MachOPlatform after 9189a26664.
Commit 9189a26664 caused llvm-jitlink to create bare JITDylibs to wrap real
dylibs loaded via -preload. This exposed a bug in MachOPlatform where we
assumed that all JITDylibs had been registered with the platform through
MachOPlatform::setupJITDylib (bare JITDylibs are _not_ run through this
function), and errored out where this was not the case.
This bug in MachOPlatform was causing test failures in compilert-rt:

Failed Tests (2):
  ORC-x86_64-darwin :: TestCases/Darwin/x86-64/trivial-objc-methods.S
  ORC-x86_64-darwin :: TestCases/Darwin/x86-64/trivial-swift-types-section.S

This commit fixes the issue by skipping JITDylibs that haven't been registered
with the platform via MachOPlatform::setupJITDylib.
2022-08-17 18:18:48 -07:00
Sam Clegg fa306f1396 [WebAssembly] WebAssemblyLowerEmscriptenEHSjLj: Fix signature of malloc in wasm64 mode
Differential Revision: https://reviews.llvm.org/D132091
2022-08-17 18:16:34 -07:00
Amir Ayupov 330eec139e [BOLT][UTILS] Add nfc-check-setup --switch-back option
Add an option to switch repo revision back, handling stashing automatically.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D128243
2022-08-17 17:37:27 -07:00
Aart Bik e3d64ccf9f [mlir][sparse] more concise sparse tensor type printing
This change omits default values from the sparse tensor type,
saving considerable text real estate for the common cases.

Reviewed By: Peiming

Differential Revision: https://reviews.llvm.org/D132083
2022-08-17 17:35:50 -07:00
Amir Ayupov 055f9f6d08 [BOLT][NFC] Simplify debug logging in case of JT heuristic failure
Move logging into LLVM_DEBUG scope.
Remove redundant printing of jump table parents:

Old logging:
```
failed to analyze jump table in function _ZN12_GLOBAL__N_116InitHeaderSearch23Ad
dDefaultCIncludePathsERKN4llvm6TripleERKN5clang19HeaderSearchOptionsE/1(*2)
PIC Jump table JUMP_TABLE/_ZN12_GLOBAL__N_116InitHeaderSearch23AddDefaultCInclud
ePathsERKN4llvm6TripleERKN5clang19HeaderSearchOptionsE/1.1 for function _ZN12_GL
OBAL__N_116InitHeaderSearch23AddDefaultCIncludePathsERKN4llvm6TripleERKN5clang19
HeaderSearchOptionsE/1(*2) at 0x65996e0 with a total count of 0:
  0x9dc

next jump table at 0x659a810 belongs to function _ZN5clang5Lexer40LexDependencyD
irectiveTokenWhileSkippingERNS_5TokenE
PIC Jump table JUMP_TABLE/_ZN5clang5Lexer40LexDependencyDirectiveTokenWhileSkipp
ingERNS_5TokenE.0 for function _ZN5clang5Lexer40LexDependencyDirectiveTokenWhile
SkippingERNS_5TokenE at 0x659a810 with a total count of 0:

jump table heuristic failure
```

New logging:
```
failed to analyze PIC Jump table JUMP_TABLE/_ZN12_GLOBAL__N_116InitHeaderSearch2
3AddDefaultCIncludePathsERKN4llvm6TripleERKN5clang19HeaderSearchOptionsE/1.1 for
function _ZN12_GLOBAL__N_116InitHeaderSearch23AddDefaultCIncludePathsERKN4llvm6T
ripleERKN5clang19HeaderSearchOptionsE/1(*2) at 0x65996e0 with a total count of 0:
  absolute offset: 0x52ac58c

next PIC Jump table JUMP_TABLE/_ZN5clang5Lexer40LexDependencyDirectiveTokenWhile
SkippingERNS_5TokenE.0 for function _ZN5clang5Lexer40LexDependencyDirectiveToken
WhileSkippingERNS_5TokenE at 0x659a810 with a total count of 0:

jump table heuristic failure
```

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D131243
2022-08-17 17:35:16 -07:00
Amir Ayupov cdef841fe7 [BOLT][NFC] Simplify scanExternalRefs
Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D132013
2022-08-17 17:33:59 -07:00
Alexander Yermolovich ccbf28b09d [BOLT][DWARF] Handle zero size DW_TAG_inlined_subroutine
We were resetting DW_AT_low_pc to zero when DW_AT_high_pc was zero, or
DW_AT_low_pc == DW_AT_high_pc. This resulted in LLDB to print error "adding
range [0x0-0x0) which has a base that is less than the function's low PC".

Changed it so that when this case arises we set DW_AT_low_pc to the start
address.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D132059
2022-08-17 17:29:53 -07:00
Luo, Yuanke 28733d86cf [amdgpu] Change the RA to basic
Specifying `-regalloc=fast` is not reliable. With fast register allocation,
`LIS = getAnalysisIfAvailable<LiveIntervals>();` get nullptr
in "si-lower-sgpr-spills" pass, so the slot index is not created in the
pass for new inserted instructions. When verifying the machine
instructions, it fails on checking slot index. While greedy-ra is time
consuming basic-ra can be used to reduce compiling time for this test case.

Differential Revision: https://reviews.llvm.org/D131931
2022-08-18 08:16:19 +08:00