Commit Graph

302489 Commits

Author SHA1 Message Date
Erich Keane f1005012c2 Multiversioning- Ensure all MV functions are emitted.
Multiverson function versions are always used (by the resolver), so ensure that
they are always emitted.

Change-Id: I5d2e0841fddf0d18918b3fb92ae76814add7ee96
llvm-svn: 345839
2018-11-01 15:11:43 +00:00
Erich Keane 9e94c18abe CPU-Dispatch- Fix type of a member function, prevent deferrals
The member type creation for a cpu-dispatch function was not correctly
including the 'this' parameter, so ensure that the type is properly
determined. Also, disable defer in the cases of emitting the functoins,
as it can end up resulting in the wrong version being emitted.

Change-Id: I0b8fc5e0b0d1ae1a9d98fd54f35f27f6e5d5d083
llvm-svn: 345838
2018-11-01 15:11:41 +00:00
Zachary Turner 7ba905635f [MS Demangler] Expose the Demangler AST publicly.
LLDB would like to use this in order to build a clang AST from
a mangled name.

This is NFC otherwise.

llvm-svn: 345837
2018-11-01 15:07:32 +00:00
Simon Pilgrim d5d7224355 [X86][X86FixupLEA] Rename processInstructionForSLM to processInstructionForSlowLEA (NFCI)
The function isn't SLM specific (its driven by the FeatureSlowLEA flag).

Minor tidyup prior to PR38225.

llvm-svn: 345836
2018-11-01 14:57:07 +00:00
Tim Northover 2ef8096a5c Logging: put link against libclangAnalysis rather than libLLVMAnalysis for os_log
llvm-svn: 345835
2018-11-01 14:43:35 +00:00
Louis Dionne 8df1d5a546 [libcxx] Fix usage of _C2, which is a "nasty macro" in some environments
The problem was pointed out in https://reviews.llvm.org/D48896#inline-475775.

llvm-svn: 345834
2018-11-01 14:41:37 +00:00
Tim Northover 32aabc5585 Logging: add CMake dependency so libAST can use OSLog analysis.
Should fix bots on platforms with slightly different symbol resolution
semantics.

llvm-svn: 345833
2018-11-01 14:22:20 +00:00
Sanjay Patel 746ebb4ee8 [InstSimplify] fold icmp based on range of abs/nabs (2nd try)
This is retrying the fold from rL345717 
(reverted at rL347780)
...with a fix for the miscompile
demonstrated by PR39510:
https://bugs.llvm.org/show_bug.cgi?id=39510

Original commit message:

This is a fix for PR39475:
https://bugs.llvm.org/show_bug.cgi?id=39475

We managed to get some of these patterns using computeKnownBits in https://reviews.llvm.org/D47041, but that
can't be used for nabs(). Instead, put in some range-based logic, so we can fold
both abs/nabs with icmp with a constant value.

Alive proofs:
https://rise4fun.com/Alive/21r

Name: abs_nsw_is_positive

  %cmp = icmp slt i32 %x, 0
  %negx = sub nsw i32 0, %x
  %abs = select i1 %cmp, i32 %negx, i32 %x
  %r = icmp sgt i32 %abs, -1
    =>
  %r = i1 true


Name: abs_nsw_is_not_negative

  %cmp = icmp slt i32 %x, 0
  %negx = sub nsw i32 0, %x
  %abs = select i1 %cmp, i32 %negx, i32 %x
  %r = icmp slt i32 %abs, 0
    =>
  %r = i1 false


Name: nabs_is_negative_or_0

  %cmp = icmp slt i32 %x, 0
  %negx = sub i32 0, %x
  %nabs = select i1 %cmp, i32 %x, i32 %negx
  %r = icmp slt i32 %nabs, 1
    =>
  %r = i1 true

Name: nabs_is_not_over_0

  %cmp = icmp slt i32 %x, 0
  %negx = sub i32 0, %x
  %nabs = select i1 %cmp, i32 %x, i32 %negx
  %r = icmp sgt i32 %nabs, 0
    =>
  %r = i1 false

Differential Revision: https://reviews.llvm.org/D53844

llvm-svn: 345832
2018-11-01 14:07:39 +00:00
Sanjay Patel 056807b01e [InstSimplify] add tests for icmp fold bug (PR39510); NFC
Verify that set intersection/subset are not confused.

llvm-svn: 345831
2018-11-01 14:03:22 +00:00
Aleksandar Beserminji b9c840c9f0 [mips][micromips] Fix JmpLink to TargetExternalSymbol
When matching MipsISD::JmpLink t9, TargetExternalSymbol:i32'...',
wrong JALR16_MM is selected. This patch adds missing pattern for
JmpLink, so that JAL instruction is selected.

Differential Revision: https://reviews.llvm.org/D53366

llvm-svn: 345830
2018-11-01 13:57:54 +00:00
Benjamin Kramer 5223624e81 [ADT] Clean up SparseBitVector copying and make it moveable
llvm-svn: 345829
2018-11-01 13:55:59 +00:00
Tim Northover a94ecc619b Logging: make os_log buffer size an integer constant expression.
The size of an os_log buffer is known at any stage of compilation, so making it
a constant expression means that the common idiom of declaring a buffer for it
won't result in a VLA. That allows the compiler to skip saving and restoring
the stack pointer around such buffers.

llvm-svn: 345828
2018-11-01 13:49:54 +00:00
Chad Rosier 1546efd4a7 [AArch64] Add support for ARMv8.4 in Saphira.
llvm-svn: 345827
2018-11-01 13:45:16 +00:00
Erich Keane 44731c5300 CPU-Dispatch-- Fix conflict between 'generic' and 'pentium'
When a dispatch function was being emitted that had both a generic and a
pentium configuration listed, we would assert.  This is because neither
configuration has any 'features' associated with it so they were both
considered the 'default' version.  'pentium' lacks any features because
we implement it in terms of __builtin_cpu_supports (instead of Intel
proprietary checks), which is unable to decern between the two.

The fix for this is to omit the 'generic' version from the dispatcher if
both are present. This permits existing code to compile, and still will
choose the 'best' version available (since 'pentium' is technically
better than 'generic').

Change-Id: I4b69f3e0344e74cbdbb04497845d5895dd05fda0
llvm-svn: 345826
2018-11-01 12:50:37 +00:00
Sven van Haastregt 4fbf1ab165 Allow clk_event_t comparisons
Also rename `invalid-clk-events-cl2.0.cl` to `clk_event_t.cl` and
repurpose it to include both positive and negative clk_event_t tests.

Differential Revision: https://reviews.llvm.org/D53871

llvm-svn: 345825
2018-11-01 12:43:00 +00:00
Simon Pilgrim 1f0a8421ad [X86][SSE] Move 2-input limit up from getFauxShuffleMask to resolveTargetShuffleInputs (reapplied)
Reapplying an updated version of rL345395 (reverted in rL345451), now the issues noticed in PR39483 have been fixed. 

This patch allows resolveTargetShuffleInputs to remove UNDEF inputs from cases where we have more than 2 inputs.

llvm-svn: 345824
2018-11-01 11:52:09 +00:00
Aaron Ballman fa28f335b8 Update to the 10-10 SARIF spec.
This removes the Step property (which can be calculated by consumers trivially), and updates the schema and version numbers accordingly.

llvm-svn: 345823
2018-11-01 11:52:07 +00:00
Max Kazantsev bb84407f3d [NFC] Specialize public API of ICFLoopSafetyInfo for insertions and removals
llvm-svn: 345822
2018-11-01 10:16:06 +00:00
Stefan Maksimovic cd0c50e3d2 [Mips] Conditionally remove successor block
In MipsBranchExpansion::splitMBB, upon splitting
a block with two direct branches, remove the successor
of the newly created block (which inherits successors from
the original block) which is pointed to by the last
branch in the original block only if the targets of two
branches differ.

This is to fix the failing test when ran with
-verify-machineinstrs enabled.

Differential Revision: https://reviews.llvm.org/D53756

llvm-svn: 345821
2018-11-01 10:10:42 +00:00
Max Kazantsev 46955b58ee [NFC] Reorganize code to prepare it for more transforms
llvm-svn: 345820
2018-11-01 09:42:50 +00:00
George Rimar 3608decaa5 [ELF] - Do not crash when -r output uses linker script with `/DISCARD/`
This is https://bugs.llvm.org/show_bug.cgi?id=39493.

We crashed previously because did not handle /DISCARD/ properly
when -r was used. I think it is uncommon to use scripts with -r, though I see
nothing wrong to handle the /DISCARD/ so that we will not crash at least.

Differential revision: https://reviews.llvm.org/D53864

llvm-svn: 345819
2018-11-01 09:20:06 +00:00
Jonas Paulsson 6749c24f40 [SystemZ::TTI] Recognize the higher cost of scalar i1 -> fp conversion
Scalar i1 to fp conversions are done with a branch sequence, so it should
have a higher cost.

Review: Ulrich Weigand
https://reviews.llvm.org/D53924

llvm-svn: 345818
2018-11-01 09:05:32 +00:00
Jonas Paulsson f15a53bc81 [SystemZ::TTI] Accurate costs for i1->double vector conversions
This factors out a new method getBoolVecToIntConversionCost() containing the
code for vector sext/zext of i1, in order to reuse it for i1 to double vector
conversions.

Review: Ulrich Weigand
https://reviews.llvm.org/D53923

llvm-svn: 345817
2018-11-01 09:01:51 +00:00
Roman Lebedev 1bb9aea56b [clang][CodeGen] ImplicitIntegerSignChangeSanitizer: actually ignore NOP casts.
I fully expected for that to be handled by the canonical type check,
but it clearly wasn't. Sadly, somehow it hide until now.

Reported by Eli Friedman.

llvm-svn: 345816
2018-11-01 08:56:51 +00:00
Aleksandr Urakov 9d5b2d4adc [Windows] A basic implementation of memory allocations in a debuggee process
Summary:
This patch adds a basic implementation of `DoAllocateMemory` and
`DoDeallocateMemory` for Windows processes. For now it considers only the
executable permission (and always allows reads and writes).

Reviewers: zturner, asmith, stella.stamenova, labath, clayborg

Reviewed By: zturner

Subscribers: Hui, vsk, jingham, aleksandr.urakov, clayborg, abidh, teemperor, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D52618

llvm-svn: 345815
2018-11-01 08:54:38 +00:00
Max Kazantsev 3d347bf545 [IndVars] Smart hard uses detection
When rewriting loop exit values, IndVars considers this transform not profitable if
the loop instruction has a loop user which it believes cannot be optimized away.
In current implementation only calls that immediately use the instruction are considered
as such.

This patch extends the definition of "hard" users to any side-effecting instructions
(which usually cannot be optimized away from the loop) and also allows handling
of not just immediate users, but use chains.

Differentlai Revision: https://reviews.llvm.org/D51584
Reviewed By: etherzhhb

llvm-svn: 345814
2018-11-01 06:47:01 +00:00
Max Kazantsev e0a2613aea [SCEV] Avoid redundant computations when doing AddRec merge
When we calculate a product of 2 AddRecs, we end up making quite massive
computations to deduce the operands of resulting AddRec. This process can
be optimized by computing all args of intermediate sum and then calling
`getAddExpr` once rather than calling `getAddExpr` with intermediate
result every time a new argument is computed.

Differential Revision: https://reviews.llvm.org/D53189
Reviewed By: rtereshin

llvm-svn: 345813
2018-11-01 06:18:27 +00:00
Jonas Devlieghere 59b78bcba2 [FileSystem] Remove GetByteSize() from FileSpec
This patch removes the GetByteSize method from FileSpec and updates its
uses with calls to the FileSystem.

Differential revision: https://reviews.llvm.org/D53788

llvm-svn: 345812
2018-11-01 04:45:28 +00:00
Zachary Turner 56a5a0c3ce [CodeView] Emit the correct TypeIndex for std::nullptr_t.
The TypeIndex used by cl.exe is 0x103, which indicates a SimpleTypeMode
of NearPointer (note the absence of the bitness, normally pointers use a
mode of NearPointer32 or NearPointer64) and a SimpleTypeKind of void.
So this is basically a void*, but without a specified size, which makes
sense given how std::nullptr_t is defined.

clang-cl was actually not emitting *anything* for this. Instead, when we
encountered std::nullptr_t in a DIType, we would actually just emit a
TypeIndex of 0, which is obviously wrong.

std::nullptr_t in DWARF is represented as a DW_TAG_unspecified_type with
a name of "decltype(nullptr)", so we add that logic along with a test,
as well as an update to the dumping code so that we no longer print
void* when dumping 0x103 (which would previously treat Void/NearPointer
no differently than Void/NearPointer64).

Differential Revision: https://reviews.llvm.org/D53957

llvm-svn: 345811
2018-11-01 04:02:41 +00:00
Li Jia He 03170a904f [PowerPC] Support constraint 'wi' in asm
From the gcc manual, we can see that the specific limit of wi inline asm is “FP or VSX register to hold 64-bit integers for VSX insns or NO_REGS”. The link is https://gcc.gnu.org/onlinedocs/gcc-8.2.0/gcc/Machine-Constraints.html#Machine-Constraints. We should accept this constraint.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D53265

llvm-svn: 345810
2018-11-01 02:35:17 +00:00
Li Jia He bbaedf2ba1 [Clang][PowerPC] Support constraint 'wi' in asm
From the gcc manual, we can see that the specific limit of wi inline asm is “FP or VSX register to hold 64-bit integers for VSX insns or NO_REGS”. The link is https://gcc.gnu.org/onlinedocs/gcc-8.2.0/gcc/Machine-Constraints.html#Machine-Constraints. We should accept this constraint.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D53265

llvm-svn: 345809
2018-11-01 02:32:49 +00:00
Mandeep Singh Grang be0e78e017 [COFF, ARM64] Implement llvm.addressofreturnaddress intrinsic
llvm-svn: 345808
2018-11-01 01:35:34 +00:00
Artem Dergachev e21aff2b22 [analyzer] SARIF: Suppress version testing in a more downstream-friendly manner.
No functional change intended.

llvm-svn: 345807
2018-11-01 01:27:01 +00:00
Sam Clegg c1a3b9d51a [WebAssembly] Remove duplicate function. NFC.
Differential Revision: https://reviews.llvm.org/D53963

llvm-svn: 345806
2018-11-01 01:08:37 +00:00
Richard Smith 2902989774 Fix typo in comment.
llvm-svn: 345805
2018-11-01 01:05:00 +00:00
Thomas Lively 6940328d02 [WebAssembly] Fix type names in truncation builtins
Summary: Use the same convention as all the other WebAssembly builtin names.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, kristina, cfe-commits

Differential Revision: https://reviews.llvm.org/D53724

llvm-svn: 345804
2018-11-01 01:03:17 +00:00
Richard Smith 17f00260ab Fix regression in behavior of clang -x c++-header -fmodule-name=XXX
-fsyntax-only.

The driver accidentally stopped passing the input filenames on to -cc1
in this mode due to confusion over what action was being requested.

This change also fixes a couple of crashes I encountered when passing
multiple files to such a -cc1 invocation.

llvm-svn: 345803
2018-11-01 00:46:54 +00:00
Artem Dergachev 32c0c85382 [analyzer] pr39348: MallocChecker: Realize that sized delete isn't custom delete.
MallocChecker no longer thinks that operator delete() that accepts the size of
the object to delete (available since C++14 or under -fsized-deallocation)
is some weird user-defined operator. Instead, it handles it like normal delete.

Additionally, it exposes a regression in NewDelete-intersections.mm's
testStandardPlacementNewAfterDelete() test, where the diagnostic is delayed
from before the call of placement new into the code of placement new
in the header. This happens because the check for pass-into-function-after-free
for placement arguments is located in checkNewAllocator(), which happens after
the allocator is inlined, which is too late. Move this use-after-free check
into checkPreCall instead, where it works automagically because the guard
that prevents it from working is useless and can be removed as well.

This commit causes regressions under -analyzer-config
c++-allocator-inlining=false but this option is essentially unsupported
because the respective feature has been enabled by default quite a while ago.

Differential Revision: https://reviews.llvm.org/D53543

llvm-svn: 345802
2018-11-01 00:43:35 +00:00
Matthias Braun a9f900561e X86: Consistently declare pass initializers in X86.h; NFC
This avoids declaring them twice: in X86TargetMachine.cpp and the file
implementing the pass.

llvm-svn: 345801
2018-11-01 00:38:01 +00:00
Jonas Devlieghere 35e4c84c1f [FileSystem] Move EnumerateDirectory from FileSpec to FileSystem.
This patch moves the EnumerateDirectory functionality and related enum
and typedef from FileSpec to FileSystem.

This is part of a set of patches that extracts file system related
convenience methods from FileSpec. The long term goal is to remove this
method altogether and use the iterators directly, but for introducing
the VFS into LLDB this change is sufficient.

Differential revision: https://reviews.llvm.org/D53785

llvm-svn: 345800
2018-11-01 00:33:27 +00:00
Jonas Devlieghere 9ca491da2f [FileSystem] Re-add EnumerateDirectory
Re-enable EnumerateDirectory now that no_push is available in llvm (r345793).

llvm-svn: 345799
2018-11-01 00:26:09 +00:00
Dean Michael Berris 6b67ff0300 [XRay] Add CPU ID in Custom Event FDR Records
Summary:
This change cuts across compiler-rt and llvm, to increment the FDR log
version number to 4, and include the CPU ID in the custom event records.

This is a step towards allowing us to change the `llvm::xray::Trace`
object to start representing both custom and typed events in the stream
of records. Follow-on changes will allow us to change the kinds of
records we're presenting in the stream of traces, to incorporate the
data in custom/typed events.

A follow-on change will handle the typed event case, where it may not
fit within the 15-byte buffer for metadata records.

This work is part of the larger effort to enable writing analysis and
processing tools using a common in-memory representation of the events
found in traces. The work will focus on porting existing tools in LLVM
to use the common representation and informing the design of a
library/framework for expressing trace event analysis as C++ programs.

Reviewers: mboerger, eizan

Subscribers: hiraditya, mgrang, llvm-commits

Differential Revision: https://reviews.llvm.org/D53920

llvm-svn: 345798
2018-11-01 00:18:52 +00:00
Thomas Lively d4891a1b7a [WebAssembly] Lower vselect
Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53630

llvm-svn: 345797
2018-11-01 00:01:02 +00:00
Reid Kleckner dffe5a3807 Compile and test i128 math builtins for Win64
Summary:
Windows has always been LLP64, not LP64, so the macros were incorrect.
Check for _WIN64, since AArch64 sets that too.

The tests have to be fixed up in two main ways:
1. Use 'ULL' suffixes to avoid sign extension when passing hex literals
   with the sign bit set to signed 128 arguments. Clang
   -fms-compatibility makes such hex literals signed, not unsigned.
2. Disable various tests for 80-bit long double interoperation with i128
   values.

Reviewers: joerg, mstorsjo

Subscribers: javed.absar, kristof.beyls, hiraditya, aheejin, llvm-commits

Differential Revision: https://reviews.llvm.org/D53918

llvm-svn: 345796
2018-11-01 00:00:03 +00:00
Thomas Lively b61232eacd [WebAssembly] Process p2align operands for SIMD loads and stores
Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53886

llvm-svn: 345795
2018-10-31 23:58:20 +00:00
Thomas Lively 6ff31fe34d [WebAssembly] Handle vector IMPLICIT_DEFs.
Summary:
Also reduce the test case for implicit defs and test it with all
register classes.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53855

llvm-svn: 345794
2018-10-31 23:50:53 +00:00
Jonas Devlieghere 41fb951f87 [VFS] Add support for "no_push" to VFS recursive iterators.
The "regular" file system has a useful feature that makes it possible to
stop recursing when using the recursive directory iterators. This
functionality was missing for the VFS recursive iterator and this patch
adds that.

Differential revision: https://reviews.llvm.org/D53465

llvm-svn: 345793
2018-10-31 23:36:10 +00:00
Mandeep Singh Grang e7c7934a11 [COFF, ARM64] Change setjmp for AArch64 Windows to use Intrinsic.sponentry
Summary: ARM64 setjmp expects sp on entry instead of framepointer.

Reviewers: mgrang, rnk, TomTan, compnerd, mstorsjo, efriedma

Reviewed By: mstorsjo

Subscribers: javed.absar, kristof.beyls, chrib, cfe-commits

Differential Revision: https://reviews.llvm.org/D53684

llvm-svn: 345792
2018-10-31 23:17:36 +00:00
Mandeep Singh Grang 88ad9ac720 [COFF, ARM64] Implement Intrinsic.sponentry for AArch64
Summary: This patch adds Intrinsic.sponentry. This intrinsic is required to correctly support setjmp for AArch64 Windows platform.

Reviewers: mgrang, TomTan, rnk, compnerd, mstorsjo, efriedma

Reviewed By: efriedma

Subscribers: majnemer, chrib, javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D53673

llvm-svn: 345791
2018-10-31 23:16:20 +00:00
Eli Friedman d548f0a214 [IR] Allow increasing the alignment of dso-local globals.
I think this is the actual important property; the previous visibility
check was an approximation.

Differential Revision: https://reviews.llvm.org/D53852

llvm-svn: 345790
2018-10-31 23:03:58 +00:00