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27813 Commits

Author SHA1 Message Date
Chris Lattner c9fa36d706 implement preinc support for r+i loads on ppc64 
llvm-svn: 31654
 2006-11-10 23:58:45 +00:00
Chris Lattner d4dee405cb Fix InstCombine/2006-11-10-ashr-miscompile.ll a miscompilation introduced 
by the shr -> [al]shr patch.  This was reduced from 176.gcc.

llvm-svn: 31653
 2006-11-10 23:38:52 +00:00
Chris Lattner d530a503da This testcase is miscompiled by instcombine, reduced from 176.gcc 
llvm-svn: 31652
 2006-11-10 23:37:54 +00:00
Evan Cheng 915026cdc3 Add a note. 
llvm-svn: 31650
 2006-11-10 22:09:17 +00:00
Evan Cheng 5b725a71a9 These are done. 
llvm-svn: 31649
 2006-11-10 22:03:35 +00:00
Evan Cheng 49683ba236 Don't dag combine floating point select to max and min intrinsics. Those 
take v4f32 / v2f64 operands and may end up causing larger spills / restores.
Added X86 specific nodes X86ISD::FMAX, X86ISD::FMIN instead.

This fixes PR996.

llvm-svn: 31645
 2006-11-10 21:43:37 +00:00
Chris Lattner 4eac5f59e6 Fix a dag combiner bug exposed by my recent instcombine patch. This fixes 
CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast

llvm-svn: 31644
 2006-11-10 21:37:15 +00:00
Chris Lattner 82a85b66a3 new testcase 
llvm-svn: 31643
 2006-11-10 21:36:07 +00:00
Devang Patel 0ed477969f s/PassManagerAnalysisHelper/CommonPassManagerImpl 
Inherit CommonPassManagerImpl from Pass.

llvm-svn: 31642
 2006-11-10 21:33:13 +00:00
Evan Cheng fb44822a98 Fix a bug in SelectScalarSSELoad. Since the load is wrapped in a 
SCALAR_TO_VECTOR, even if the hasOneUse() check pass we may end up folding
the load into two instructions. Make sure we check the SCALAR_TO_VECTOR
has only one use as well.

llvm-svn: 31641
 2006-11-10 21:23:04 +00:00
Jim Laskey bc60d34748 Must have a frame pointer argument fixed. Now fails on PowerPC. 
llvm-svn: 31639
 2006-11-10 17:56:29 +00:00
Jim Laskey 11ba2bf721 Must have a frame pointer. 
llvm-svn: 31638
 2006-11-10 17:51:25 +00:00
Chris Lattner 6c8656a6b1 dform 8/9 are identical to dform 1 
llvm-svn: 31637
 2006-11-10 17:51:02 +00:00
Reid Spencer 8488eac9d7 This is XFAILed on i[0-9]86 systems not Linux 
llvm-svn: 31636
 2006-11-10 17:47:28 +00:00
Jim Laskey 0c75372933 Shut up the warning. 
llvm-svn: 31635
 2006-11-10 14:44:12 +00:00
Evan Cheng 286357480c Fix a potential bug. 
llvm-svn: 31634
 2006-11-10 09:13:37 +00:00
Evan Cheng 8c9c6d71ed Add implicit def / use operands to MachineInstr. 
llvm-svn: 31633
 2006-11-10 08:43:01 +00:00
Evan Cheng f5bebe83a5 Add implicit def / use operands to MachineInstr. 
llvm-svn: 31632
 2006-11-10 08:32:14 +00:00
Evan Cheng 13440b025c When forming a pre-indexed store, make sure ptr isn't the same or is a pred of value being stored. It would cause a cycle. 
llvm-svn: 31631
 2006-11-10 08:28:11 +00:00
Anton Korobeynikov a1561d4fdf Adding target triple to test 
llvm-svn: 31630
 2006-11-10 06:59:53 +00:00
Tanya Lattner 1537ecce93 xfail for llvmgcc3 
llvm-svn: 31629
 2006-11-10 04:53:50 +00:00
Chris Lattner d5e604dbb2 commentate 
llvm-svn: 31627
 2006-11-10 04:41:34 +00:00
Chris Lattner ce6455489a add an initial cut at preinc loads for ppc32. This is broken for ppc64 
(because the 64-bit reg target versions aren't implemented yet), doesn't
support r+r addr modes, and doesn't handle stores, but it works otherwise. :)

This is disabled unless -enable-ppc-preinc is passed to llc for now.

llvm-svn: 31621
 2006-11-10 02:08:47 +00:00
Chris Lattner 7a82314782 make this test more interesting 
llvm-svn: 31619
 2006-11-10 02:04:52 +00:00
Chris Lattner ba7b3673f9 allow ptr_rc to explicitly appear in an instructions operand list, it doesn't 
have to be a subpart of a complex operand.

llvm-svn: 31618
 2006-11-10 02:01:40 +00:00
Chris Lattner cd436327f1 add note about ugly codegen with preinc 
llvm-svn: 31617
 2006-11-10 01:33:53 +00:00
Evan Cheng 14140059f0 Use TargetInstrInfo::getNumOperands() instead of MachineInstr::getNumOperands(). In preparation for implicit reg def/use changes. 
llvm-svn: 31616
 2006-11-10 01:28:43 +00:00
Anton Korobeynikov b9c91c265c Fixing PR990: http://llvm.org/PR990. 
This should unbreak csretcc on Linux & mingw targets. Several tests from
llvm-test should be also restored (fftbench, bigfib).

llvm-svn: 31613
 2006-11-10 00:48:11 +00:00
Chris Lattner 4e03cb1945 add a note about viterbi 
llvm-svn: 31612
 2006-11-10 00:23:26 +00:00
Chris Lattner 82928ca290 second patch to fix PR992/993. 
llvm-svn: 31610
 2006-11-09 23:36:08 +00:00
Chris Lattner 8511bd95f5 new testcases for PR992/993 
llvm-svn: 31609
 2006-11-09 23:35:01 +00:00
Chris Lattner 924f4fee8b Minimal patch to fix PR992/PR993 
llvm-svn: 31608
 2006-11-09 23:17:45 +00:00
Reid Spencer 51b07256a3 Post-review changes on conversion instructions. 
llvm-svn: 31607
 2006-11-09 23:03:26 +00:00
Reid Spencer 2e2740d46a Fix runaway <tt> element and section ordering. 
llvm-svn: 31606
 2006-11-09 21:48:10 +00:00
Reid Spencer 8a82cc6304 Remove futurisms that won't be in our future. 
llvm-svn: 31605
 2006-11-09 21:42:14 +00:00
Reid Spencer a89fb18c98 One more time for indentation. 
llvm-svn: 31604
 2006-11-09 21:18:01 +00:00
Reid Spencer 443460a318 Fix indentation problem starting at GEP. 
llvm-svn: 31603
 2006-11-09 21:15:49 +00:00
Chris Lattner 5fdbe55979 if lazy compilation is disabled, print an error message and abort if 
lazy compilation is ever attempted

llvm-svn: 31602
 2006-11-09 19:32:13 +00:00
Chris Lattner 87aee74ccb init ivar 
llvm-svn: 31601
 2006-11-09 19:31:15 +00:00
Chris Lattner 6dbe06de39 allow clients to indicate that they never want lazy compilation. 
llvm-svn: 31600
 2006-11-09 19:30:47 +00:00
Evan Cheng 36a8fbf771 PPC supports i32 / i64 pre-inc load / store. 
llvm-svn: 31599
 2006-11-09 19:11:50 +00:00
Evan Cheng 6878378390 Don't attempt expensive pre-/post- indexed dag combine if target does not support them. 
llvm-svn: 31598
 2006-11-09 19:10:46 +00:00
Evan Cheng d550248f2c Add a mechanism to specify whether a target supports a particular indexed load / store. 
llvm-svn: 31597
 2006-11-09 18:56:43 +00:00
Evan Cheng c034f14fbe Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
llvm-svn: 31596
 2006-11-09 18:44:21 +00:00
Evan Cheng b15000736c Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
llvm-svn: 31595
 2006-11-09 17:55:04 +00:00
Jim Laskey f1606b80f1 Allows debugging llc self hosted. 
llvm-svn: 31594
 2006-11-09 16:32:26 +00:00
Jim Laskey 97f89b11b3 Merging dwarf info to a single compile unit. 
llvm-svn: 31593
 2006-11-09 14:52:14 +00:00
Rafael Espindola 5f7ab1b964 implement load effective address similar to the alpha backend 
remove lea_addri and the now unused memri addressing mode

llvm-svn: 31592
 2006-11-09 13:58:55 +00:00
Jim Laskey 48b21d5024 math.h creates ambiguity 
llvm-svn: 31591
 2006-11-09 08:26:22 +00:00
Jim Laskey 31890e7e86 math.h for C's sake. 
llvm-svn: 31590
 2006-11-09 08:05:39 +00:00