Commit Graph

88585 Commits

Author SHA1 Message Date
Duncan P. N. Exon Smith 520f8542ff Bitcode: Try to emit metadata in function blocks
Whenever metadata is only referenced by a single function, emit the
metadata just in that function block.  This should improve lazy-loading
by reducing the amount of metadata in the global block.

For now, this should catch all DILocations, and anything else that
happens to be referenced only by a single function.

It's also a first step toward a couple of possible future directions
(which this commit does *not* implement):

 1. Some debug info metadata is only referenced from compile units and
    individual functions.  If we can drop the link from the compile
    unit, this optimization will get more powerful.

 2. Any uniqued metadata that isn't referenced globally can in theory be
    emitted in every function block that references it (trading off
    bitcode size and full-parse time vs. lazy-load time).

Note: this assumes the new BitcodeReader error checking from r265223.
The metadata stored in function blocks gets purged after parsing each
function, which means unresolved forward references will get lost.
Since all the global metadata should have already been resolved by the
time we get to the function metadata blocks we just need to check for
that case.  (If for some reason we need to handle bitcode that fails the
checks in r265223, the fix is to store about-to-be-dropped unresolved
nodes in MetadataList::shrinkTo until they can be handled succesfully by
a future call to MetadataList::tryToResolveCycles.)

llvm-svn: 265226
2016-04-02 15:22:57 +00:00
Duncan P. N. Exon Smith 0b76b723f4 Fix doxygen comments from r265224, NFC
llvm-svn: 265225
2016-04-02 15:16:56 +00:00
Duncan P. N. Exon Smith 9342911f31 BitcodeWriter: Further unify function metadata, NFC
Further unify the handling of function-local metadata with global
metadata, by exposing the same interface in ValueEnumerator.  Both
contexts use the same accessors:

  - getMDStrings(): get the strings for this block.
  - getNonMDStrings(): get the non-strings for this block.

A future commit will start adding strings to the function-block.

llvm-svn: 265224
2016-04-02 15:09:42 +00:00
Duncan P. N. Exon Smith 8742de9b20 BitcodeReader: Check for unresolved function metadata
A follow-up commit will start using function metadata blocks more
heavily.  This commit adds some error checking to confirm that metadata
is fully resolved before (and after) materializing each function.

This is valid even when reading very old bitcode from before the
metadata/value split.  The global metadata block always came before the
function blocks.  However, in case somehow this causes a regression
(i.e., an old LLVM did produce such bitcode after all) I'm committing
separately.

llvm-svn: 265223
2016-04-02 14:55:01 +00:00
Mehdi Amini 1e5fddda3d Reverts r265219.
Unintentionally commited... time to call the day off!

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265221
2016-04-02 05:35:03 +00:00
Mehdi Amini 89038a1071 Fix "warning: variabl 'XX’ set but not used" in release build (variable used in assertion, NFC)
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265220
2016-04-02 05:34:19 +00:00
Mehdi Amini 5921a3ae66 wip
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265219
2016-04-02 05:34:14 +00:00
Mehdi Amini b049431bec constify GlobalValue::getGUID() and GlobalValue::getGlobalIdentifier() (NFC)
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265217
2016-04-02 05:25:27 +00:00
Mehdi Amini 024a79f780 Revert "ThinLTO: add module caching handling."
This reverts commit r265214, unintentionally commited.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265216
2016-04-02 05:08:18 +00:00
Mehdi Amini ad5741b075 Create a typedef GlobalValue::GUID for uint64_t and RAUW (NFC)
Summary: This should make the code more readable, especially all the map declarations.

Reviewers: tejohnson

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18721

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265215
2016-04-02 05:07:53 +00:00
Mehdi Amini 2cd609482d ThinLTO: add module caching handling.
Reviewers: tejohnson

Subscribers: llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D18494

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265214
2016-04-02 05:07:08 +00:00
Mehdi Amini e70901552c 80 lines column after renaming "shouldDiscardValueNames" (NFC)
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265212
2016-04-02 03:59:58 +00:00
Mehdi Amini 50af49fcdc Rename Context::discardValueNames() to shouldDiscardValueNames() (NFC)
Suggested by Sean Silva.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265211
2016-04-02 03:46:17 +00:00
Mehdi Amini 27814980a3 Add Cache Pruning support
Incremental LTO will usea cache to store object files.
This patch handles the pruning part of the cache, exposing
a few knobs:

- Pruning interval: the implementation keeps a "timestamp" file in the
  directory and will scan it only after a given interval since the
  last modification of the timestamp file. This is for performance
  purpose, we don't want to scan continuously the folder.
- Entry expiration: this is the time after which a file that hasn't
  been used is remove from the cache.
- Maximum size: expressed in percentage of the available disk space,
  it helps to avoid that we blow up the disk space.

http://reviews.llvm.org/D18422

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265209
2016-04-02 03:28:26 +00:00
Hans Wennborg fa6e414eef Fix -Wpedantic warning about extra semi-colon
llvm-svn: 265204
2016-04-02 01:03:41 +00:00
Rong Xu 0eb3603626 [PGO] Use a helper function to find all indirect call-sites
Use a helper function to find all the direct-calls-sites in a function.
Also split the code into a separated file as this will be use by
indirect-call-promotion transformation.

Differential Revision: http://reviews.llvm.org/D18704

llvm-svn: 265199
2016-04-01 23:16:44 +00:00
Tim Northover 5dad9df9f7 AArch64: avoid clobbering SP for dead MOVimm pseudos.
We were producing ORR, which actually defines a GPR32sp rather than a GPR32.

Should fix PR23209.

llvm-svn: 265198
2016-04-01 23:14:52 +00:00
Nico Weber 73853ab4f8 Make DIASession work if msdia*.dll isn't registered.
This fixes various symbolization test failures for me when I build with a
hermetic VS2015 without having run the 2015 installer.

http://reviews.llvm.org/D18707

llvm-svn: 265193
2016-04-01 22:21:51 +00:00
Mehdi Amini 5a2e5d324e ThinLTO: special handling for LinkOnce functions
These function can be dropped by the compiler if they are no longer
referenced in the current module. However there is a change that
another module is still referencing them because of the import.

Multiple solutions can be used:

- Always import LinkOnce when a caller is imported. This ensure that
  every module with a call to a LinkOnce has the definition and will
  be able to emit it if it emits the call.
- Turn the LinkOnce into Weak, so that it is always emitted.
- Turn all LinkOnce into available_externally and come back after all
  modules are codegen'ed to emit only one copy of the linkonce, when
  there is still a reference to it.

This patch implement the second option, with am optimization that
only *one* module will turn the LinkOnce into Weak, while the others
will turn it into available_externally, so that there is exactly one
copy emitted for the whole compilation.

http://reviews.llvm.org/D18346

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265190
2016-04-01 21:53:50 +00:00
Manman Ren 9bfd0d03e9 Swift Calling Convention: add swifterror attribute.
A ``swifterror`` attribute can be applied to a function parameter or an
AllocaInst.

This commit does not include any target-specific change. The target-specific
optimization will come as a follow-up patch.

Differential Revision: http://reviews.llvm.org/D18092

llvm-svn: 265189
2016-04-01 21:41:15 +00:00
Rong Xu 92c2eae4e1 Fix buildbot lldb-amd64-ninja-netbsd7 failure
llvm-svn: 265180
2016-04-01 20:15:04 +00:00
James Y Knight e6a4646372 Remove useless check for ThreadModel==Single in ARMISelLowering. NFC.
ThreadModel::Single is already handled already by ARMPassConfig adding
LowerAtomicPass to the pass list, which lowers all atomics to non-atomic
ops and deletes fences.

So by the time we get to ISel, there's no atomic fences left, so they
don't need special handling.

llvm-svn: 265178
2016-04-01 19:33:19 +00:00
Peter Collingbourne dd711b93e0 LowerBitSets: Move declarations to separate namespace.
Should fix modules build.

llvm-svn: 265176
2016-04-01 18:46:50 +00:00
Mike Aizatsky f13cbee12e [libfuzzer] adding license headers to cpp files
Differential Revision: http://reviews.llvm.org/D18705

llvm-svn: 265174
2016-04-01 18:38:58 +00:00
Tom Stellard 354a43c7bc AMDGPU: Implement {BUFFER,FLAT}_ATOMIC_CMPSWAP{,_X2}
Summary:
Implement BUFFER_ATOMIC_CMPSWAP{,_X2} instructions on all GCN targets, and FLAT_ATOMIC_CMPSWAP{,_X2} on CI+.

32-bit instruction variants tested manually on Kabini and Bonaire. Tests and parts of code provided by Jan Veselý.

Patch by: Vedran Miletić

Reviewers: arsenm, tstellarAMD, nhaehnle

Subscribers: jvesely, scchan, kanarayan, arsenm

Differential Revision: http://reviews.llvm.org/D17280

llvm-svn: 265170
2016-04-01 18:27:37 +00:00
Mike Aizatsky 01c0f8d8a3 [sancov] save entry block from pruning (it is always full dominator)
llvm-svn: 265168
2016-04-01 18:13:19 +00:00
Sanjay Patel 9f413364d5 [x86] avoid intermediate splat for non-zero memsets (PR27100)
Follow-up to http://reviews.llvm.org/D18566 and http://reviews.llvm.org/D18676 -
where we noticed that an intermediate splat was being generated for memsets of
non-zero chars.

That was because we told getMemsetStores() to use a 32-bit vector element type,
and it happily obliged by producing that constant using an integer multiply.

The 16-byte test that was added in D18566 is now equivalent for AVX1 and AVX2
(no splats, just a vector load), but we have PR27141 to track that splat difference.

Note that the SSE1 path is not changed in this patch. That can be a follow-up.
This patch should resolve PR27100.

llvm-svn: 265161
2016-04-01 17:36:45 +00:00
Chad Rosier 8787a81023 [AArch64] Fix a typo. NFC.
llvm-svn: 265160
2016-04-01 17:34:38 +00:00
David Majnemer fe3f9d1721 [InstCombine] Don't sink an instr after a catchswitch
A catchswitch is a terminator, instructions cannot be inserted after it.

llvm-svn: 265158
2016-04-01 17:28:17 +00:00
David Majnemer 6f1f85f0e1 [SLPVectorizer] Don't insert an extractelement before a catchswitch
A catchswitch cannot be preceded by another instruction in the same
basic block (other than a PHI node).

Instead, insert the extract element right after the materialization of
the vectorized value.  This isn't optimal but is a reasonable compromise
given the constraints of WinEH.

This fixes PR27163.

llvm-svn: 265157
2016-04-01 17:28:15 +00:00
Rong Xu 8e8fe859e0 [PGO] Refactor PGOFuncName meta data code to be used in clang
Refactor the code that gets and creates PGOFuncName meta data so that it can be
used in clang's value profile annotation.

Differential Revision: http://reviews.llvm.org/D18623

llvm-svn: 265149
2016-04-01 16:43:30 +00:00
Sanjay Patel a05e0ff223 [x86] avoid intermediate splat for non-zero memsets (PR27100)
Follow-up to D18566 - where we noticed that an intermediate splat was being
generated for memsets of non-zero chars.

That was because we told getMemsetStores() to use a 32-bit vector element type,
and it happily obliged by producing that constant using an integer multiply.

The tests that were added in the last patch are now equivalent for AVX1 and AVX2
(no splats, just a vector load), but we have PR27141 to track that splat difference.
In the new tests, the splat via shuffling looks ok to me, but there might be some
room for improvement depending on uarch there.

Note that the SSE1/2 paths are not changed in this patch. That can be a follow-up.
This patch should resolve PR27100.

Differential Revision: http://reviews.llvm.org/D18676

llvm-svn: 265148
2016-04-01 16:27:14 +00:00
Valery Pykhtin 5b3559c1ec [AMDGPU] fix MADAK/MADMK instructions operand namings to match encoding fields.
$vsrc1 -> $src1, $k -> $imm

Differential Revision: http://reviews.llvm.org/D18659

llvm-svn: 265141
2016-04-01 13:13:12 +00:00
Andrea Di Biagio 8c48841907 [x86] Remove redundant call to setTargetDAGCombine for BUILD_VECTOR node type.
Since revision 235394, we no longer perform target specific combines on
build_vector nodes. No functional change intended.

llvm-svn: 265138
2016-04-01 12:25:44 +00:00
Sagar Thakur 48973d21e1 [MIPS][LLVM-MC] Fix JR encoding for MIPSR6 ISA
Summary: The assembler was picking the wrong JR variant because the pre-R6 one was still enabled at R6.

Author: nitesh.jain
Reviewers: vkalintiris, dsanders
Subscribers: dsanders, llvm-commits, mohit.bhakkad, sagar, bhushan, jaydeep
Differential: D18387
llvm-svn: 265134
2016-04-01 11:55:33 +00:00
Andrey Turetskiy 958eb46443 [X86] Introduce Lakemont CPU.
Add a new Intel MCU CPU Lakemont, which doesn't support X87.

Differential Revision: http://reviews.llvm.org/D18650

llvm-svn: 265128
2016-04-01 10:16:15 +00:00
James Molloy b876c72bcc Fix for pr24346: arm asm label calculation error in sub
Some ARM instructions encode 32-bit immediates as a 8-bit integer (0-255)
and a 4-bit rotation (0-30, even) in its least significant 12 bits. The
original fixup, FK_Data_4, patches the instruction by the value bit-to-bit,
regardless of the encoding. For example, assuming the label L1 and L2 are
0x0 and 0x104 respectively, the following instruction:

  add r0, r0, #(L2 - L1) ; expects 0x104, i.e., 260

would be assembled to the following, which adds 1 to r0, instead of 260:

  e2800104 add r0, r0, #4, 2 ; equivalently 1

The new fixup kind fixup_arm_mod_imm takes care of the encoding:

  e2800f41 add r0, r0, #260

Patch by Ting-Yuan Huang!

llvm-svn: 265122
2016-04-01 09:40:47 +00:00
Oliver Stannard a5520b02a5 [AArch64] Better errors for out-of-range fixups
When a fixup that can be resolved by the assembler is out of range, we should
report an error in the source, rather than crashing.

Differential Revision: http://reviews.llvm.org/D18402

llvm-svn: 265120
2016-04-01 09:14:50 +00:00
Mehdi Amini 215d59e7b0 ThinLTO: move ObjCARCContractPass in the CodeGen pipeline
This is to be coherent with Full LTO.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265118
2016-04-01 08:22:59 +00:00
Mehdi Amini 43b657b5c7 Add a libLTO API to stop/restart ThinLTO between optimizations and CodeGen
This allows the linker to instruct ThinLTO to perform only the
optimization part or only the codegen part of the process.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265113
2016-04-01 06:47:02 +00:00
Chuang-Yu Cheng f8b592f213 [PPC64] Bug fix: when enabling sibling-call-opt and shrink-wrapping, the tail call branch instruction might disappear
Bug Pattern:
    # BB#0:                                 # %entry
	    cmpldi	 3, 0
	    beq-	 0, .LBB0_2
    # BB#1:                                 # %exit
	    lwz 4, 0(3)
	    #TC_RETURNd8 LVComputationKind 0
    .LBB0_2:                                # %cond.false
	    mflr 0
	    std 0, 16(1)
	    stdu 1, -96(1)
    .Ltmp0:
	    .cfi_def_cfa_offset 96
    .Ltmp1:
	    .cfi_offset lr, 16
	    bl __assert_fail
	    nop

The branch instruction for tail call return is not generated, because the
shrink-wrapping pass choosing a new Restore Point: %cond.false, so %exit
block is not sent to emitEpilogue, that's why the branch is not generated.

Thanks Kit's opinions!
Reviewers: nemanjai hfinkel tjablin kbarton

http://reviews.llvm.org/D17606

llvm-svn: 265112
2016-04-01 06:44:32 +00:00
Mehdi Amini d7ad221c16 Add a module Hash in the bitcode and the combined index, implementing a kind of "build-id"
This is intended to be used for ThinLTO incremental build.

Differential Revision: http://reviews.llvm.org/D18213

This is a recommit of r265095 after fixing the Windows issues.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265111
2016-04-01 05:33:11 +00:00
Mehdi Amini 180441f09a Fix S390 big endian detection
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265109
2016-04-01 05:12:24 +00:00
Mehdi Amini 4cd5702578 Add support for computing SHA1 in LLVM
Provide a class to generate a SHA1 from a sequence of bytes, and
a convenience raw_ostream adaptor.
This will be used to provide a "build-id" by hashing the Module
block when writing bitcode. ThinLTO will use this information for
incremental build.

Reapply r265094 which was reverted in r265102 because it broke
MSVC bots (constexpr is not supported).

http://reviews.llvm.org/D16325

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265107
2016-04-01 04:30:16 +00:00
Michael Kuperstein 7bab713188 Use range-based for loops. NFC.
llvm-svn: 265105
2016-04-01 03:45:08 +00:00
Mehdi Amini 85fb9e058e Revert "Add support for computing SHA1 in LLVM"
This reverts commit r265096, r265095, and r265094.
Windows build is broken, and the validation does not pass.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265102
2016-04-01 03:03:21 +00:00
Sanjoy Das f83ab6de56 Don't insert stackrestore on deoptimizing returns
They're not necessary (since the stack pointer is trivially restored on
return), and the way LLVM inserts the stackrestore calls breaks the
IR (we get a stackrestore between the deoptimize call and the return).

llvm-svn: 265101
2016-04-01 02:51:30 +00:00
Sanjoy Das 18b92968ea Don't insert lifetime end markers on deoptimizing returns
They're not necessary (since the lifetime of the alloca is trivially
over due to the return), and the way LLVM inserts the lifetime.end
markers breaks the IR (we get a lifetime end marker between the
deoptimize call and the return).

llvm-svn: 265100
2016-04-01 02:51:26 +00:00
Sanjoy Das 9d41a8f269 Don't use an i64 return type with webkit_jscc
Re-enable an assertion enabled by Justin Lebar in rL265092.  rL265092
was breaking test/CodeGen/X86/deopt-intrinsic.ll because webkit_jscc
does not like non-i64 return types.  Change the test case to not do
that.

llvm-svn: 265099
2016-04-01 02:51:21 +00:00
Matthias Braun cc7fba40fe AArch64ISelLowering: Remove unused variables/arguments; NFC
llvm-svn: 265098
2016-04-01 02:49:17 +00:00