Commit Graph

282536 Commits

Author SHA1 Message Date
Adrian Prantl 520789e139 Fix the syntax highlighting of strings in dwarfdump.
llvm-svn: 324936
2018-02-12 21:11:23 +00:00
Adrian Prantl baf9c20b02 Factor out common condition into an easier to understand helper function (NFC).
llvm-svn: 324935
2018-02-12 21:11:14 +00:00
Michael Kruse a6716d9d81 [ScopBuilder] scalar-indep: Fix mutually referencing PHIs.
Two or more PHIs mutually using each other directly or indirectly as
incoming value could cause that a PHI WRITE be added before the PHI READ
(i.e. it overwrites the current incoming value with the next incoming
value before it being read).

Fix by ensuring that the PHI WRITE and PHI READ are in the same statement.

This should fix the miscompile of SingleSource/Benchmark/Misc/whetstone
from the test-suite.

llvm-svn: 324934
2018-02-12 21:09:40 +00:00
Vedant Kumar a8b8d3225b Move the debuginfo-dce-or test into debuginfo-variables.ll, NFC
llvm-svn: 324933
2018-02-12 21:02:45 +00:00
Volodymyr Sapsai 2ad768bb13 Revert "[ThinLTO] Add GraphTraits for FunctionSummaries"
It caused assertion failure
Assertion failed: (!DD.IsLambda && !MergeDD.IsLambda && "faked up lambda definition?"), function MergeDefinitionData, file /Users/buildslave/jenkins/workspace/clang-stage1-configure-RA/llvm/tools/clang/lib/Serialization/ASTReaderDecl.cpp, line 1675.

on the second stage build bots.

llvm-svn: 324932
2018-02-12 20:43:31 +00:00
Volodymyr Sapsai 9fa3a808b5 Revert "Follow on to rL324854 (Added tests)" as part of r324854 revert.
r324854 caused broken build on the second stage build bots.

llvm-svn: 324931
2018-02-12 20:42:18 +00:00
Jim Ingham 78ffed02d8 Remove the pubnames support from the Xcode project.
llvm-svn: 324930
2018-02-12 20:25:37 +00:00
Scott Linder 94834f16be [DebugInfo] Update Checksum handling in CGDebugInfo
Update to match new DIFile API.

llvm-svn: 324929
2018-02-12 19:47:05 +00:00
Scott Linder 7160384d40 [DebugInfo] Unify ChecksumKind and Checksum value in DIFile
Rather than encode the absence of a checksum with a Kind variant, instead put
both the kind and value in a struct and wrap it in an Optional.

Differential Revision: http://reviews.llvm.org/D43043

llvm-svn: 324928
2018-02-12 19:45:54 +00:00
Sanjay Patel 4a4f35f324 [InstCombine] X / (X * Y) --> 1.0 / Y
This is similar to the instsimplify fold added with D42385 
( rL323716 )
...but this can't be in instsimplify because we're creating/morphing
a different instruction.

llvm-svn: 324927
2018-02-12 19:39:21 +00:00
Sanjay Patel ee4257f676 [InstCombine] add tests for missing fdiv fold; NFC
llvm-svn: 324926
2018-02-12 19:23:39 +00:00
Adrian McCarthy fbfdd53ad1 Remove dead code for handling DWARF pubnames
Summary:
LLDB doesn't use this code, the code has no tests, and the code does suspicious
things like hashing pointers to strings instead of the strings themselves.

Subscribers: sanjoy, mgorny, JDevlieghere

Differential Revision: https://reviews.llvm.org/D43202

llvm-svn: 324925
2018-02-12 19:19:04 +00:00
Sanjay Patel e4fcb00290 [InstCombine] regenerate checks; NFC
llvm-svn: 324924
2018-02-12 19:14:01 +00:00
Marshall Clow 5012793e05 Implement LWG 2835 - fix <tgmath.h>
llvm-svn: 324923
2018-02-12 19:13:24 +00:00
Sanjay Patel 1998cc6a47 [InstCombine] various clean-ups for div transforms; NFC
llvm-svn: 324922
2018-02-12 18:38:35 +00:00
Davide Italiano 1ecd449814 [testsuite] Reintroduce test to check leaking.
It wasn't python leaking, it was lldb. Thanks to Pavel for the
explanation. Pointy-hat to me.

llvm-svn: 324919
2018-02-12 18:06:34 +00:00
Adrian Prantl 01d5cbe2ea Add a unit test for Driver::getDefaultModuleCachePath().
llvm-svn: 324917
2018-02-12 17:59:54 +00:00
Jun Bum Lim 144eb593dd [LICM] update BlockColors after splitting predecessors
Update BlockColors after splitting predecessors. Do not allow splitting
EHPad for sinking when the BlockColors is not empty, so we can
simply assign predecessor's color to the new block.

Fixes PR36184

llvm-svn: 324916
2018-02-12 17:56:55 +00:00
Erich Keane 2908a04301 Further cleanup to Driver mode code, as suggested by dblaikie [NFC]
llvm-svn: 324915
2018-02-12 17:47:01 +00:00
Fangrui Song 31b97194e6 [libclang] Add `CXSymbolRole role` to CXIdxEntityRefInfo
Summary:
CXIdxEntityRefInfo contains the member `CXIdxEntityRefKind kind;` to
differentiate implicit and direct calls. However, there are more roles
defined in SymbolRole. Among them, `Read/Write` are probably the most
useful ones as they can be used to differentiate Read/Write occurrences
of a symbol for document highlight in a text document.

See `export namespace DocumentHighlightKind`
on https://microsoft.github.io/language-server-protocol/specification

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D42895

llvm-svn: 324914
2018-02-12 17:42:09 +00:00
Reid Kleckner b0a17edff7 [Sema] Don't mark plain MS enums as fixed
Summary:
This fixes a flaw in our AST: PR27098

MSVC always gives plain enums the underlying type 'int'. Clang does this
as well, but we claim the enum is "fixed", as if the user actually wrote
': int'. It means we end up emitting spurious -Wsign-compare warnings on
code like this:

  enum Vals { E1, E2, E3 };
  bool f(unsigned v1, Vals v2) {
    return v1 == v2;
  }

We think 'v2' can take on negative values because we think 'Vals' is
fixed. This fixes that.

Reviewers: rsmith

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D43110

llvm-svn: 324913
2018-02-12 17:37:06 +00:00
Abderrazek Zaafrani e72d99261f [AArch64] Fixes for ARMv8.2-A FP16 scalar intrinsic - llvm portion
https://reviews.llvm.org/D42993

llvm-svn: 324912
2018-02-12 17:35:42 +00:00
Marshall Clow c0db07299e Implement LWG#2908 - The less-than operator for shared pointers could do more, and mark 2878 as complete as well (we already do that)
llvm-svn: 324911
2018-02-12 17:26:40 +00:00
Simon Pilgrim 0efe9bc953 [X86] Add missing scheduling class tag for i64 absolute address moves
Expand existing SchedRW to encompass these like it did for the other memory offset movs - added comments to closing braces to keep track of def scopes.

We only tagged it with the itinerary class, so completeness checks were erroneously passed (PR35639).

llvm-svn: 324910
2018-02-12 17:21:28 +00:00
Erich Keane a172654a09 Update target-note-test to be current with the AMDGPU changes
llvm-svn: 324909
2018-02-12 17:19:57 +00:00
Oliver Stannard 02f08c9d1f [AArch64] Improve v8.1-A code-gen for atomic load-and
Armv8.1-A added an atomic load-clear instruction (which performs bitwise
and with the complement of it's operand), but not a load-and
instruction. Our current code-generation for atomic load-and always
inserts an MVN instruction to invert its argument, even if it could be
folded into a constant or another instruction.

This adds lowering early in selection DAG to convert a load-and
operation into an xor with -1 and a load-clear, allowing the normal DAG
optimisations to work on it.

To do this, I've had to add a new ISD opcode, ATOMIC_LOAD_CLR. I don't
see any easy way to do this with an AArch64-specific ISD node, because
the code-generation for atomic operations assumes the SDNodes are of
type AtomicSDNode.

I've left the old tablegen patterns in because they are still needed for
global isel.

Differential revision: https://reviews.llvm.org/D42478

llvm-svn: 324908
2018-02-12 17:03:11 +00:00
Erich Keane 93e58667ee Make attribute-target on a Definition-after-use update the LLVM attributes
As reported here: https://bugs.llvm.org/show_bug.cgi?id=36301
The issue is that the 'use' causes the plain declaration to emit
the attributes to LLVM-IR. However, if the definition added it
later, these would silently disappear.

This commit extracts that logic to its own function in CodeGenModule,
and has the attribute-applications done during 'definition' update
the attributes properly.

Differential Revision: https://reviews.llvm.org/D43095

llvm-svn: 324907
2018-02-12 17:01:41 +00:00
Kostya Kortchinsky 1022220b16 [sanitizer] Size class map & local cache improvements
Summary:
- Reland rL324263, this time allowing for a compile-time decision as to whether
  or not use the 32-bit division. A single test is using a class map covering
  a maximum size greater than 4GB, this can be checked via the template
  parameters, and allows SizeClassAllocator64PopulateFreeListOOM to pass;
- `MaxCachedHint` is always called on a class id for which we have already
  computed the size, but we still recompute `Size(class_id)`. Change the
  prototype of the function to work on sizes instead of class ids. This also
  allows us to get rid of the `kBatchClassID` special case. Update the callers
  accordingly;
- `InitCache` and `Drain` will start iterating at index 1: index 0 contents are
  unused and can safely be left to be 0. Plus we do not pay the cost of going
  through an `UNLIKELY` in `MaxCachedHint`, and touching memory that is
  otherwise not used;
- `const` some variables in the areas modified;
- Remove an spurious extra line at the end of a file.

Reviewers: alekseyshl, tl0gic, dberris

Reviewed By: alekseyshl, dberris

Subscribers: dberris, kubamracek, delcypher, llvm-commits, #sanitizers

Differential Revision: https://reviews.llvm.org/D43088

llvm-svn: 324906
2018-02-12 16:59:17 +00:00
Simon Pilgrim 07e1337c2a [X86][AVX512] Add missing scheduling class tag for KMOVB/KMOVW/KMOVD/KMOVQ moves/loads/stores.
We only tagged it with the itinerary class, so completeness checks were erroneously passed (PR35639).

llvm-svn: 324905
2018-02-12 16:59:04 +00:00
Gheorghe-Teodor Bercea d5ae4e6501 [OpenMP][libomptarget] Enable the compilation of multiple bc libraries for runtime inlining
Summary:
Different NVIDIA GPUs support different compute capabilities. To enable the inlining of runtime functions and the best performance on different generations of NVIDIA GPUs, a bc library for each compute capability needs to be compiled. The same compiler build will then be usable in conjunction with multiple generations of NVIDIA GPUs.
To differentiate between versions of the same bc lib, the output file name will contain the compute capability ID.
Depends on D14254

Reviewers: Hahnfeld, hfinkel, carlo.bertolli, caomhin, ABataev, grokos

Reviewed By: Hahnfeld, grokos

Subscribers: guansong, mgorny, openmp-commits

Differential Revision: https://reviews.llvm.org/D41724

llvm-svn: 324904
2018-02-12 16:45:20 +00:00
Evandro Menezes 7dc0f1ec45 [AArch64] Refactor identification of SIMD immediates
Get rid of icky goto loops and make the code easier to maintain (NFC).

Differential revision: https://reviews.llvm.org/D42723

llvm-svn: 324903
2018-02-12 16:41:41 +00:00
Erich Keane cfd451b746 Add Invalid-note test negllected in R324673,324674,324675,324676
llvm-svn: 324902
2018-02-12 16:24:08 +00:00
Simon Pilgrim 369e59d4d1 [X86][AVX512] Add missing scheduling class tag for VMOVQ/VMOVHLPS/VMOVLHPS/VMOVHPD/VMOVHPS/VMOVLPD/VMOVLPS
Tag AVX512 variants to match SSE/AVX originals.

We only tagged it with the itinerary class, so completeness checks were erroneously passed (PR35639).

llvm-svn: 324901
2018-02-12 16:18:36 +00:00
Momchil Velikov 25f6be5326 Re-commit r324490: [DebugInfo] Improvements to representation of enumeration types (PR36168)
Differential revision: https://reviews.llvm.org/D42736

llvm-svn: 324900
2018-02-12 16:12:52 +00:00
Momchil Velikov 08dc66eff0 Re-commit r324489: [DebugInfo] Improvements to representation of enumeration types (PR36168)
Differential Revision: https://reviews.llvm.org/D42734

llvm-svn: 324899
2018-02-12 16:10:09 +00:00
Simon Pilgrim b941f5dc5f [X86] Tag CET-IBT instruction scheduler classes
llvm-svn: 324898
2018-02-12 15:57:00 +00:00
Simon Pilgrim d0693a6501 [X86][MMX] Add missing scheduling class tag for EMMS/FEMMS
We only tagged it with the itinerary class, so completeness checks were erroneously passed (PR35639).

AMD targets can perform these a lot quicker than WriteMicrocoded so will need an override in the models.

llvm-svn: 324897
2018-02-12 15:52:59 +00:00
Krasimir Georgiev c8b461b37f [clang-format] Fix comment indentation in text protos
Summary: This patch fixes a bug where the comment indent of comments in text protos gets messed up because by default paren states get created with AlignColons = true (which makes snese for ObjC).

Subscribers: klimek, cfe-commits

Differential Revision: https://reviews.llvm.org/D43194

llvm-svn: 324896
2018-02-12 15:49:09 +00:00
Marshall Clow 8ea7ede725 While implementing P0777 - preventing unnecessary decay, I found some non-public uses of decay that could be replaced by __uncvref. NFC intented
llvm-svn: 324895
2018-02-12 15:41:25 +00:00
Krzysztof Parzyszek 450d4cf93a [NFC] Fix comment of class InstrStage
Patch by Wei-Ren Chen.

Differential Revision: https://reviews.llvm.org/D42905

llvm-svn: 324894
2018-02-12 15:02:49 +00:00
Alexey Bataev ca2396e673 [SLP] Take user instructions cost into consideration in insertelement vectorization.
Summary:
For better vectorization result we should take into consideration the
cost of the user insertelement instructions when we try to
vectorize sequences that build the whole vector. I.e. if we have the
following scalar code:
```
<Scalar code>
insertelement <ScalarCode>, ...
```
we should consider the cost of the last `insertelement ` instructions as
the cost of the scalar code.

Reviewers: RKSimon, spatel, hfinkel, mkuper

Subscribers: javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D42657

llvm-svn: 324893
2018-02-12 14:54:48 +00:00
Oliver Stannard 4269917304 [AArch64] Improve v8.1-A code-gen for atomic load-subtract
Armv8.1-A added an atomic load-add instruction, but not a load-subtract
instruction. Our current code-generation for atomic load-subtract always
inserts a NEG instruction to negate it's argument, even if it could be
folded into a constant or another instruction.

This adds lowering early in selection DAG to convert a load-subtract
operation into a subtract and a load-add, allowing the normal DAG
optimisations to work on it.

I've left the old tablegen patterns in because they are still needed for
global isel.

Some of the tests in this patch are copied from D35375 by Chad Rosier (which
was abandoned).

Differential revision: https://reviews.llvm.org/D42477

llvm-svn: 324892
2018-02-12 14:22:03 +00:00
Sanjay Patel 39059d2630 [InstCombine] various clean-ups for commonIDivTransforms; NFC
llvm-svn: 324891
2018-02-12 14:14:56 +00:00
Aaron Ballman 1c606c263d Allow the NS, CF, and ObjC attributes to be used with -fdouble-square-bracket-attributes. The syntactic locations for such attributes on ObjC constructs have been specifically chosen to follow the GNU attribute syntactic locations.
llvm-svn: 324890
2018-02-12 13:38:25 +00:00
Nicholas Wilson 5170b54013 Test commit: reformat comment
llvm-svn: 324889
2018-02-12 13:17:09 +00:00
Ilya Biryukov 2d4cdacd26 [clangd] Log all ignored diagnostics.
Summary:
To aid debugging failures and crashes.
Only part of ignored diagnostics was logged before, now we log all of
them.

Reviewers: ioeric, hokein, sammccall

Reviewed By: hokein

Subscribers: klimek, jkorous-apple, cfe-commits

Differential Revision: https://reviews.llvm.org/D43123

llvm-svn: 324888
2018-02-12 12:48:51 +00:00
Hans Wennborg 7e19dfc45f Revert r324835 "[X86] Reduce Store Forward Block issues in HW"
It asserts building Chromium; see PR36346.

(This also reverts the follow-up r324836.)

> If a load follows a store and reloads data that the store has written to memory, Intel microarchitectures can in many cases forward the data directly from the store to the load, This "store forwarding" saves cycles by enabling the load to directly obtain the data instead of accessing the data from cache or memory.
> A "store forward block" occurs in cases that a store cannot be forwarded to the load. The most typical case of store forward block on Intel Core microarchiticutre that a small store cannot be forwarded to a large load.
> The estimated penalty for a store forward block is ~13 cycles.
>
> This pass tries to recognize and handle cases where "store forward block" is created by the compiler when lowering memcpy calls to a sequence
> of a load and a store.
>
> The pass currently only handles cases where memcpy is lowered to XMM/YMM registers, it tries to break the memcpy into smaller copies.
> breaking the memcpy should be possible since there is no atomicity guarantee for loads and stores to XMM/YMM.

llvm-svn: 324887
2018-02-12 12:43:39 +00:00
Haojian Wu cee2059f9b [clang-move] Fix the incorrect expansion end location.
Summary:
Before the fix, if clang-move decides to move the following macro statement, it only moves the first line `DEFINE(A,`.

```
DEFINE(A,
       B);
```

Reviewers: ioeric

Reviewed By: ioeric

Subscribers: klimek, cfe-commits

Differential Revision: https://reviews.llvm.org/D43174

llvm-svn: 324886
2018-02-12 12:26:12 +00:00
Simon Atanasyan 0874cf5e62 [mips] Fix 'l' constraint handling for types smaller than 32 bits
In case of correct using of the 'l' constraint llvm now generates valid
code; otherwise it shows an error message. Initially these triggers an
assertion.

This commit is the same as r324869 with fixed the test's file name.

llvm-svn: 324885
2018-02-12 12:21:55 +00:00
Filipe Cabecinhas 4ba5817b8b ASan+operator new[]: Add an option for more thorough operator new[] cookie poisoning
Summary:
Right now clang is skipping array cookie poisoning for any operator
new[] which is not part of the set of replaceable global allocation
functions.

This commit adds a flag to tell clang to poison all operator new[]
cookies.

A previous review was poisoning all array cookies unconditionally, but
there is an edge case which would stop working under ASan (a custom
operator new[] saves whatever pointer it returned, and then accesses
it).

This newer revision adds a command line argument to toggle this feature.

Original revision: https://reviews.llvm.org/D41301
Compiler-rt test revision with an explanation of the edge case: https://reviews.llvm.org/D41664

Reviewers: rjmccall, kcc, rsmith

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D43013

llvm-svn: 324884
2018-02-12 11:49:02 +00:00