a3b6d95db4
[AMDGPU] Removed redundant run lines for fmuladd.f16 test. NFC.
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llvm-svn: 325615
2018-02-20 19:19:56 +00:00
70b9282015
AMDGPU: Fix -enable-var-scope violations
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llvm-svn: 318004
2017-11-12 23:53:44 +00:00
878827d93a
DAG: Fold fma (fneg x), K, y -> fma x, -K, y
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llvm-svn: 316753
2017-10-27 09:06:07 +00:00
6c29c5acfe
AMDGPU: Allow SIShrinkInstructions to work in non-SSA
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Immediates can be folded as long as the immediate is a vreg.
Also undo commuting instructions if it didn't fold an immediate.
llvm-svn: 307575
2017-07-10 19:53:57 +00:00
3dbeefa978
AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel
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Currently the default C calling convention functions are treated
the same as compute kernels. Make this explicit so the default
calling convention can be changed to a non-kernel.
Converted with perl -pi -e 's/define void/define amdgpu_kernel void/'
on the relevant test directories (and undoing in one place that actually
wanted a non-kernel).
llvm-svn: 298444
2017-03-21 21:39:51 +00:00
a6867fd441
AMDGPU: Combine fp16/fp64 subtarget features
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The same control register controls both, and are set to
the same defaults. Keep the old names around as aliases.
llvm-svn: 292837
2017-01-23 22:31:03 +00:00
e7d8ed32f9
AMDGPU: Swap order of operands in fadd/fsub combine
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FMA is canonicalized to constant in the middle operand. Do
the same so fmad matches and avoid an extra combine step.
llvm-svn: 290313
2016-12-22 04:03:40 +00:00
770ec8680a
AMDGPU: Form more FMAs if fusion is allowed
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Extend the existing fadd/fsub->fmad combines to produce
FMA if allowed.
llvm-svn: 290311
2016-12-22 03:55:35 +00:00
Stanislav Mekhanoshin