Commit Graph

270250 Commits

Author SHA1 Message Date
Alex Lorenz a844f396ce [refactor] Add the AST source selection component
This commit adds the base AST source selection component to the refactoring
library. AST selection is represented using a tree of SelectedASTNode values.
Each selected node gets its own selection kind, which can actually be None even
in the middle of tree (e.g. statement in a macro whose child is in a macro
argument). The initial version constructs a "raw" selection tree, without
applying filters and canonicalisation operations to the nodes.

Differential Revision: https://reviews.llvm.org/D35012

llvm-svn: 311655
2017-08-24 13:51:09 +00:00
Haojian Wu e928c2b67e [clang-tidy] Add missing IgnoreMacros doc for modernize-use-equals-default.
A followup of rL311136.

llvm-svn: 311654
2017-08-24 13:45:18 +00:00
Krasimir Georgiev 9ee966548e [X86AsmParser] Fix msan: use-of-uninitialized-value after r311639
Summary:
CodeGen/ms-inline-asm.c test triggers msan use-of-uninitialized-value here:
llvm/lib/MC/MCParser/AsmParser.cpp:5629:7

Reviewers: bkramer, coby

Differential Revision: https://reviews.llvm.org/D37105

llvm-svn: 311653
2017-08-24 13:38:18 +00:00
Haojian Wu 3f495944de [clang-tidy] A follow-up fix of braced-init-list constructors in make-unique check.
Reviewers: alexfh

Reviewed By: alexfh

Subscribers: JDevlieghere, xazax.hun, cfe-commits

Differential Revision: https://reviews.llvm.org/D37066

llvm-svn: 311652
2017-08-24 13:35:55 +00:00
Alexander Kornienko 15ea4ebbb2 [clang-tidy] bugprone-undefined-memory-manipulation: include type into the message
Having the actual type in the message helps a lot understanding warnings in templates ;)

+ fix a false negative for type aliases.

llvm-svn: 311651
2017-08-24 12:11:05 +00:00
Krzysztof Parzyszek c09a14eeb2 [Hexagon] Generate correct runtime check when recognizing memmove
The check (assuming positive stride) for validity of memmove should be
(a) the destination is at a lower address than the source, or
(b) the distance between the source and destination is greater than or
    equal the number of bytes copied.

For the second part it is sufficient to assume that the destination
is at a higher address, since the opposite case is covered by (a).
The distance calculation was previously done by subtracting the
pointers in the wrong order.

llvm-svn: 311650
2017-08-24 11:59:53 +00:00
Evgeny Astigeevich 540a39adf7 [ARM, Thumb1] Prevent ARMTargetLowering::isLegalAddressingMode from accepting illegal modes
ARMTargetLowering::isLegalAddressingMode can accept illegal addressing modes
for the Thumb1 target. This causes generation of redundant code and affects
performance.

This fixes PR34106: https://bugs.llvm.org/show_bug.cgi?id=34106

Differential Revision: https://reviews.llvm.org/D36467

llvm-svn: 311649
2017-08-24 10:00:25 +00:00
Siddharth Bhat 78027437e6 [Polly] [PPCGCodeGeneration] Mild refactoring of checking validity of functions in a kernel.
This is a stylistic change to make the function a little more readable.
Also add a debug print to show what instruction contains a use of a
function we don't understand in the kernel.

Differential Revision: https://reviews.llvm.org/D37058

llvm-svn: 311648
2017-08-24 09:54:15 +00:00
Tobias Grosser d7eb619299 Model cache size and associativity in TargetTransformInfo
Summary:
We add the precise cache sizes and associativity for the following Intel
architectures:

  - Penry
  - Nehalem
  - Westmere
  - Sandy Bridge
  - Ivy Bridge
  - Haswell
  - Broadwell
  - Skylake
  - Kabylake

Polly uses since several months a performance model for BLAS computations that
derives optimal cache and register tile sizes from cache and latency
information (based on ideas from "Analytical Modeling Is Enough for High-Performance BLIS", by Tze Meng Low published at TOMS 2016).
While bootstrapping this model, these target values have been kept in Polly.
However, as our implementation is now rather mature, it seems time to teach
LLVM itself about cache sizes.

Interestingly, L1 and L2 cache sizes are pretty constant across
micro-architectures, hence a set of architecture specific default values
seems like a good start. They can be expanded to more target specific values,
in case certain newer architectures require different values. For now a set
of Intel architectures are provided.

Just as a little teaser, for a simple gemm kernel this model allows us to
improve performance from 1.2s to 0.27s. For gemm kernels with less optimal
memory layouts even larger speedups can be reported.

Reviewers: Meinersbur, bollu, singam-sanjay, hfinkel, gareevroman, fhahn, sebpop, efriedma, asb

Reviewed By: fhahn, asb

Subscribers: lsaba, asb, pollydev, llvm-commits

Differential Revision: https://reviews.llvm.org/D37051

llvm-svn: 311647
2017-08-24 09:46:25 +00:00
Sjoerd Meijer afc2cd3c9e [AArch64] Custom lowering of copysign f16
This is a follow up patch of r311154 and introduces custom lowering of copysign
f16 to avoid promotions to single precision types when the subtarget supports
fullfp16.

Differential Revision: https://reviews.llvm.org/D36893

llvm-svn: 311646
2017-08-24 09:21:10 +00:00
Daniel Sanders 2c269f6bf8 Re-commit: [globalisel][tablegen] Add support for ImmLeaf without SDNodeXForm
Summary:
This patch adds support for predicates on imm nodes but only for ImmLeaf and not
for PatLeaf or PatFrag and only where the value does not need to be transformed
before being rendered into the instruction.

The limitation on PatLeaf/PatFrag/SDNodeXForm is due to differences in the
necessary target-supplied C++ for GlobalISel.

Depends on D36085

The previous commit was reverted for breaking the build but this appears to have
been the recurring problem on the Windows bots with tablegen not being re-run
when llvm-tblgen is changed but the .td's aren't. If it re-occurs then forcing a
build with clean=True should fix it but this string should do this in advance:
    Requires a clean build.

Reviewers: ab, t.p.northover, qcolombet, rovka, aditya_nandakumar

Reviewed By: rovka

Subscribers: kristof.beyls, javed.absar, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D36086

llvm-svn: 311645
2017-08-24 09:11:20 +00:00
Coby Tayree 21c312d8c6 [LLVM][x86][Inline Asm] support for GCC style inline asm - Y<x> constraints
This patch is intended to enable the use of basic double letter constraints used in GCC extended inline asm {Yi Y2 Yz Y0 Ym Yt}.
Supersedes D35204
Clang counterpart: D36371

Differential Revision: https://reviews.llvm.org/D36369

llvm-svn: 311644
2017-08-24 09:08:33 +00:00
Coby Tayree 7b49dc9c68 [Clang][x86][Inline Asm] support for GCC style inline asm - Y<x> constraints
This patch is intended to enable the use of basic double letter constraints used in GCC extended inline asm {Yi Y2 Yz Y0 Ym Yt}.
Supersedes D35205
llvm counterpart: D36369

Differential Revision: https://reviews.llvm.org/D36371

llvm-svn: 311643
2017-08-24 09:07:34 +00:00
Mikael Holmen 7a99e33b8e [Reassociate] Do not drop debug location if replacement is missing
Summary:
When reassociating an expression, do not drop the instruction's
original debug location in case the replacement location is
missing.

The debug location must at least not be dropped for inlinable
callsites of debug-info-bearing functions in debug-info-bearing
functions. Failing to do so would result in an "inlinable function "
"call in a function with debug info must have a !dbg location"
error in the verifier.

As preserving the original debug location is not expected
to result in overly jumpy debug line information, it is
preserved for all other cases too.

This fixes PR34231:
https://bugs.llvm.org/show_bug.cgi?id=34231

Original patch by David Stenberg

Reviewers: davide, craig.topper, mcrosier, dblaikie, aprantl

Reviewed By: davide, aprantl

Subscribers: aprantl

Differential Revision: https://reviews.llvm.org/D36865

llvm-svn: 311642
2017-08-24 09:05:00 +00:00
Krasimir Georgiev c602af9a5e Revert "[clang-format] Break non-trailing block comments"
This reverts commit r311457. It reveals some dormant bugs in comment
reflowing, like breaking a single line jsdoc type annotation before a
parameter into multiple lines.

llvm-svn: 311641
2017-08-24 08:55:07 +00:00
Coby Tayree cfa3810aa0 Fixups to FE tests affected by D36793
Differential Revision: https://reviews.llvm.org/D36794

llvm-svn: 311640
2017-08-24 08:47:26 +00:00
Coby Tayree d89128925b [X86AsmParser] Refactoring, (almost) NFC.
Some refactoring to X86AsmParser, mostly regarding the way rewrites are conducted.
Mainly, we try to concentrate all the rewrite effort under one hood, so it'll hopefully be less of a mess and easier to maintain and understand.
naturally, some frontend tests were affected: D36794

Differential Revision: https://reviews.llvm.org/D36793

llvm-svn: 311639
2017-08-24 08:46:25 +00:00
Matt Arsenault d664315ae8 IPRA: Don't assume called function is first call operand
Fixes not finding the called global for AMDGPU
call pseudoinstructions, which prevented IPRA
from doing much.

llvm-svn: 311637
2017-08-24 07:55:15 +00:00
Matt Arsenault 00459e4a06 IPRA: Exit early on functions without calls
llvm-svn: 311636
2017-08-24 07:55:13 +00:00
Sjoerd Meijer 046a969360 [AArch64] fix for fcos and frem f16 promotion
Fix for copy-paste mistake in r311154; setOperationAction for fcos and frem f16
operands appeared twice (and it should be set to 'promote').

Differential Revision: https://reviews.llvm.org/D37071

llvm-svn: 311635
2017-08-24 07:43:52 +00:00
Chandler Carruth dc2556934c [x86] NFC: Clean up two tests and generate precise checks for them.
Mostly this involved giving unnamed values names and running the IR
through `opt` to re-format it but merging in any important comments in
the original. I then deleted pointless comments and inlined the function
attributes for ease of reading and editting.

All of this is to make it much easier to see the instructions being
generated here and evaluate any updates to the tests.

llvm-svn: 311634
2017-08-24 07:38:36 +00:00
Igor Breger 47be5fbbe9 [GlobalISel][X86] Support G_IMPLICIT_DEF.
Summary: Support G_IMPLICIT_DEF.

Reviewers: zvi, guyblank, t.p.northover

Reviewed By: guyblank

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D36733

llvm-svn: 311633
2017-08-24 07:06:27 +00:00
Lang Hames cbe694be03 [docs] In the CMake primer, correct the description of the ARGV/ARGN variables.
ARGN is the sublist of unnamed arguments, not the count of the arguments.

llvm-svn: 311632
2017-08-24 05:38:39 +00:00
Lang Hames 7febf2baff [Support] Rewrite handleAllErrors in terms of cantFail.
This just switches handleAllErrors from using custom assertions that all errors
have been handled to using cantFail. This change involves moving some of the
class and function definitions around though.

llvm-svn: 311631
2017-08-24 05:35:27 +00:00
Wei Ding a131d3fb29 Add ‘llvm.experimental.constrained.fma‘ Intrinsic.
Differential Revision: http://reviews.llvm.org/D36335

llvm-svn: 311629
2017-08-24 04:18:24 +00:00
Adam Nemet 0ada0d5b21 Support all integer types in DiagnosticInfoOptimizationBase::Argument
We were missing size_t (unsigned long) on macOS.

llvm-svn: 311628
2017-08-24 04:04:49 +00:00
Jason Molenda 9ff294f039 Change the ftag x87 register from being 8-bits wide to 16-bits wide
to match the changes Saleem Abdulrasool committed in r311579.  Fixes
a testsuite failure now that the testsuite expects a 16 bit return
value for thsi reg.

llvm-svn: 311627
2017-08-24 03:22:08 +00:00
Daniel Berlin f948603a15 NewGVN: We weren't properly simplifying selects with equal arguments due to a thinko.
llvm-svn: 311626
2017-08-24 02:43:17 +00:00
Eric Beckmann b85172f6ff Fix bug 34051 by handling empty .res files gracefully.
Summary:
Previously, llvm-cvtres crashes on .res files which are empty except for
the null header.  This allows the library to simply pass over them.

Subscribers: llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D37044

llvm-svn: 311625
2017-08-24 02:36:50 +00:00
Leo Li 23bb21cb92 [Driver] Register effective triple before get arm float abi.
Summary:
We need to register effective triple before calling `getARMFloatABI`.
Add missing code when `--print-libgcc-file-name` is passed.

Reviewers: atanasyan, rsmith, mgorny, peter.smith, kristof.beyls, compnerd, jroelofs

Reviewed By: compnerd

Subscribers: llvm-commits, aemerson, javed.absar, srhines, kristof.beyls, pirama

Differential Revision: https://reviews.llvm.org/D35742

llvm-svn: 311624
2017-08-24 01:51:51 +00:00
Hans Wennborg c39ec95d88 [DAG] Fix Node Replacement in PromoteIntBinOp
When one operand is a user of another in a promoted binary operation
we may replace and delete the returned value before returning
triggering an assertion. Reorder node replacements to prevent this.

Fixes PR34137.

Landing on behalf of Nirav.

Differential Revision: https://reviews.llvm.org/D36581

llvm-svn: 311623
2017-08-24 01:08:27 +00:00
Jason Molenda c064881a36 When parsing the DBGSourcePathRemapping plist entries
in a dSYM, and it's a version 2 DBGSourcePathRemapping,
in addition to the build/source paths specified, add 
build/source paths with the last two filename components
removed.  This more generic remapping can sometimes
help lldb to find the correct source file in complex
projects.
<rdar://problem/33973545> 

llvm-svn: 311622
2017-08-24 00:58:14 +00:00
George Karpenkov 8d15bbb019 Fix ClangFormatFuzzer.
llvm-svn: 311621
2017-08-24 00:30:28 +00:00
Dylan McKay 4f5002198b [AVR] Use the correct register classes for 16-bit atomic operations
llvm-svn: 311620
2017-08-24 00:14:38 +00:00
Andreas Simbuerger e478e2de83 [Polly][WIP] Scalar fully indexed expansion
Summary:
This patch comes directly after https://reviews.llvm.org/D34982 which allows fully indexed expansion of MemoryKind::Array. This patch allows expansion for MemoryKind::Value and MemoryKind::PHI.

MemoryKind::Value seems to be working with no majors modifications of D34982. A test case has been added. Unfortunatly, no "run time" checks can be done for now because as @Meinersbur explains in a comment on D34982, DependenceInfo need to be cleared and reset to take expansion into account in the remaining part of the Polly pipeline. There is no way to do that in Polly for now.

MemoryKind::PHI is not working. Test case is in place, but not working. To expand MemoryKind::Array, we expand first the write and then after the reads. For MemoryKind::PHI, the idea of the current implementation is to exchange the "roles" of the read and write and expand first the read according to its domain and after the writes.
But with this strategy, I still encounter the problem of union_map in new access map.
For example with the following source code (source code of the test case) :

```
void mse(double A[Ni], double B[Nj]) {
  int i,j;
  double tmp = 6;
  for (i = 0; i < Ni; i++) {
    for (int j = 0; j<Nj; j++) {
      tmp = tmp + 2;
    }
    B[i] = tmp;
  }
}
```

Polly gives us the following statements and memory accesses :

```
    Statements {
    	Stmt_for_body
            Domain :=
                { Stmt_for_body[i0] : 0 <= i0 <= 9999 };
            Schedule :=
                { Stmt_for_body[i0] -> [i0, 0, 0] };
            ReadAccess :=	[Reduction Type: NONE] [Scalar: 1]
                { Stmt_for_body[i0] -> MemRef_tmp_04__phi[] };
            MustWriteAccess :=	[Reduction Type: NONE] [Scalar: 1]
                { Stmt_for_body[i0] -> MemRef_tmp_11__phi[] };
            Instructions {
                  %tmp.04 = phi double [ 6.000000e+00, %entry.split ], [ %add.lcssa, %for.end ]
            }
    	Stmt_for_inc
            Domain :=
                { Stmt_for_inc[i0, i1] : 0 <= i0 <= 9999 and 0 <= i1 <= 9999 };
            Schedule :=
                { Stmt_for_inc[i0, i1] -> [i0, 1, i1] };
            MustWriteAccess :=	[Reduction Type: NONE] [Scalar: 1]
                { Stmt_for_inc[i0, i1] -> MemRef_tmp_11__phi[] };
            ReadAccess :=	[Reduction Type: NONE] [Scalar: 1]
                { Stmt_for_inc[i0, i1] -> MemRef_tmp_11__phi[] };
            MustWriteAccess :=	[Reduction Type: NONE] [Scalar: 1]
                { Stmt_for_inc[i0, i1] -> MemRef_add_lcssa__phi[] };
            Instructions {
                  %tmp.11 = phi double [ %tmp.04, %for.body ], [ %add, %for.inc ]
                  %add = fadd double %tmp.11, 2.000000e+00
                  %exitcond = icmp ne i32 %inc, 10000
            }
    	Stmt_for_end
            Domain :=
                { Stmt_for_end[i0] : 0 <= i0 <= 9999 };
            Schedule :=
                { Stmt_for_end[i0] -> [i0, 2, 0] };
            MustWriteAccess :=	[Reduction Type: NONE] [Scalar: 1]
                { Stmt_for_end[i0] -> MemRef_tmp_04__phi[] };
            ReadAccess :=	[Reduction Type: NONE] [Scalar: 1]
                { Stmt_for_end[i0] -> MemRef_add_lcssa__phi[] };
            MustWriteAccess :=	[Reduction Type: NONE] [Scalar: 0]
                { Stmt_for_end[i0] -> MemRef_B[i0] };
            Instructions {
                  %add.lcssa = phi double [ %add, %for.inc ]
                  store double %add.lcssa, double* %arrayidx, align 8
                  %exitcond5 = icmp ne i64 %indvars.iv.next, 10000
            }
    }

```

and the following dependences :
```
{ Stmt_for_inc[i0, 9999] -> Stmt_for_end[i0] : 0 <= i0 <= 9999;
Stmt_for_inc[i0, i1] -> Stmt_for_inc[i0, 1 + i1] : 0 <= i0 <= 9999 and 0 <= i1 <= 9998;
Stmt_for_body[i0] -> Stmt_for_inc[i0, 0] : 0 <= i0 <= 9999;
Stmt_for_end[i0] -> Stmt_for_body[1 + i0] : 0 <= i0 <= 9998 }
```

When trying to expand this memory access :
```
{ Stmt_for_inc[i0, i1] -> MemRef_tmp_11__phi[] };
```

The new access map would look like this :
```
{ Stmt_for_inc[i0, 9999] -> MemRef_tmp_11__phi_exp[i0] : 0 <= i0 <= 9999; Stmt_for_inc[i0, i1] ->MemRef_tmp_11__phi_exp[i0, 1 + i1] : 0 <= i0 <= 9999 and 0 <= i1 <= 9998 }
```

The idea to implement the expansion for PHI access is an idea from @Meinersbur and I don't understand why my implementation does not work. I should have miss something in the understanding of the idea.

Contributed by: Nicolas Bonfante <nicolas.bonfante@gmail.com>

Reviewers: Meinersbur, simbuerg, bollu

Reviewed By: Meinersbur

Subscribers: llvm-commits, pollydev, Meinersbur

Differential Revision: https://reviews.llvm.org/D36647

llvm-svn: 311619
2017-08-24 00:04:45 +00:00
Dehao Chen b2d1de5a7c Add test to cover accurate-sample-profile.
Summary: This patch adds test to cover the logic guarded by "accurate-sample-profile" flag.

Reviewers: davidxl

Reviewed By: davidxl

Subscribers: sanjoy, llvm-commits, eraman

Differential Revision: https://reviews.llvm.org/D37084

llvm-svn: 311618
2017-08-23 23:19:11 +00:00
Saleem Abdulrasool 5a3e50a3e6 ObjC++: decorate ObjC interfaces in MSABI properly
`id` needs to be handled specially since it is a `TypedefType` which is
sugar for an `ObjCObjectPointerType` whose pointee is an
`ObjCObjectType` with base `BuiltinType::ObjCIdType` and no protocols
and the first level of pointer gets it own type implementation.  `Class`
is similar with the `ObjCClassType` as the base instead.

The qualifiers on the base type of the `ObjCObjectType` need to be
dropped because the innermost `mangleType` will handle the qualifiers
itself.

`id` is desugared to `struct objc_object *` which should be encoded as
`PAUobjc_object@@`.  `Class` is desugared to `struct objc_class *` which
should be encoded as `PAUobjc_class@@`.

We were previously applying an extra modifier `A` which will be handled
during the recursive call.

This now properly decorates interface types as well as `Class` and `id`.
This corrects the interactions between C++ and ObjC++ for the type
specifier decoration.

llvm-svn: 311617
2017-08-23 22:38:58 +00:00
Richard Smith 39eca9b95a Fix mangling for dependent "type { expr-list }" expressions, and add mangling for designated initializers matching recent cxx-abi-dev discussion.
llvm-svn: 311612
2017-08-23 22:12:08 +00:00
Tim Northover 4bafa16748 ARM: use internal relocations for local symbols after all.
Switching to external relocations for ARM-mode branches (to allow Thumb
interworking when the offset is unencodable) causes calls to temporary symbols
to be miscompiled and instead go to the parent externally visible symbol.

Calling a temporary never happens in compiled code, but can occasionally in
hand-written assembly.

llvm-svn: 311611
2017-08-23 22:07:10 +00:00
Adrian Prantl 7db6b5e2b3 Retire the llvm.dbg.mir hack after r311594.
llvm-svn: 311610
2017-08-23 22:02:36 +00:00
Aditya Nandakumar 850b983455 Fix Verifier test - add REQUIRES aarch64-registered-target
llvm-svn: 311609
2017-08-23 21:55:36 +00:00
Adrian Prantl 33aa8acb40 Add a Verifier check for DILocation's scopes.
Found via https://bugs.llvm.org/show_bug.cgi?id=33997.

llvm-svn: 311608
2017-08-23 21:52:24 +00:00
Xinliang David Li c7c5303fa3 [Profile] create a copy of profile file name from environment
Original patch by Max Moroz.

Differential Revsion: http://reviews.llvm.org/D36903

llvm-svn: 311607
2017-08-23 21:39:33 +00:00
Jonas Devlieghere a845167dca [WebAssembly] Fix overflow for input with missing version
Differential revision: https://reviews.llvm.org/D37070

llvm-svn: 311605
2017-08-23 21:36:04 +00:00
Rong Xu 15848e5977 [PGO] Set edge weights for indirectbr instruction with profile counts
Current PGO only annotates the edge weight for branch and switch instructions
with profile counts. We should also annotate the indirectbr instruction as
all the information is there. This patch enables the annotating for indirectbr
instructions. Also uses this annotation in branch probability analysis.

Differential Revision: https://reviews.llvm.org/D37074

llvm-svn: 311604
2017-08-23 21:36:02 +00:00
Adrian Prantl 8040a215c9 Fix a bug in CGDebugInfo::EmitInlineFunctionStart causing DILocations to be
parented in function declarations.

Fixes PR33997.
https://bugs.llvm.org/show_bug.cgi?id=33997

llvm-svn: 311601
2017-08-23 21:24:12 +00:00
Geoff Berry 90bef32219 [AArch64][Falkor] Fix bug in Falkor HWPF tag collision avoidance
LDPDi was incorrectly marked as ignoring the destination register in the
prefetcher tag.

llvm-svn: 311599
2017-08-23 21:11:28 +00:00
Pete Couperus ed9569dac8 Test commit.
Fix instrinsic -> intrinsic typo.

llvm-svn: 311598
2017-08-23 20:58:22 +00:00
Aditya Nandakumar efd8a84cd5 [GISEl]: Translate phi into G_PHI
G_PHI has the same semantics as PHI but also has types.
This lets us verify that the types in the G_PHI are consistent.
This also allows specifying legalization actions for G_PHIs.

https://reviews.llvm.org/D36990

llvm-svn: 311596
2017-08-23 20:45:48 +00:00
Reid Kleckner 950567aac4 Attempt to fix the BUILD_SHARED_LIBS build after the DIExpression change
llvm-svn: 311595
2017-08-23 20:39:35 +00:00