maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
180,800 Commits 23 Branches 0 Tags 2.2 GiB
Commit Graph

2 Commits

Author SHA1 Message Date
Justin Holewinski d068943809 Propagate DAG node ordering during type legalization and instruction selection 
A node's ordering is only propagated during legalization if (a) the new node does
not have an ordering (is not a CSE'd node), or (b) the new node has an ordering
that is higher than the node being legalized.

llvm-svn: 177465
 2013-03-20 00:10:32 +00:00
Justin Holewinski be8dc6499a [NVPTX] Disable vector registers 
Vectors were being manually scalarized by the backend.  Instead,
let the target-independent code do all of the work.  The manual
scalarization was from a time before good target-independent support
for scalarization in LLVM. However, this forces us to specially-handle
vector loads and stores, which we can turn into PTX instructions that
produce/consume multiple operands.

llvm-svn: 174968
 2013-02-12 14:18:49 +00:00