Commit Graph

3821 Commits

Author SHA1 Message Date
Simon Pilgrim 3f64bb9618 [X86][SSE2] Sync with llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
llvm-svn: 270034
2016-05-19 09:52:59 +00:00
Simon Pilgrim 063c57c1f9 Revert r269967 (SSE2 builtin checks) due to failed buildbots
llvm-svn: 269970
2016-05-18 18:22:20 +00:00
Simon Pilgrim 8beed747ce [X86][SSE2] Sync with llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
llvm-svn: 269967
2016-05-18 18:12:34 +00:00
Michael Zuckerman 2cacc35343 [Clang][AVX512] completing missing intrinsics [pandnd].
Differential Revision: http://reviews.llvm.org/D20101

llvm-svn: 269939
2016-05-18 15:25:53 +00:00
Krzysztof Parzyszek e0026e4e21 [Hexagon] Recognize "q" and "v" in inline-asm as register constraints
Clang follow-up to r269933.

llvm-svn: 269934
2016-05-18 14:56:14 +00:00
Simon Pilgrim a090864762 Removed duplicate SSE42 builtin tests from avx-builtins.c
llvm-svn: 269932
2016-05-18 14:32:16 +00:00
Simon Pilgrim 519c78f3ae [X86][SSE42] Sync with llvm/test/CodeGen/X86/sse42-intrinsics-fast-isel.ll
llvm-svn: 269931
2016-05-18 14:29:55 +00:00
Simon Pilgrim 7a4d7d47c9 [X86][SSE41] Sync with llvm/test/CodeGen/X86/sse41-intrinsics-fast-isel.ll
llvm-svn: 269926
2016-05-18 13:47:16 +00:00
Simon Pilgrim 7e148a94a4 [X86][SSE3] Sync with llvm/test/CodeGen/X86/sse3-intrinsics-fast-isel.ll
llvm-svn: 269921
2016-05-18 13:17:39 +00:00
Ashutosh Nema 51c9dd0081 Add new intrinsic support for MONITORX and MWAITX instructions
Summary:
MONITORX/MWAITX instructions provide similar capability to the MONITOR/MWAIT
pair while adding a timer function, such that another termination of the MWAITX
instruction occurs when the timer expires. The presence of the MONITORX and 
MWAITX instructions is indicated by CPUID 8000_0001, ECX, bit 29.

The MONITORX and MWAITX instructions are intercepted by the same bits that
intercept MONITOR and MWAIT. MONITORX instruction establishes a range to be
monitored. MWAITX instruction causes the processor to stop instruction
execution and enter an implementation-dependent optimized state until
occurrence of a class of events.

Opcode of MONITORX instruction is "0F 01 FA". Opcode of MWAITX instruction is
"0F 01 FB". These opcode information is used in adding tests for the
disassembler.

These instructions are enabled for AMD's bdver4 architecture.

Patch by Ganesh Gopalasubramanian!

Reviewers: echristo, craig.topper

Subscribers: RKSimon, joker.eph, llvm-commits, cfe-commits

Differential Revision: http://reviews.llvm.org/D19796

llvm-svn: 269907
2016-05-18 11:56:23 +00:00
Craig Topper 39c871038a [X86] Add immediate range checks for many of the builtins.
This time allow -128 to 255 for builtins that use a char type immediate."

llvm-svn: 269878
2016-05-18 03:18:12 +00:00
Simon Pilgrim 2d1decf7cb [X86][SSE] Tidied up MMX/SSE/SSE2 builtin tests to the correct test file
llvm-svn: 269852
2016-05-17 22:03:31 +00:00
Filipe Cabecinhas 09fbfcafc3 Revert "[X86] Add immediate range checks for many of the builtins."
This reverts commit r269619.

llvm-svn: 269765
2016-05-17 14:07:43 +00:00
Craig Topper dbbe4a5542 [AVX512] Fix return types in several test cases to match the intrinsic they're testing.
llvm-svn: 269738
2016-05-17 04:41:32 +00:00
Craig Topper 8ca5373c72 [X86] Fix a few intrinsic tests to use the return type that matches the intrinsic they're testing.
llvm-svn: 269735
2016-05-17 03:42:37 +00:00
Michael Zuckerman bf05a4589e [Clang][AVX512] completing missing intrinsics for [vpabs] instruction set
Differential Revision: http://reviews.llvm.org/D20069

llvm-svn: 269680
2016-05-16 18:57:24 +00:00
Nico Weber 379a1952b3 [ms] Reintroduce feature guards in intrinsic headers in Microsoft mode
Visual Studio's C++ standard library headers include intrin.h, so the intrinsic
headers get included a lot more often in Microsoft mode than elsewhere. The
AVX512 intrinsics are a lot of code (0.7 MB, causing 30% compile time overhead
for small programs including e.g. <string> and 6% compile time overhead for
larger projects like e.g. v8). Since multiversioning can't be relied on in
Microsoft mode (cl.exe doesn't support it), having faster compiles seems like
the much better tradeoff until we have a better intrinsic story going forward
(which we'll need for e.g. PR19898).

Actually using intrinsics on Windows already requires the right /arch:
settings, so this patch should have no big behavior change.

See also thread "The intrinsics headers (especially avx512) are too big. What
to do about it?" on cfe-dev.

http://reviews.llvm.org/D20291

llvm-svn: 269675
2016-05-16 18:14:07 +00:00
Michael Zuckerman cb85677471 [Clang][AVX512] completing missing intrinsics [vsqrt|vrsqrt|vrcp14 ].
Differential Revision: http://reviews.llvm.org/D20068

llvm-svn: 269649
2016-05-16 11:42:01 +00:00
Craig Topper 9c6c85f1ad [AVX512] Add typecasts to some intrinsics to avoid doing operations on the __m512/__m512i/__m512d types.
llvm-svn: 269631
2016-05-16 06:38:36 +00:00
Craig Topper e5cc18054a [AVX512] Use correct types in test case.
llvm-svn: 269622
2016-05-16 01:09:19 +00:00
Craig Topper 0f7ea93541 [X86] Add immediate range checks for many of the builtins.
llvm-svn: 269619
2016-05-15 22:18:00 +00:00
Craig Topper dca1f230ae [AVX512] Add intrinsics for 512-bit insertf32x8/insertf32x4/inserti32x4.
llvm-svn: 269617
2016-05-15 21:26:20 +00:00
Oleg Ranevskyy 7232f66051 [CodeGen] Clang does not choose aapcs-vfp calling convention for ARM bare metal target with hard float (EABIHF)
Summary:
Clang does not detect `aapcs-vfp` for the EABIHF environment. The reason is that only GNUEABIHF is considered while choosing calling convention, EABIHF is ignored.

This causes clang to use `aapcs` for EABIHF and add the `arm_aapcscc` specifier to functions in generated IR.

The modified `arm-cc.c` test checks that no calling convention specifier is added to functions for EABIHF, which means the default one is used (`CallingConv::ARM_AAPCS_VFP`).

Reviewers: rengolin, compnerd, t.p.northover

Subscribers: aemerson, rengolin, asl, cfe-commits

Differential Revision: http://reviews.llvm.org/D20219

llvm-svn: 269419
2016-05-13 14:45:57 +00:00
Filipe Cabecinhas ab731f7e86 [ubsan] Add -fsanitize-undefined-strip-path-components=N
Summary:
This option allows the user to control how much of the file name is
emitted by UBSan. Tuning this option allows one to save space in the
resulting binary, which is helpful for restricted execution
environments.

With a positive N, UBSan skips the first N path components.
With a negative N, UBSan only keeps the last N path components.

Reviewers: rsmith

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D19666

llvm-svn: 269309
2016-05-12 16:51:36 +00:00
Michael Zuckerman 13d3c002df [clang][AVX512] completing missing set intrinsics
Differential Revision: http://reviews.llvm.org/D20099

llvm-svn: 269172
2016-05-11 11:41:29 +00:00
Michael Zuckerman 5e2c6b6200 [clang][AVX512] completing missing intrinsics for [vpermt2d|vptestm] instruction set.
Differential Revision: http://reviews.llvm.org/D20096

llvm-svn: 269170
2016-05-11 11:21:18 +00:00
NAKAMURA Takumi d4fbaef2b0 clang/test/CodeGen/avx512f-builtins.c: Fix for -Asserts.
llvm-svn: 269079
2016-05-10 17:16:12 +00:00
Michael Zuckerman e9e8e573e3 [Clang][AVX512] completing missing intrinsics [load/store]
Differential Revision: http://reviews.llvm.org/D20063

llvm-svn: 269056
2016-05-10 13:13:54 +00:00
Michael Zuckerman de860e5585 [Clang][AVX512] completing missing intrinsics [vmin/vmax]{sd|sq|uq|ud}.
Differential Revision: http://reviews.llvm.org/D20064

llvm-svn: 269042
2016-05-10 11:34:19 +00:00
Michael Zuckerman 2564d2f5fe [Clang][AVX512] completing missing intrinsics [vextractf].
Differential Revision: http://reviews.llvm.org/D20061

llvm-svn: 269037
2016-05-10 10:14:50 +00:00
Michael Zuckerman 7360d8a9cc [Clang][AVX512] completing missing intrinsics [roundscale, ceil, floor]
Differential Revision: http://reviews.llvm.org/D20070

llvm-svn: 269022
2016-05-10 07:30:58 +00:00
George Burgess IV 3dc1669133 [Sema] Fix an overload resolution bug with enable_if.
Currently, if clang::isBetterOverloadCandidate encounters an enable_if
attribute on either candidate that it's inspecting, it will ignore all
lower priority attributes (e.g. pass_object_size). This is problematic
in cases like:

```
void foo(char *c) __attribute__((enable_if(1, "")));
void foo(char *c __attribute__((pass_object_size(0))))
    __attribute__((enable_if(1, "")));
```

...Because we would ignore the pass_object_size attribute in the second
`foo`, and consider any call to `foo` to be ambiguous.

This patch makes overload resolution consult further tiebreakers (e.g.
pass_object_size) if two candidates have equally good enable_if
attributes.

llvm-svn: 269005
2016-05-10 01:59:34 +00:00
Michael Zuckerman f9be3bb1d5 [clang][AVX512] completing missing intrinsics [vmin/vmax].
Differential Revision: http://reviews.llvm.org/D20062

llvm-svn: 268910
2016-05-09 12:38:49 +00:00
Michael Zuckerman f15447537f [Clang][AVX512] completing missing intrinsics [CVT]
Differential Revision: http://reviews.llvm.org/D20056

llvm-svn: 268903
2016-05-09 10:32:51 +00:00
Krzysztof Parzyszek 09ba254f10 [Hexagon] Add a testcase for __builtin_HEXAGON_A2_tfrpi
llvm-svn: 268637
2016-05-05 15:55:54 +00:00
Marcin Koscielnicki b31ee6db11 [SystemZ] Add -mbackchain option.
This option, like the corresponding gcc option, is SystemZ-specific and
enables storing frame backchain links, as specified in the ABI.

Differential Revision: http://reviews.llvm.org/D19891

llvm-svn: 268575
2016-05-04 23:37:40 +00:00
Michael Zuckerman e6f7389b5a [Clang][Builtin][AVX512] Adding intrinsics fot cvt{u}si2s{d|s} cvt{sd|ss}2{ss|sd} instruction set
Differential Revision: http://reviews.llvm.org/D19765

llvm-svn: 268481
2016-05-04 08:55:11 +00:00
Reid Kleckner 8195f696e4 [X86] Add -malign-double support
The -malign-double flag causes i64 and f64 types to have alignment 8
instead of 4. On x86-64, the behavior of -malign-double is enabled by default.

Rebases and cleans phosek's work here: http://reviews.llvm.org/D12860

Patch by Sean Klein

Reviewers: rnk

Subscribers: rnk, jfb, dschuff, phosek

Differential Revision: http://reviews.llvm.org/D19734

llvm-svn: 268473
2016-05-04 02:58:24 +00:00
Pete Cooper 71dfcb42eb Change test to use regex instead of explicit value numbers. NFC.
We were seeing an internal failure when running this test.  I can't
see a good reason for the difference, but the simple fix is to use
%{{.*}} instead of %1.

llvm-svn: 268416
2016-05-03 18:32:01 +00:00
Michael Zuckerman c66770313a [clang][AVX512][BuiltIn] Adding intrinsics for cast{pd|ps|si}128_{pd|ps|si}512 and castsi256_si512 instruction set
Differential Revision: http://reviews.llvm.org/D19858

llvm-svn: 268387
2016-05-03 14:26:52 +00:00
Michael Zuckerman e871785eb6 [Clang][avx512][Builtin] Adding intrinsics for cvtw2mask{128|256|512} instruction set
Differential Revision: http://reviews.llvm.org/D19766

llvm-svn: 268385
2016-05-03 14:12:23 +00:00
Michael Zuckerman 8bfb7776e4 [Clang][AVX512][Builtin] Adding intrinsics for vcvt{ph|ps}2{ps|ph} instruction set
Differential Revision: http://reviews.llvm.org/D19767

llvm-svn: 268376
2016-05-03 12:45:04 +00:00
Michael Zuckerman 138fc5b5a8 [Clang][AVX512][Builtin] Adding intrinsics for vcvttpd2udq instruction set
Differential Revision: http://reviews.llvm.org/D19768

llvm-svn: 268373
2016-05-03 11:05:24 +00:00
Michael Zuckerman 708e759b86 [Clang][AVX512][BUILTIN] Adding intrinsics for compressstore{df|di|sf|si} instruction set.
Differential Revision: http://reviews.llvm.org/D19808

llvm-svn: 268372
2016-05-03 10:42:46 +00:00
Reid Kleckner 0404605dda Expand aggregate arguments more often on 32-bit Windows
Before this change, we would pass all non-HFA record arguments on
Windows with byval. Byval often blocks optimizations and results in bad
code generation. Windows now uses the existing workaround that other
x86_32 platforms use.

I also expanded the workaround to handle C++ records with constructors
on Windows. On non-Windows platforms, we have to keep generating the
same LLVM IR prototypes if we want our bitcode to be ABI compatible.
Otherwise we will encounter mismatch issues like PR21573.

Essentially fixes PR27522 in Clang instead of LLVM.

Reviewers: hans

Differential Revision: http://reviews.llvm.org/D19756

llvm-svn: 268261
2016-05-02 17:41:07 +00:00
Derek Schuff dbd24b4593 [WebAssembly] Rename memory_size intrinsic to current_memory
This follows the recent change in the wasm spec.

llvm-svn: 268256
2016-05-02 17:26:19 +00:00
Michael Zuckerman 5f0e96e56a [CLANG][AVX512][BUILTIN]movap{d|s}{128|256|512}
Differential Revision: http://reviews.llvm.org/D17818

llvm-svn: 268230
2016-05-02 14:02:01 +00:00
Michael Zuckerman d6e68ce75f [Clang][AVX512][BuiltIn] Adding intrinsics for cvtps2pd instruction set
Differential Revision: http://reviews.llvm.org/D19774

llvm-svn: 268217
2016-05-02 09:42:31 +00:00
Michael Zuckerman 6a0e0871db [Clang][avx512][builtin] Adding intrinsics for vexpand{d|q|ps|pd} instrctuon set
Differential Revision: http://reviews.llvm.org/D19467

llvm-svn: 268214
2016-05-02 08:36:41 +00:00
Michael Zuckerman c62f27e3f4 [Clang][BuiltIn][avx512] Adding intrinsics for vpshufd instruction set
Differential Revision: http://reviews.llvm.org/D19580

llvm-svn: 268213
2016-05-02 07:35:27 +00:00
Michael Zuckerman ac1e519944 [clang][Builtin][AVX512] Adding intrinsics for vmovshdup and vmovsldup instruction set
Differential Revision: http://reviews.llvm.org/D19595

llvm-svn: 268196
2016-05-01 14:43:43 +00:00
Michael Zuckerman 0b9d105a16 [clang][BuiltIn][AVX512]Adding intrinsics for cmp{ss|sd} instruction set.
Differential Revision: http://reviews.llvm.org/D19601

llvm-svn: 268028
2016-04-29 11:01:16 +00:00
Michael Zuckerman 41f5a37707 [Clang][AVX512][Builtin] Adding intrinsics for compress instruction set
Differential Revision: http://reviews.llvm.org/D19599

llvm-svn: 268013
2016-04-29 08:52:02 +00:00
Michael Zuckerman de8d3753d3 [clang][AVX512][Builtin] Adding intrinsics for the SAD instruction set.
Differential Revision: http://reviews.llvm.org/D19591

llvm-svn: 267942
2016-04-28 21:21:08 +00:00
Adrian Prantl 06f445d65b Debug info: Apply an artificial debug location to __cyg_profile_func.* calls.
The LLVM Verifier expects all inlinable calls in debuggable functions to
have a location.

rdar://problem/25818489

llvm-svn: 267904
2016-04-28 17:21:56 +00:00
Vassil Vassilev 928c8254a9 Reland r267691 fixing PR27535.
llvm-svn: 267882
2016-04-28 14:13:28 +00:00
Michael Zuckerman 533e065bdc [Clang][BuiltIn][AVX512] Adding intrinsics fot align{d|q} and palignr instruction set
Differential Revision: http://reviews.llvm.org/D19588

llvm-svn: 267876
2016-04-28 12:47:30 +00:00
Silviu Baranga 632fdc5919 PR27216: Only define __ARM_FEATURE_FMA when the target has VFPv4
Summary:
According to the ACLE spec, "__ARM_FEATURE_FMA is defined to 1 if
the hardware floating-point architecture supports fused floating-point
multiply-accumulate".

This changes clang's behaviour from emitting this macro for v7-A and v7-R
cores to only emitting it when the target has VFPv4 (and therefore support
for the floating point multiply-accumulate instruction).

Fixes PR27216

Reviewers: t.p.northover, rengolin

Subscribers: aemerson, rengolin, cfe-commits

Differential Revision: http://reviews.llvm.org/D18963

llvm-svn: 267869
2016-04-28 11:29:08 +00:00
Michael Zuckerman 514f05543f [Clang][Builtin][AVX512] Adding intrisnics for the vpconflict{q|d} instruction set
Differential Revision: http://reviews.llvm.org/D19525

llvm-svn: 267728
2016-04-27 15:35:13 +00:00
Michael Zuckerman 8c2900f44d [Clang][BuiltIn][AVX512] Adding intrinsics without mask for VBROADCAST and VPBROADCAST instruction set .
Differential Revision: http://reviews.llvm.org/D19196

llvm-svn: 267696
2016-04-27 11:43:14 +00:00
Michael Zuckerman 7c85a8cb46 [Clang][BuiltIn][AVX512]Adding intrinsics for vmovntdqa vmovntpd vmovntps instruction set
Differential Revision: http://reviews.llvm.org/D19529

llvm-svn: 267690
2016-04-27 10:44:15 +00:00
Jacques Pienaar e74d91314a [lanai] Update handling of structs in arguments to be passed in registers.
Previously aggregate types were passed byval, change the ABI to pass these in registers instead.

llvm-svn: 267496
2016-04-26 00:09:29 +00:00
Michael Zuckerman fa508e8b6d [Clang][Builtin][AVX512]Adding k-register logic intrinsics KAND, KANDN, KOR, KORTEST, KXNOR, KXOR, KUNPACK instruction set.
Differential Revision: http://reviews.llvm.org/D19466

llvm-svn: 267425
2016-04-25 16:42:29 +00:00
Michael Zuckerman edc82fe3ef [Clang][Builtin][AVX512]Adding intrinsics for vfpclass{sd|ss} vfpclass{pd|ps} instruction set
Differential Revision: http://reviews.llvm.org/D19476

llvm-svn: 267414
2016-04-25 14:48:23 +00:00
Michael Zuckerman fcf32c2f00 [Clang][AVX512][BUILTIN] Adding intrinsics for VSCATTERPF{1|0}{DPS|QPS|DPD|QPD} instruction set
Differential Revision: http://reviews.llvm.org/D19313

llvm-svn: 267398
2016-04-25 13:01:40 +00:00
Michael Zuckerman 8938e836c4 [Clang][AVX512][BuiltIn] Adding support to intrinsics of VPERMD and VPERMW instruction set
Differential Revision: http://reviews.llvm.org/D19195

llvm-svn: 267380
2016-04-25 05:32:35 +00:00
Duncan P. N. Exon Smith 383f8413cf DebugInfo: Adapt to loss of DITypeRef in LLVM r267296
LLVM stopped using MDString-based type references, and DIBuilder no
longer fills 'retainedTypes:' with every DICompositeType that has an
'identifier:' field.   There are just minor changes to keep the same
behaviour in CFE.

Leaving 'retainedTypes:' unfilled has a dramatic impact on the output
order of the IR though.  There are a huge number of testcase changes,
which were unfortunately not really scriptable.

llvm-svn: 267297
2016-04-23 21:08:27 +00:00
Krzysztof Parzyszek 4dde0e352a [Hexagon] Add definitions for circular and bit-reverse loads/stores
llvm-svn: 267159
2016-04-22 14:58:46 +00:00
Michael Zuckerman 743d68c3cb [clang][AVX512][Builtin] adding intrinsics for vf{n}madd{ss|sd} and vf{n}sub{ss|sd} instruction set
Differential Revision: http://reviews.llvm.org/D19320

llvm-svn: 267135
2016-04-22 10:56:24 +00:00
Michael Zuckerman a1ceca20b6 [Clang][AVX512][BUILTIN] Adding scalar intrinsics for rsqrt14 ,rcp14, getexp and getmant instruction set
Differential Revision: http://reviews.llvm.org/D19326

llvm-svn: 267129
2016-04-22 10:06:10 +00:00
Renato Golin 1f04213e98 [x86] Force mixes asm syntax test to check for x86
llvm-svn: 266993
2016-04-21 14:40:06 +00:00
Michael Zuckerman 4fa96af4db [Clang][AVX512][BuiltIn] Adding intrinsics of VGATHER{DPS|DPD} , VPGATHER{QD|QQ|DD|DQ} and VGATHERPF{0|1}{DPS|QPS|DPD|QPD} instruction set .
Differential Revision: http://reviews.llvm.org/D19224

llvm-svn: 266983
2016-04-21 12:47:27 +00:00
Denis Zobnin 628b022a0e Correctly parse GCC-style asm line following MS-style asm line.
Quit parsing MS-style inline assembly if the following statement has GCC style.
Enables compilation of code like

void f() {
  __asm mov ebx, ecx
  __asm__("movl %ecx, %edx");
}

Differential Revision: http://reviews.llvm.org/D18652

llvm-svn: 266976
2016-04-21 10:59:18 +00:00
Mandeep Singh Grang d9d3b21c32 [Clang] Remove unwanted --check-prefix=CHECK from unit tests. NFC.
Summary:
    Removed unwanted --check-prefix=CHECK from the following unit tests:
      test/CXX/special/class.copy/implicit-move-def.cpp
      test/CodeGen/cleanup-destslot-simple.c
      test/CodeGen/inline-asm-immediate-ubsan.c
      test/CodeGen/mips-interrupt-attr.c
      test/CodeGenCXX/cfi-stats.cpp
      test/CodeGenCXX/copy-constructor-elim.cpp
      test/CodeGenCXX/microsoft-templ-uuidof.cpp
      test/CodeGenCXX/vtable-linkage.cpp
      test/CodeGenObjC/messages-2.m
      test/Driver/noinline.c
      test/Index/remap-load.c
      test/Index/retain-comments-from-system-headers.c
      test/OpenMP/task_if_codegen.cpp
      test/Preprocessor/comment_save_macro.c

Patch by:  Mandeep Singh Grang (mgrang)

Reviewers: rafael, ABataev, rengolin

Projects: #clang-c

Differential Revision: http://reviews.llvm.org/D19232

llvm-svn: 266843
2016-04-20 01:02:18 +00:00
Marcin Koscielnicki 4005070e1b [AArch64] Fix D19098 fallout.
The intrinsic is now called llvm.thread.pointer, not
llvm.aarch64.thread.pointer.  Also, the code handling it in CGBuiltin.cpp
is dead - it's already covered by GCCBuiltin.  Remove it.

Differential Revision: http://reviews.llvm.org/D19099

llvm-svn: 266817
2016-04-19 20:51:00 +00:00
Ahmed Bougacha 1d9de10130 [ARM NEON] Define vfms_f32 on ARM, and all vfms using vfma.
r259537 added vfma/vfms to armv7, but the builtin was only lowered
on the AArch64 side. Instead of supporting it on ARM, get rid of it.

The vfms builtin lowered to:
  %nb = fsub float -0.0, %b
  %r = @llvm.fma.f32(%a, %nb, %c)

Instead, define the operation in terms of vfma, and swap the
multiplicands. It now lowers to:
  %na = fsub float -0.0, %a
  %r = @llvm.fma.f32(%na, %b, %c)

This matches the instruction more closely, and lets current LLVM
generate the "natural" operand ordering:
  fmls.2s v0, v1, v2
instead of the crooked (but equivalent):
  fmls.2s v0, v2, v1
Except for theses changes, assembly is identical.

LLVM accepts both commutations, and the LLVM tests in:
  test/CodeGen/AArch64/arm64-fmadd.ll
  test/CodeGen/AArch64/fp-dp3.ll
  test/CodeGen/AArch64/neon-fma.ll
  test/CodeGen/ARM/fusedMAC.ll
already check either the new one only, or both.

Also verified against the test-suite unittests.

llvm-svn: 266807
2016-04-19 19:44:45 +00:00
Sanjay Patel 461f2ff445 [builtin_expect] tighten checks, add test, add comments
llvm-svn: 266788
2016-04-19 18:17:34 +00:00
Ahmed Bougacha 40a34c2e2a [CodeGen] Widen non-power-of-2 vector HFA base types.
Currently, for the ppc64--gnu and aarch64 ABIs, we recognize:
  typedef __attribute__((__ext_vector_type__(3))) float v3f32;
  typedef __attribute__((__ext_vector_type__(16))) char v16i8;
  struct HFA {
    v3f32 a;
    v16i8 b;
  };

as an HFA. Since the first type encountered is used as the base type,
we pass the HFA as:
    [2 x <3 x float>]
Which leads to incorrect IR (relying on padding values) when the
second field is used.

Instead, explicitly widen the vector (after size rounding) in
isHomogeneousAggregate.

Differential Revision: http://reviews.llvm.org/D18998

llvm-svn: 266784
2016-04-19 17:54:29 +00:00
Michael Zuckerman 6fa512cecf [Clang][Builtin][AVX512] Adding intrinsics for VGETMANT{PD|PS} and VGETEXP{PD|PS} instruction set
Differential Revision: http://reviews.llvm.org/D19197

llvm-svn: 266763
2016-04-19 17:10:29 +00:00
Michael Zuckerman ef2979af50 [Clang][AVX512][BUILTIN] Adding intrinsics support to VEXTRACT{I|F} and VINSERT{I|F} instruction set
Differential Revision: http://reviews.llvm.org/D19097

llvm-svn: 266745
2016-04-19 15:18:23 +00:00
Krzysztof Parzyszek e2bd2dcc9d [Hexagon] V60/HVX builtin definitions for clang
The builtins already exist in LLVM, but are not exposed to the C/C++
programmers. This patch adds all the information about the builtins
needed for clang, as well as a test for all available intrinsics.

llvm-svn: 266671
2016-04-18 21:27:59 +00:00
Adrian Prantl 80578e7ef0 Update testcase to new debug info metadata format.
llvm-svn: 266447
2016-04-15 16:05:13 +00:00
Adrian Prantl e76bda544b Update to match LLVM changes for PR27284.
(Reverse the ownership between DICompileUnit and DISubprogram.)

http://reviews.llvm.org/D19034
<rdar://problem/25256815>

llvm-svn: 266445
2016-04-15 15:55:45 +00:00
Reid Kleckner e1a16467a3 In vector comparisons, handle scalar LHS just as we handle scalar RHS
Summary: Fixes PR27258

Reviewers: rsmith

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D19123

llvm-svn: 266366
2016-04-14 21:03:38 +00:00
Michael Zuckerman 0a3508a8d3 [Clang][AVX512][BUILTIN] Adding support for intrinsics of vpmov{d|q}{b|w|d}{128|256|512} instruction set
Differential Revision: http://reviews.llvm.org/D19055

llvm-svn: 266280
2016-04-14 07:56:51 +00:00
Michael Zuckerman d871531687 [Clang][AVX512][Builtin] Adding intrinsics of vpmovus{d|q}{b|w|d}{128|256|512} instruction set
Differential Revision: http://reviews.llvm.org/D19050

llvm-svn: 266278
2016-04-14 06:48:09 +00:00
Michael Zuckerman e1680617b0 [Clang][AVX512][Builtin] Adding support to intrinsics of pmovs{d|q}{b|w|d}{128|256|512} instruction set
Differential Revision: http://reviews.llvm.org/D19023

llvm-svn: 266202
2016-04-13 15:02:04 +00:00
Michael Zuckerman c2b6128a8f [Clang][AVX512][Builtin] Adding support for VBROADCAST and VPBROADCASTB/W/D/Q instruction set
Differential Revision: http://reviews.llvm.org/D19012

llvm-svn: 266195
2016-04-13 12:58:01 +00:00
Michael Zuckerman 074edd7c1e [Clang][AVX512][Builtin] Adding supporting to intrinsics of cvt{b|d|q}2mask{128|256|512} and cvtmask2{b|d|q}{128|256|512} instruction set.
Differential Revision: http://reviews.llvm.org/D19009

llvm-svn: 266188
2016-04-13 10:49:37 +00:00
Chuang-Yu Cheng 8eac7ae9ad [PPC64][VSX] Add a couple of new data types for vec_vsx_ld and vec_vsx_st intrinsics and fix incorrect testcases with minor refactoring
New added data types:
  vector double vec_vsx_ld (int, const double *);
  vector float vec_vsx_ld (int, const float *);
  vector bool short vec_vsx_ld (int, const vector bool short *);
  vector bool int vec_vsx_ld (int, const vector bool int *);
  vector signed int vec_vsx_ld (int, const signed int *);
  vector unsigned int vec_vsx_ld (int, const unsigned int *);

  void vec_vsx_st (vector double, int, double *);
  void vec_vsx_st (vector float, int, float *);
  void vec_vsx_st (vector bool short, int, vector bool short *);
  void vec_vsx_st (vector bool short, int, signed short *);
  void vec_vsx_st (vector bool short, int, unsigned short *);
  void vec_vsx_st (vector bool int, int, vector bool int *);
  void vec_vsx_st (vector bool int, int, signed int *);
  void vec_vsx_st (vector bool int, int, unsigned int *);

Also fix testcases which use non-vector argument version of vec_vsx_ld or
vec_vsx_st, but pass incorrect parameter.

llvm-svn: 266166
2016-04-13 05:16:31 +00:00
Eric Christopher d5c75eed44 Add a couple of missing vsx load and store intrinsics.
Patch by Jing Yu!

llvm-svn: 266122
2016-04-12 21:08:54 +00:00
Evgeniy Stepanov b0c887762a Stricter checks in the stack-protector codegen test.
llvm-svn: 266095
2016-04-12 17:51:59 +00:00
Michael Zuckerman 04fb3bc682 [Clang][BuiltIn][avx512] Adding avx512 (shuf,sqrt{ss|sd},rsqrt ) builtin to clang
llvm-svn: 266048
2016-04-12 07:59:39 +00:00
Evgeniy Stepanov 368d3074ba Allow simultaneous safestack and stackprotector attributes.
This is the clang part of http://reviews.llvm.org/D18846.
SafeStack instrumentation pass adds stack protector canaries if both
attributes are present on a function. StackProtector pass will step
back if the function has a safestack attribute.

llvm-svn: 266005
2016-04-11 22:27:55 +00:00
Michael Zuckerman 81f468c859 [Clang][AVX512][BuiltIn] Adding avx512 ( psll{d|q}512,psllv{16si|8di},psra{d|q}512,psrav{16si|8di},pternlog{d|q}{128|256|512} ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18926

llvm-svn: 265964
2016-04-11 17:04:21 +00:00
Michael Zuckerman 6b5f4d8ad1 [CLANG] [AVX512] [BUILTIN] Adding PSRA{Q|D|QI|DI}{128|256|512} builtin
Differential Revision: http://reviews.llvm.org/D17693

llvm-svn: 265952
2016-04-11 15:46:39 +00:00
Michael Zuckerman 1af947a7b3 [Clang][AVX512][BuiltIn] Adding avx512 ( punpck{h|l}{dq|qdq}{128|256|512},rndscale{ss|sd}, {scalef{ss|sd|pd512|ps512} ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18929

llvm-svn: 265935
2016-04-11 12:32:31 +00:00
Michael Zuckerman 07525091e6 [Clang][AVX512][BuiltIn] Adding avx512 ( ptest{n}m{b|w}{128|256|512} ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18924

llvm-svn: 265928
2016-04-11 10:22:07 +00:00
Dmitry Polukhin 85eda12d09 [GCC] Attribute ifunc support in clang
This patch add support for GCC attribute((ifunc("resolver"))) for
targets that use ELF as object file format. In general ifunc is a
special kind of function alias with type @gnu_indirect_function. LLVM
patch http://reviews.llvm.org/D15525

Differential Revision: http://reviews.llvm.org/D15524

llvm-svn: 265917
2016-04-11 07:48:59 +00:00
Michael Zuckerman d8d2f62107 [Clang][AVX512][BuiltIn] Adding avx512 ( vperm{i|t}2var, vpermil{var}{ps|pd}{256|512} ) builtin to clang.
Differential Revision: http://reviews.llvm.org/D18933

llvm-svn: 265915
2016-04-11 07:15:34 +00:00
Michael Zuckerman 8d16199b7b [Clang][AVX512][BuiltIn] Adding avx512 ( vcvt ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18932

llvm-svn: 265904
2016-04-10 17:24:03 +00:00
Michael Zuckerman cdd54c83d8 Adding avx512 (unpck{h|l}{pd|ps}, rcp14{pd|ps}{128|256},vplzcnt{d|q} ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18931

llvm-svn: 265896
2016-04-10 12:54:23 +00:00
Michael Zuckerman fa7ccc5bcf [Clang][AVX512][BuiltIn] Adding avx512 ( store ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18925

llvm-svn: 265895
2016-04-10 10:51:04 +00:00
Sanjay Patel ae7a9df7bf make __builtin_isfinite more efficient (PR27145)
isinf (is infinite) and isfinite should be implemented with the same function
except we change the comparison operator.

See PR27145 for more details:
https://llvm.org/bugs/show_bug.cgi?id=27145

Ref: forked off of the discussion in D18513.

Differential Revision: http://reviews.llvm.org/D18648

llvm-svn: 265675
2016-04-07 14:29:05 +00:00
Tim Northover 1390b4479e Restore slightly less dodgy diagnostic handler for inline asm
Turns out it was there mostly to prevent Clang asking people to report a bug.
This time we report something to Clang's real diagnostics handler so that it
exits with something approximating a real error and tidies up after itself.

llvm-svn: 265592
2016-04-06 19:58:07 +00:00
Manman Ren 29be7e10ca Update testing cases after backend changes.
llvm-svn: 265488
2016-04-05 23:27:51 +00:00
Nirav Dave e585b5c52b Fix broken tests from no-jump-table commit
Summary: Fix failing tests from no-jump-table flag addition

Reviewers: jyknight

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18801

llvm-svn: 265439
2016-04-05 18:59:37 +00:00
Nirav Dave d2f44d8de0 Add -fno-jump-tables and-fjump-tables flags
Add no-jump-tables flag to disable use of jump tables when lowering
switch statements

Reviewers: echristo, hans

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18407

llvm-svn: 265425
2016-04-05 17:50:43 +00:00
Andrey Turetskiy fd259ff9c4 [X86] Introduction of -march=lakemont.
Differential Revision: http://reviews.llvm.org/D18651

llvm-svn: 265405
2016-04-05 15:04:26 +00:00
Reid Kleckner 2ed6beac71 Fix test failure from r265361
llvm-svn: 265362
2016-04-04 23:14:14 +00:00
John McCall 8cde42c400 Fix an unused-variable warning by using the variable in the place
it was supposed to have been used.

llvm-svn: 265344
2016-04-04 20:39:50 +00:00
John McCall 12f2352152 IRGen-level lowering for the Swift calling convention.
llvm-svn: 265324
2016-04-04 18:33:08 +00:00
Tim Northover 8c824a07ae Diagnostics: remove dodgy handler for bitcode inlineasm diagnostics.
Whatever crash it was there to present appears to have been fixed in the
backend now, and it had the nasty side-effect of causing clang to exit(0) and
leave a .o containing goodness knows what even when an error hit.

llvm-svn: 265038
2016-03-31 19:19:24 +00:00
Jonas Paulsson 3ace74a414 [SystemZ] Specify required features for builtins.
BuiltinsSystemZ.def is extended to include the required processor
features per intrinsic.

New test test/CodeGen/builtins-systemz-error2.c that checks for
expected errors when instrinsics are used with a subtarget that does
not support the required feature (e.g. vector support).

Reviewed by Ulrich Weigand.

llvm-svn: 264873
2016-03-30 15:51:24 +00:00
Teresa Johnson 0c7bb96533 Prepare tests for change to emit Module SourceFileName to LLVM assembly
Modify these tests to ignore the source file name when looking for the
expected string. It was already catching the source file name once via
the ModuleID, and will catch it another time with an impending change to
LLVM to serialize out the module's SourceFileName.

llvm-svn: 264868
2016-03-30 13:59:49 +00:00
Yunzhong Gao 333e69d70f Fixing PR26558: remove the adx target attribute requirement from adc builtins.
The addcarry and subborrow variants of the builtins do not require the adx
target attribute; only the addcarryx variants require them.

Differential Revision: http://reviews.llvm.org/D18533

llvm-svn: 264801
2016-03-29 22:59:20 +00:00
Hrvoje Varga 14c42eec54 Add additional Hi/Lo registers to Clang MipsTargetInfoBase
Differential Revision: http://reviews.llvm.org/D17378

llvm-svn: 264727
2016-03-29 12:46:16 +00:00
Jacques Pienaar d964cc22d1 [lanai] Add Lanai backend to clang driver.
Changes to clang to add Lanai backend. Adds a new target, ABI and toolchain.

General Lanai backend discussion on llvm-dev thread "[RFC] Lanai backend" (http://lists.llvm.org/pipermail/llvm-dev/2016-February/095118.html).

Differential Revision: http://reviews.llvm.org/D17002

llvm-svn: 264655
2016-03-28 21:02:54 +00:00
Michael Zuckerman def78750b7 [CLANG][avx512][BUILTIN] Adding fixupimm{pd|ps|sd|ss}
getexp{sd|ss} getmant{sd|ss} kunpck{di|si} loada{pd|ps} loaddqu{di|hi|qi|si} max{sd|ss} min{sd|ss} kmov16 builtins to clang


Differential Revision: http://reviews.llvm.org/D18215

llvm-svn: 264574
2016-03-28 12:23:09 +00:00
Eric Christopher 4650272310 The time when -faltivec (or, on clang only, -maltivec) will magically
include altivec.h has come and gone.

Rationale: This causes modules, rewrite-includes, etc to be sad and
people should just include altivec.h in their source.

llvm-svn: 264235
2016-03-24 01:26:08 +00:00
Matt Arsenault 08087c52eb Add missing __builtin_bitreverse8
Also add documentation for bitreverse builtins

llvm-svn: 264203
2016-03-23 22:14:43 +00:00
Andrey Turetskiy 5f1cf5fa66 [X86] Add "x87" in x86 target feature map.
Differential Revision: http://reviews.llvm.org/D13980

llvm-svn: 264149
2016-03-23 11:15:10 +00:00
George Burgess IV 6da4c20f7d [Sema] Allow implicit conversions of &overloaded_fn in C.
Also includes a minor ``enable_if`` docs update.

Currently, our address-of overload machinery will only allow implicit
conversions of overloaded functions to void* in C. For example:

```
void f(int) __attribute__((overloadable));
void f(double) __attribute__((overloadable, enable_if(0, "")));

void *fp = f; // OK. This is C and the target is void*.
void (*fp2)(void) = f; // Error. This is C, but the target isn't void*.
```

This patch makes the assignment of `fp2` select the `f(int)` overload,
rather than emitting an error (N.B. you'll still get a warning about the
`fp2` assignment if you use -Wincompatible-pointer-types).

Differential Revision: http://reviews.llvm.org/D13704

llvm-svn: 264132
2016-03-23 02:33:58 +00:00
Justin Lebar 717d2b0a0d [CUDA] Implement atomicInc and atomicDec builtins
These functions cannot be implemented as atomicrmw or cmpxchg
instructions, so they are implemented as a call to the NVVM intrinsics
@llvm.nvvm.atomic.load.inc.32.p0i32 and
@llvm.nvvm.atomic.load.dec.32.p0i32.

Patch by Jason Henline.

Reviewers: jlebar

Differential Revision: http://reviews.llvm.org/D18322

llvm-svn: 264009
2016-03-22 00:09:28 +00:00
Renato Golin 930de67e6a [ARM] Clang tests for ARM Cortex-A32 support
Patch by Sam Parker.

llvm-svn: 263957
2016-03-21 17:29:51 +00:00
Pirama Arumuga Nainar 8e2e9d6f4c Add -fnative-half-arguments-and-returns
Summary:
r246764 handled __fp16 arguments and returns for AAPCS, but skipped this
handling for OpenCL.  Simlar to OpenCL, RenderScript also handles __fp16
type natively.

This patch adds the -fnative-half-arguments-and-returns command line
flag to allow such languages to skip this coercion of __fp16.

Reviewers: srhines, olista01

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D18138

llvm-svn: 263795
2016-03-18 16:58:36 +00:00
Roman Levenstein 35aa5cecf2 Add attributes for preserve_mostcc/preserve_allcc calling conventions to the C/C++ front-end
Till now, preserve_mostcc/preserve_allcc calling convention attributes were only
available at the LLVM IR level. This patch adds attributes for
preserve_mostcc/preserve_allcc calling conventions to the C/C++ front-end.

The code was mostly written by Juergen Ributzka.
I just added support for the AArch64 target and tests.

Differential Revision: http://reviews.llvm.org/D18025

llvm-svn: 263647
2016-03-16 18:00:46 +00:00
Pablo Barrio 2a35ff0687 Add more ARM Cortex-R8 regression tests to Clang.
Summary:
This patch adds Clang tests for Cortex-R8 related to FP capabilities and
hardware integer divide.

Reviewers: rengolin, bsmith

Subscribers: aemerson, cfe-commits, rengolin

Differential Revision: http://reviews.llvm.org/D18193

llvm-svn: 263632
2016-03-16 10:21:04 +00:00
Marina Yatsina d6d8b315d3 Avoid using LookupResult's implicit copy ctor and assignment operator to avoid warnings
The purpose of this patch is to keep the same functionality without using LookupResult's implicit copy ctor and assignment operator, because they cause warnings when -Wdeprecated is passed.
This patch is meant to help the following review: http://reviews.llvm.org/D18123.
The functionality is covered by the tests in my original commit (255890)
The test case in this patch was added to test a bug caught in the review of the first version of this fix.

Differential Revision: http://reviews.llvm.org/D18175

llvm-svn: 263630
2016-03-16 09:56:58 +00:00
Evgeniy Stepanov 02279ed12d [cfi] Don't emit checks for disabled CFI kinds.
In the cross-DSO CFI mode clang emits __cfi_check_fail that handles
errors triggered from other modules with targets in the current
module. With this change, __cfi_check_fail will handle errors for
CFI kinds that are not enabled in the current module as if they
have the trapping behaviour (-fsanitize-trap=...).

This fixes a bug where some combinations of -fsanitize* flags may
result in a link failure due to a missing sanitizer runtime library
for the diagnostic calls in __cfi_check_fail.

llvm-svn: 263578
2016-03-15 20:19:29 +00:00
Mehdi Amini 557c20a886 Remove compile time PreserveName in favor of a runtime cc1 -discard-value-names option
Summary:
This flag is enabled by default in the driver when NDEBUG is set. It
is forwarded on the LLVMContext to discard all value names (but
GlobalValue) for performance purpose.

This an improved version of D18024

Reviewers: echristo, chandlerc

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D18127

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 263394
2016-03-13 21:05:23 +00:00
Amjad Aboud 13d7a70657 Added test that covers changes in r263379.
llvm-svn: 263380
2016-03-13 11:12:57 +00:00
Reid Kleckner e10b601537 [SEH] Remove nounwind/noinline from outlined finally funclets
With the new EH representation this is no longer necessary.

llvm-svn: 263269
2016-03-11 17:36:16 +00:00
Nico Weber 416ad130ea Reenable asm-errors.c
r134811 made the test pass and reenabled it, but r134831
accidentally disabled it again due to a bad merge.

llvm-svn: 263168
2016-03-10 22:40:02 +00:00
Simon Pilgrim 05e07836c8 Updated SSE3 builtin tests to more closely match the llvm fast-isel equivalent tests
llvm-svn: 263117
2016-03-10 14:46:49 +00:00
Simon Pilgrim 99665cb77f Added note to SSE4a builtins about keeping in sync with llvm tests
llvm-svn: 263116
2016-03-10 14:44:32 +00:00
Simon Pilgrim baed60dd0a Updated SSSE3 builtin tests to more closely match the llvm fast-isel equivalent tests
llvm-svn: 263115
2016-03-10 14:42:17 +00:00
Tim Northover e5dc94ee31 ARM: fix arm_neon_intrinsics.c and re-enable.
It turns out I'd never actually tested my recent change because it was
gated on long-tests. Failure ensued.

llvm-svn: 263093
2016-03-10 04:39:45 +00:00
Richard Trieu 9402d58e5b Disable failing test and fix RUN line.
See https://llvm.org/bugs/show_bug.cgi?id=26894 for details.  This change
fixes the incorrect flags to Clang and the piping issue.  It also disables
the FileCheck portion of the test, which is currently failing.

llvm-svn: 263091
2016-03-10 04:04:12 +00:00
Tim Northover 67181e3c3a ARM & AArch64: fix IR-converted tests.
My script was converting %a0 to [[A]]0 if it had seen %a defined before %a0.
Oops.

llvm-svn: 263056
2016-03-09 20:06:10 +00:00
Kit Barton fbab158767 [PPC] FE support for generating VSX [negated] absolute value instructions
Includes new built-in, conversion of built-in to target-independent intrinsic
and update in the header file. Tests are also updated. There is a second part in
the backend for which I will post a separate code-review. BACKEND PART SHOULD BE
COMMITTED FIRST.

Phabricator: http://reviews.llvm.org/D17816
llvm-svn: 263051
2016-03-09 19:28:31 +00:00
Tim Northover 58672974a9 ARM & AArch64: convert asm tests to LLVM IR and restrict optimizations.
This is mostly a one-time autoconversion of tests that checked assembly after
"-Owhatever" compiles to only run "opt -mem2reg" and check the assembly. This
should make them much more stable to changes in LLVM so they won't break on
unrelated changes.

"opt -mem2reg" is a compromise designed to increase the readability of tests
that check dataflow, while minimizing dependency on LLVM. Hopefully mem2reg is
stable enough that no surpises will come along.

Should address http://llvm.org/PR26815.

llvm-svn: 263048
2016-03-09 18:54:42 +00:00
Tim Northover 6b582867ad AArch64: remove a couple more tests already covered elsewhere.
llvm-svn: 263038
2016-03-09 18:00:06 +00:00
Tim Northover f53713769d AArch64: remove tests of intrinsics completely duplicated elsewhere.
llvm-svn: 262964
2016-03-08 23:10:58 +00:00
Michael Zuckerman e71d59fc4f [CLANG][AVX512][BUILTIN] Add builtin vcomi{ss|sd}
Differential Revision: http://reviews.llvm.org/D17919

llvm-svn: 262847
2016-03-07 19:15:00 +00:00
Marina Yatsina 5f77679356 [ms-inline-asm][AVX512] Add ability to use k registers in MS inline asm + fix bag with curly braces
Until now curly braces could only be used in MS inline assembly to mark block start/end.
All curly braces were removed completely at a very early stage.
This approach caused bugs like:
"m{o}v eax, ebx" turned into "mov eax, ebx" without any error.

In addition, AVX-512 added special operands (e.g., k registers), which are also surrounded by curly braces that mark them as such.
Now, we need to keep the curly braces and identify at a later stage if they are marking block start/end (if so, ignore them), or surrounding special AVX-512 operands (if so, parse them as such).

This patch fixes the bug described above and enables the use of AVX-512 special operands.

This commit is the the clang part of the patch.
The clang part of the review is: http://reviews.llvm.org/D17766
The llvm part of the review is: http://reviews.llvm.org/D17767

Differential Revision: http://reviews.llvm.org/D17766

llvm-svn: 262842
2016-03-07 18:10:25 +00:00
Joerg Sonnenberger d0be8dcbf8 Implement __builtin_eh_return_data_regno for SPARC and SPARC64.
llvm-svn: 262838
2016-03-07 17:19:15 +00:00
Michael Zuckerman 9f33848f04 [CLANG][AVX512][BUILTIN] Adding new feature flag headed files and new BUILTIN vpermi2varq{i|t}{128|256|512}{mask|maskz}
Differential Revision: http://reviews.llvm.org/D17917

llvm-svn: 262834
2016-03-07 17:04:11 +00:00
Amjad Aboud faea560286 Resolved Bug 26414.
https://llvm.org/bugs/show_bug.cgi?id=26414
Since interrupt handler must be returned with iret, tail call can't be used.

Differential Revision: http://reviews.llvm.org/D17853

llvm-svn: 262830
2016-03-07 14:22:46 +00:00
Michael Zuckerman 0190c65571 [CLANG][AVX512][BUILTIN] Adding new feature flag header file and new builtin vpmadd52{h|l}uq{128|256|512}{mask|maskz}
Differential Revision: http://reviews.llvm.org/D17915

llvm-svn: 262820
2016-03-07 09:55:55 +00:00
Michael Zuckerman 912be16a0e [CLANG][AVX512][BUILTIN] Adding vpmultishiftqb{128|256|512}
Differential Revision: http://reviews.llvm.org/D17914

llvm-svn: 262817
2016-03-07 08:29:10 +00:00
David Majnemer e2ae228c76 [X86] Pass __m64 types via SSE registers for GCC compatibility
For compatibility with GCC, classify __m64 as SSE.
However, clang is a platform compiler for certain targets; retain our
old behavior on those targets: classify __m64 as integer.

This fixes PR26832.

llvm-svn: 262688
2016-03-04 05:26:16 +00:00
Michael Zuckerman 0d67e4b5d6 [CLANG][AVX512][BUILTIN] movddup{128|256|512}
Differential Revision: http://reviews.llvm.org/D17826

llvm-svn: 262617
2016-03-03 13:43:05 +00:00
Anastasia Stulova 1f95cc097c [OpenCL] Apply missing restrictions for Blocks in OpenCL v2.0
Applying the following restrictions for block types in OpenCL (v2.0 s6.12.5):
 - __block storage class is disallowed
 - every block declaration must be const qualified and initialized
 - a block can't be used as a return type of a function
 - a blocks can't be used to declare a structure or union field
 - extern speficier is disallowed

Corrected image and sampler types diagnostics with struct and unions.

Review: http://reviews.llvm.org/D16928
llvm-svn: 262616
2016-03-03 13:33:19 +00:00
Michael Zuckerman 56de012b41 Fixing a checkfile error in avx512vlbw-builtins.c
Differential Revision: http://reviews.llvm.org/D17814

llvm-svn: 262611
2016-03-03 12:17:50 +00:00
Michael Zuckerman 1ad03e7f01 [CLANG][AVX512][BUILTIN] movdqu{qi|hi} {128|256|512}
Differential Revision: http://reviews.llvm.org/D17814

llvm-svn: 262609
2016-03-03 11:34:52 +00:00
Michael Zuckerman ffbb67a8e2 [CLANG][AVX512][BUILTIN] movdqa{32|64}{load|store|}{128|256|512}
Differential Revision: http://reviews.llvm.org/D17812

llvm-svn: 262598
2016-03-03 09:26:01 +00:00
Michael Zuckerman abbe34bce6 [Clang][AVX512][BUILTIN] Adding PSRL{W|WI}{128|256|512}
Differential Revision: http://reviews.llvm.org/D17754

llvm-svn: 262593
2016-03-03 08:55:20 +00:00
Rong Xu 9c6f1538cc [PGO] Change profile use cc1 option to handle IR level profiles
This patch changes cc1 option for PGO profile use from
-fprofile-instr-use=<path> to -fprofile-instrument-use-path=<path>.
-fprofile-instr-use=<path> is now a driver only option.

In addition to decouple the cc1 option from the driver level option, this patch
also enables IR level profile use. cc1 option handling now reads the profile
header and sets CodeGenOpt ProfileUse (valid values are {None, Clang, LLVM}
-- this is a common enum for -fprofile-instrument={}, for the profile
instrumentation), and invoke the pipeline to enable the respective PGO use pass.

Reviewers: silvas, davidxl

Differential Revision: http://reviews.llvm.org/D17737

llvm-svn: 262515
2016-03-02 20:59:36 +00:00
Michael Zuckerman 3df95e711f [CLANG] [AVX512] [BUILTIN] Adding PSRA{W|WI}{128|256|512}.
Differential Revision: http://reviews.llvm.org/D17706

llvm-svn: 262481
2016-03-02 12:06:06 +00:00
Michael Zuckerman d15c95a793 [CLANG] [AVX512] [BUILTIN] Adding PSRAV
Differential Revision: http://reviews.llvm.org/D17699

llvm-svn: 262471
2016-03-02 09:05:46 +00:00
Simon Pilgrim 2e6a9a290b Updated SSE41 builtin tests to more closely match the llvm fast-isel equivalent tests
llvm-svn: 262418
2016-03-01 22:38:33 +00:00
David Majnemer 25eb165f18 [MSVC Compat] Correctly handle finallys nested within finallys
We'd lose track of the parent CodeGenFunction, leading us to get
confused with regard to which function a nested finally belonged to.

Differential Revision: http://reviews.llvm.org/D17752

llvm-svn: 262379
2016-03-01 19:42:53 +00:00
Kit Barton 2b36b15834 [PPC64][VSX] Add short, char, and bool data type for vec_vsx_ld and vec_vsx_st intrinsics
Issue: https://llvm.org/bugs/show_bug.cgi?id=26720

Fix compile error when building ffmpeg for PowerPC64LE because of some
vec_vsx_ld/vec_vsx_st intrinsics are not supported by current clang.

New added intrinsics:

(vector) {signed|unsigned} {short|char} vec_vsx_ld: (total: 8)
bool vec_vsx_ld: (total: 1)
(vector) {signed|unsigned} {short|char} vec_vsx_st: (total: 8)
bool vec_vsx_st: (total: 1)
Total: 18 intrinsics

Phabricator: http://reviews.llvm.org/D17637
llvm-svn: 262359
2016-03-01 18:11:28 +00:00
Michael Zuckerman d176d744af [CLANG][AVX512][BUILTIN] Adding PSRL{DI|QI}{128|256|512} builtin
Differential Revision: http://reviews.llvm.org/D17714

llvm-svn: 262355
2016-03-01 17:49:03 +00:00
Michael Zuckerman 0165e7669c [CLANG][AVX512][BUILTIN] Adding PSRLV builtin
Differential Revision: http://reviews.llvm.org/D17718

llvm-svn: 262326
2016-03-01 13:03:45 +00:00
Michael Zuckerman 1ac360cca4 [CLANG] [AVX512] [BUILTIN] Adding PSRA{Q|D|QI|DI}{128|256|512} builtin
Differential Revision: http://reviews.llvm.org/D17693

llvm-svn: 262321
2016-03-01 11:38:16 +00:00
Rong Xu 522b5cb375 [PGO] clang cc1 option change to enable IR level instrumentation
This patch expands cc1 option -fprofile-instrument= with a new value: -fprofile-instrument=llvm
which enables IR level PGO instrumentation.

Reviewers: davidxl, silvas

Differential Revision: http://reviews.llvm.org/D17622

llvm-svn: 262239
2016-02-29 18:54:59 +00:00
Craig Topper b4f83a00a9 [X86] Disabling avx512f should also disable avx512vbmi and avx512ifma. Enabling avx512vbmi or avx512ifma should enable avx512f. Add command line switches and header defines for avx512ifma and avx512vbmi.
llvm-svn: 262201
2016-02-29 06:51:38 +00:00
Michael Zuckerman 431b0e18b4 [CLANG] [AVX512] [BUILTIN] Adding PSLL{V|W|Wi}{128|256|512} builtin
Differential Revision: http://reviews.llvm.org/D17685

llvm-svn: 262177
2016-02-28 07:39:34 +00:00
Matt Arsenault 2d9339890f Add __builtin_canonicalize
llvm-svn: 262122
2016-02-27 09:06:18 +00:00
Paul Robinson 65ab102be3 Fix Clang tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT.
FileCheck actually doesn't support combo suffixes.

Differential Revision: http://reviews.llvm.org/D17589

llvm-svn: 262052
2016-02-26 19:34:01 +00:00
Bob Wilson e7e7c98f0b Fix typo in test/CodeGen/object-size.c CHECK line.
llvm-svn: 261762
2016-02-24 18:38:35 +00:00
Michael Zuckerman 6c317515e4 [CLANG] [AVX512] [BUILTIN] Adding PSHUF{L|H}W{128|256|512} builtin to clang .
Differential Revision: http://reviews.llvm.org/D17539

llvm-svn: 261755
2016-02-24 17:39:35 +00:00
James Y Knight 29b5f086ca Default vaarg lowering should support indirect struct types.
Fixes PR11517 for SPARC.

On most targets, clang lowers va_arg itself, eschewing the use of the
llvm vaarg instruction. This is necessary (at least for now) as the type
argument to the vaarg instruction cannot represent all the ABI
information that is needed to support complex calling conventions.

However, on targets with a simpler varrags ABIs, the LLVM instruction
can work just fine, and clang can simply lower to it. Unfortunately,
even on such targets, vaarg with a struct argument would fail, because
the default lowering to vaarg was naive: it didn't take into account the
ABI attribute computed by classifyArgumentType. In particular, for the
DefaultABIInfo, structs are supposed to be passed indirectly and so
llvm's vaarg instruction should be emitted with a pointer argument.

Now, vaarg instruction emission is able to use computed ABIArgInfo for
the provided argument type, which allows the default ABI support to work
for structs too.

I haven't touched the EmitVAArg implementation for PPC32_SVR4 or XCore,
although I believe both are now redundant, and could be switched over to
use the default implementation as well.

Differential Revision: http://reviews.llvm.org/D16154

llvm-svn: 261717
2016-02-24 02:59:33 +00:00
Michael Zuckerman e98cc7477f [CLANG] [AVX512] [BUILTIN] Adding prorv{d|q}{128|256|512} builtin to clang
Differential Revision: http://reviews.llvm.org/D17512

llvm-svn: 261641
2016-02-23 15:59:47 +00:00
Michael Zuckerman 0231f1649b [CLANG] [AVX512] [BUILTIN] Adding pro{lv|r}{d|q}{128|256|512} builtin to clang
Differential Revision: http://reviews.llvm.org/D17506

llvm-svn: 261635
2016-02-23 13:41:13 +00:00
Marina Yatsina 146d2ec06d [ms-inline-asm] Fixing bug in single asm statement support
Fixing a crash caused by trying to merge a single-line asm statement with an asm block that follows it, e.g:
asm int 4
asm {
  int 5
}

Now, only adjacent single-line asm statements that are not surrounded by braces will be merged into one asm call.

Differential Revision: http://reviews.llvm.org/D17496

llvm-svn: 261618
2016-02-23 08:53:45 +00:00
Dan Gohman 1fcd10ca4e [WebAssembly] Lower va_arg in clang.
This uses the general emitVoidPtrVAArg lowering logic for everything, since
this supports all types, and we don't have any special requirements.

llvm-svn: 261557
2016-02-22 19:17:40 +00:00
Nirav Dave 9a8f97e967 Add support for Android Vector calling convention for AArch64
This modification applies the following Android commit when we have an
Android environment. This is the sole non-renderscript in the Android repo

	commit 9212d4fb30a3ca2f4ee966dd2748c35573d9682c
	Author: Tim Murray <timmurray@google.com>
	Date:   Fri Aug 15 16:00:15 2014 -0700

	    Update vector calling convention for AArch64.

	    bug 16846318

	    Change-Id: I3cfd167758b4bd634d8480ee6ba6bb55d61f82a7

Reviewers: srhines, jyknight

Subscribers: mcrosier, aemerson, rengolin, tberghammer, danalbert, srhines

Differential Revision: http://reviews.llvm.org/D17448

llvm-svn: 261533
2016-02-22 16:48:42 +00:00
Michael Zuckerman 38a2727764 [CLANG] [AVX512] [BUILTIN] Adding prol{d|q|w}{128|256|512} builtin to clang .
Differential Revision: http://reviews.llvm.org/D16985

llvm-svn: 261516
2016-02-22 09:05:41 +00:00
Michael Zuckerman 7a33dce4ef [CLANG] [AVX512] [BUILTIN] Adding pmovzx{b|d|w}{w|d|q}{128|256|512} builtin to clang
Differential Revision: http://reviews.llvm.org/D16961

llvm-svn: 261471
2016-02-21 14:00:11 +00:00
David Majnemer 4ff6f7362b Remove -fnew-ms-eh
This flag no longer controls any behavior inside of clang.

llvm-svn: 261423
2016-02-20 09:23:41 +00:00
Roman Divacky 039b970c97 Fix handling of vaargs on PPC32 when going from regsave to overflow.
It can happen that when we only have 1 more register left in the regsave
area we need to store a value bigger than 1 register and therefore we
go to the overflow area. In this case we have to leave the last slot
in the regsave area unused and keep using overflow area. Do this
by storing a limit value to the used register counter in the overflow block.

Issue diagnosed by and solution tested by Mark Millard!

llvm-svn: 261422
2016-02-20 08:31:24 +00:00
JF Bastien ddb4369ead Add test.
llvm-svn: 261310
2016-02-19 06:54:47 +00:00
Krzysztof Parzyszek da3f20e88e Missed a spot in r261251, also ignore attributes on all pointer parameters
llvm-svn: 261253
2016-02-18 20:30:40 +00:00
Krzysztof Parzyszek 6b2608f2e0 Make test less prone to attribute changes
llvm-svn: 261251
2016-02-18 20:02:03 +00:00
Michael Zuckerman 7cdb72f7ea [CLANG] [AVX512] [BUILTIN] Adding pmovsx{b|d|w}{w|d|q}{128|256|512} builtin to clang
Differential Revision: http://reviews.llvm.org/D16955

llvm-svn: 261196
2016-02-18 09:09:34 +00:00
Krzysztof Parzyszek 8e57697cfd [Hexagon] Specify vector alignment in DataLayout string
The DataLayout can calculate alignment of vectors based on the alignment
of the element type and the number of elements. In fact, it is the product
of these two values. The problem is that for vectors of N x i1, this will
return the alignment of N bytes, since the alignment of i1 is 8 bits. The
vector types of vNi1 should be aligned to N bits instead. Provide explicit
alignment for HVX vectors to avoid such complications.

llvm-svn: 260680
2016-02-12 14:48:34 +00:00
Manman Ren 37dec10dbc [PR26550] Use a different TBAA root for C++ vs C.
This commit changes the root from "Simple C/C++ TBAA" to "Simple C++ TBAA" for
C++.

The problem is that the type name in the TBAA nodes is generated differently
for C vs C++. If we link an IR file for C with an IR file for C++, since they
have the same root and the type names are different, accesses to the two type
nodes will be considered no-alias, even though the two type nodes are from
the same type in a header file.

The fix is to use different roots for C and C++. Types from C will be treated
conservatively in respect to types from C++.

Follow-up commits will change the C root to "Simple C TBAA" plus some mangling
change for C types to make it a little more aggresive.

llvm-svn: 260567
2016-02-11 19:19:18 +00:00
Denis Zobnin 380b224359 [MCU] Fix assertion failure on function returning empty union.
Treat empty struct/union in return type as void for MCU ABI. PR26438.

Differential Revision: http://reviews.llvm.org/D16808

llvm-svn: 260510
2016-02-11 11:26:03 +00:00
Andrey Turetskiy db6655fd90 [X86] Fix stack alignment for MCU target (Clang part), by Anton Nadolskiy.
This patch fixes stack alignments for MCU (should be aligned to 4 bytes).

Differential Revision: http://reviews.llvm.org/D15647

llvm-svn: 260376
2016-02-10 11:58:46 +00:00
Denis Zobnin f49c0f83aa Fix assertion "Chunk.Kind == DeclaratorChunk::Function" with attributed type.
This patch is to upgrade FunctionTypeUnwrapper for correct processing of
AttributedType. Fixes PR25786.
Patch by Alexander Makarov.

Differential Revision: http://reviews.llvm.org/D15373

llvm-svn: 260373
2016-02-10 11:23:48 +00:00
Saleem Abdulrasool adaaccc23b Basic: mark TLS as supported on Windows on ARM
LLVM can now lower TLS access as per the MS ABI on ARM.  This enables the
generation of TLS access for Windows on ARM.

llvm-svn: 259751
2016-02-04 05:05:23 +00:00
Evgeniy Stepanov f31ea30694 [cfi] Safe handling of unaddressable vtable pointers (clang).
Avoid crashing when printing diagnostics for vtable-related CFI
errors. In diagnostic mode, the frontend does an additional check of
the vtable pointer against the set of all known vtable addresses and
lets the runtime handler know if it is safe to inspect the vtable.

http://reviews.llvm.org/D16823

llvm-svn: 259716
2016-02-03 22:18:55 +00:00
Matt Arsenault 105e892c2c Add builtins for bitreverse intrinsic
Follow the naming convention that bswap uses since it's a
similar sort of operation.

llvm-svn: 259671
2016-02-03 17:49:38 +00:00
Marina Yatsina 41c45fa42d -inline-asm][X86] Add ability to use AVX512 in MS inline asm
Defined the new AVX512 registers in clang inline asm.
Fixed a bug in the MC subtarget info creation during the parsing of MS asm statement - now it receives the actual CPU and target features information.

Differential Revision: http://reviews.llvm.org/D16757

llvm-svn: 259639
2016-02-03 11:32:08 +00:00
Oliver Stannard 9181785a0c Add backend dignostic printer for unsupported features
Re-commit of r258950 after fixing layering violation.

The related LLVM patch adds a backend diagnostic type for reporting
unsupported features, this adds a printer for them to clang.

In the case where debug location information is not available, I've
changed the printer to report the location as the first line of the
function, rather than the closing brace, as the latter does not give the
user any information. This also affects optimisation remarks.

llvm-svn: 259499
2016-02-02 13:52:52 +00:00
Denis Zobnin d9e2dcdb42 Fix for PR8901: attribute "mode" rejected for enums and dependent types.
Allow "mode" attribute for enum types, except for vector modes, for compatibility with GCC.
Support "mode" attribute with dependent types.

Differential Revision: http://reviews.llvm.org/D16219

llvm-svn: 259497
2016-02-02 13:50:39 +00:00
Manman Ren 581c2b9d46 Check for frontend errors after releasing the Builder.
Frontend can emit errors when releaseing the Builder. If there are errors before
or when releasing the Builder, we reset the module to stop here before invoking
the backend.

Before this commit, clang will continue to invoke the backend and backend can
crash.

Differential Revision: http://reviews.llvm.org/D16564

llvm-svn: 259116
2016-01-28 23:29:02 +00:00
Rafael Espindola 29dfc23373 Update for llvm change.
llvm-svn: 259108
2016-01-28 22:56:41 +00:00
Oliver Stannard 92d4c328d1 Revert r259036, it introduces a cyclic library dependency
llvm-svn: 259043
2016-01-28 13:09:49 +00:00
Oliver Stannard 7a964feccb Add backend dignostic printer for unsupported features
Re-commit of r258950 after fixing layering violation.

Add backend dignostic printer for unsupported features

The related LLVM patch adds a backend diagnostic type for reporting
unsupported features, this adds a printer for them to clang.

In the case where debug location information is not available, I've
changed the printer to report the location as the first line of the
function, rather than the closing brace, as the latter does not give the
user any information. This also affects optimisation remarks.

Differential Revision: http://reviews.llvm.org/D16591

llvm-svn: 259036
2016-01-28 10:07:34 +00:00
NAKAMURA Takumi 628a7a0aef Revert r258951 (and r258950), "Refactor backend diagnostics for unsupported features"
It broke layering violation in LLVMIR.

clang r258950 "Add backend dignostic printer for unsupported features"
llvm  r258951 "Refactor backend diagnostics for unsupported features"

llvm-svn: 259016
2016-01-28 04:41:32 +00:00
George Burgess IV a2f29fa694 [Sema] Make extended vectors of `bool` an error.
In OpenCL, `bool` vectors are a reserved type, and are therefore
illegal.

Outside of OpenCL, if we try to make an extended vector of N `bool`s,
Clang will lower it to an `[N x i1]`. LLVM has no ABI for bitvectors, so
lots of operations on such vectors are thoroughly broken. As a result,
this patch makes them illegal in everything else, as well. :)

Differential Revision: http://reviews.llvm.org/D15721

llvm-svn: 259011
2016-01-28 01:38:18 +00:00
Evgeniy Stepanov 2952bf5005 Strengthen cfi-check-fail test.
r258993 allows stricter testing for basic block labels by making
sure that they are always followed by ":". Use this to improve the
test.

llvm-svn: 258997
2016-01-27 22:28:56 +00:00
Oliver Stannard 5e03a4b837 Add backend dignostic printer for unsupported features
The related LLVM patch adds a backend diagnostic type for reporting
unsupported features, this adds a printer for them to clang.

In the case where debug location information is not available, I've
changed the printer to report the location as the first line of the
function, rather than the closing brace, as the latter does not give the
user any information. This also affects optimisation remarks.

Differential Revision: http://reviews.llvm.org/D16591

llvm-svn: 258950
2016-01-27 17:30:28 +00:00
Chad Rosier f662fb3dc8 Revert "[Driver] Make sure -fno-math-builtin option is being passed by the driver."
This reverts commit r258814.

llvm-svn: 258815
2016-01-26 16:16:53 +00:00
Chad Rosier 17d2e8789c [Driver] Make sure -fno-math-builtin option is being passed by the driver.
Support for the -fno-math-builtin option was added in r186899.  The codegen side
is being tested in test/CodeGen/nomathbuiltin.c.  The missing part was just
passing the option through the driver.

PR26317

llvm-svn: 258814
2016-01-26 15:52:05 +00:00
Evgeniy Stepanov 3fd61df186 [cfi] Cross-DSO CFI diagnostic mode (clang part)
* Runtime diagnostic data for cfi-icall changed to match the rest of
  cfi checks
* Layout of all CFI diagnostic data changed to put Kind at the
  beginning. There is no ABI stability promise yet.
* Call cfi_slowpath_diag instead of cfi_slowpath when needed.
* Emit __cfi_check_fail function, which dispatches a CFI check
  faliure according to trap/recover settings of the current module.
* A tiny driver change to match the way the new handlers are done in
  compiler-rt.

llvm-svn: 258745
2016-01-25 23:34:52 +00:00
Alexey Bataev 86a489e4f3 Fixed processing of GNU extensions to C99 designated initializers
Clang did not handles correctly inner parts of arrays/structures initializers in GNU extensions to C99 designated initializers. 

llvm-svn: 258668
2016-01-25 05:14:03 +00:00
David Majnemer fc80b6e5d8 [MSVC Compat] Don't provide /volatile:ms semantics to types > pointer
Volatile loads of type wider than a pointer get split by MSVC because
the base x86 ISA doesn't provide loads which are wider than pointer
width.  LLVM assumes that it can emit an cmpxchg8b but this is
problematic if the memory is in a CONST memory segment.

Instead, provide behavior compatible with MSVC: split loads wider than a
pointer.

llvm-svn: 258506
2016-01-22 16:36:44 +00:00
Ekaterina Romanova 08d1f2431d 2 missing intrinsics _cvtss_sh and _mm_cvtps_ph were added to the intrinsics header f16intrin.h
Differential Revision: http://reviews.llvm.org/D16177

llvm-svn: 258492
2016-01-22 06:50:50 +00:00
Peter Collingbourne dc13453128 Introduce -fsanitize-stats flag.
This is part of a new statistics gathering feature for the sanitizers.
See clang/docs/SanitizerStats.rst for further info and docs.

Differential Revision: http://reviews.llvm.org/D16175

llvm-svn: 257971
2016-01-16 00:31:22 +00:00
Alexey Bataev d51e9933b6 [X86] Support 'interrupt' attribute for x86
This attribute may be attached to a function definition and instructs the backend to generate appropriate function entry/exit code so that
it can be used directly as an interrupt handler.
The IRET instruction, instead of the RET instruction, is used to return from interrupt or exception handlers. All registers, except for the EFLAGS register which is restored by the IRET instruction, are preserved by the compiler.
Any interruptible-without-stack-switch code must be compiled with -mno-red-zone since interrupt handlers can and will, because of the hardware design, touch
the red zone.

interrupt handler must be declared with a mandatory pointer argument:
struct interrupt_frame;

__attribute__ ((interrupt))
void f (struct interrupt_frame *frame) {
    ...
}
and user must properly define the structure the pointer pointing to.

exception handler: 

The exception handler is very similar to the interrupt handler with a different mandatory function signature:
#ifdef __x86_64__
typedef unsigned long long int uword_t;
#else
typedef unsigned int uword_t;
#endif

struct interrupt_frame;

__attribute__ ((interrupt))
void f (struct interrupt_frame *frame, uword_t error_code) {
    ...
}
and compiler pops the error code off stack before the IRET instruction.

The exception handler should only be used for exceptions which push an error code and all other exceptions must use the interrupt handler.
The system will crash if the wrong handler is used.
Differential Revision: http://reviews.llvm.org/D15709

llvm-svn: 257867
2016-01-15 04:06:31 +00:00
Kyle Butt 436ff85b63 [PPC] Add long long/double support for vec_cts, vec_ctu and vec_ctf
Add long long/double support for vec_cts, vec_ctu and vec_ctf.

Similar to this change in GCC:
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg02653.html

Patch by Tim Shen.

llvm-svn: 257135
2016-01-08 02:00:48 +00:00
Dan Gohman 0d75f2c538 [WebAssembly] Add -m:e to the target triple.
llvm-svn: 257021
2016-01-07 03:20:15 +00:00
Chad Rosier 7dbc9cf876 [Driver] Add support for -fno-builtin-foo options.
Addresses PR4941 and rdar://6756912.
http://reviews.llvm.org/D15195

llvm-svn: 256937
2016-01-06 14:35:46 +00:00
MinSeong Kim 50d9c156dd [AArch64] Teaches clang about Samsung Exynos-M1
Adds core tuning support for new Samsung Exynos-M1 core (ARMv8-A).

Differential Revision: http://reviews.llvm.org/D15664

llvm-svn: 256829
2016-01-05 12:53:24 +00:00
Alexandros Lamprineas d162b5c8c4 [ARM] [AARCH64] Add CodeGen IR tests for {VS}QRDML{AS}H v8.1a intrinsics.
Differential Revision: http://reviews.llvm.org/D15223

llvm-svn: 256822
2016-01-05 09:58:29 +00:00
Dimitry Andric b1aa87e120 Fix several accidental DOS line endings in source files
Summary:
There are a number of files in the tree which have been accidentally checked in with DOS line endings. Convert these to native line endings.

There are also a few files which have DOS line endings on purpose, and I have set the svn:eol-style property to 'CRLF' on those.

Reviewers: joerg, aaron.ballman

Subscribers: aaron.ballman, cfe-commits

Differential Revision: http://reviews.llvm.org/D15849

llvm-svn: 256704
2016-01-03 15:55:40 +00:00
Asaf Badouh a9d1e18f48 [X86][PKU] add clang intrinsic for {RD|WR}PKRU
Differential Revision: http://reviews.llvm.org/D15837

llvm-svn: 256672
2015-12-31 14:14:07 +00:00
Marina Yatsina afb72f38f8 [ms inline asm] Add support for label names with '$' chars
In MS inline asm syntax a label with '$' char produces an error, while in AT&T it does not.
In AT&T inline asm syntax Clang escapes the '$' char and replaces it with "$$". Adopted same approach for MS syntax.

Differential Revision: http://reviews.llvm.org/D15795

llvm-svn: 256545
2015-12-29 08:49:34 +00:00
Eric Christopher 3cb592d6b6 We check for dwarf 5 in the backend, so go ahead and pass it along via
the front end as well.

Note that DWARF5 isn't finalized and any feature support is subject to
change and accepting of the option doesn't mean we're supporting the
full range of the current standard.

llvm-svn: 256516
2015-12-28 19:58:44 +00:00
Michael Kuperstein f3163dc461 [X86] Better support for the MCU psABI (clang part)
This adds support for the MCU psABI in a way different from r251223 and r251224,
basically reverting most of these two patches. The problem with the approach
taken in r251223/4 is that it only handled libcalls that originated from the backend.
However, the mid-end also inserts quite a few libcalls and assumes these use the
platform's default calling convention.

The previous patch tried to insert inregs when necessary both in the FE and,
somewhat hackily, in the CG. Instead, we now define a new default calling convention
for the MCU, which doesn't use inreg marking at all, similarly to what x86-64 does.

Differential Revision: http://reviews.llvm.org/D15055

llvm-svn: 256495
2015-12-28 14:39:54 +00:00
Sanjay Patel b28ca3f118 fix test that depends on LLVM optimizations
llvm-svn: 256395
2015-12-24 21:53:40 +00:00
Marina Yatsina 59d35f1415 [X86][ms-inline asm] Test case for adding support for memory operands that include structs
Test case for commit 256381

Differential Revision: http://reviews.llvm.org/D15749

llvm-svn: 256382
2015-12-24 12:11:40 +00:00
Anastasia Stulova 76fd1052fd [OpenCL] Fix atomic Builtins check for address spaces of non-atomic pointer
If there are two pointers passed to an atomic Builtin, 
Clang doesn't allow the second (non-atomic) one to be qualified
with an address space.

Remove this restriction by recording the address space of passed pointers
in atomics type diagnostics.

llvm-svn: 256243
2015-12-22 15:14:54 +00:00
Michael Kuperstein 591278c08d [X86] Add missing m64/int64 conversions
Define the 64-bit equivalents of _m_to_int and _m_from_int.

Differential Revision: http://reviews.llvm.org/D15572

llvm-svn: 256122
2015-12-20 12:37:18 +00:00
Michael Kuperstein beae026738 [X86] Add signed aliases for popcnt intrinsics
The Intel manual documents both an unsigned form (_mm_popcnt_u32)
and a signed form (_popcnt32) of the intrinsic. Add the missing signed form.

Differential Revision: http://reviews.llvm.org/D15568

llvm-svn: 256121
2015-12-20 12:35:35 +00:00
Chad Rosier 803f43bf6d [x86] Filecheck is case sensitive. Capitalize directives.
llvm-svn: 255916
2015-12-17 19:01:55 +00:00
Chad Rosier 0df679e450 [x86] Filecheck is case sensitive. Capitalize directives.
llvm-svn: 255915
2015-12-17 18:54:42 +00:00
Marina Yatsina 71ebc691f6 [ms-inline-asm] Add support for composite structs in MS inline asm
Add MS inline asm support for structs that contain fields that are also structs.

Differential Revision: http://reviews.llvm.org/D15578

llvm-svn: 255890
2015-12-17 12:51:51 +00:00
Reid Kleckner 39329d57b5 Reland "[SEH] Use llvm.x86.seh.recoverfp for SEH filters on x64 as well as 32bit"
I forgot to initialize RecoverFP.

llvm-svn: 255731
2015-12-16 00:26:37 +00:00
Reid Kleckner d8f719fa1c Revert "[SEH] Use llvm.x86.seh.recoverfp for SEH filters on x64 as well as 32bit"
This reverts commit r255710.

llvm-svn: 255728
2015-12-16 00:20:21 +00:00
Reid Kleckner cf2626600c [SEH] Use llvm.x86.seh.recoverfp for SEH filters on x64 as well as 32bit
llvm-svn: 255710
2015-12-15 23:47:40 +00:00
Evgeniy Stepanov fd6f92d5cb Cross-DSO control flow integrity (Clang part).
Clang-side cross-DSO CFI.

* Adds a command line flag -f[no-]sanitize-cfi-cross-dso.
* Links a runtime library when enabled.
* Emits __cfi_slowpath calls is bitset test fails.
* Emits extra hash-based bitsets for external CFI checks.
* Sets a module flag to enable __cfi_check generation during LTO.

This mode does not yet support diagnostics.

llvm-svn: 255694
2015-12-15 23:00:20 +00:00
NAKAMURA Takumi db87d5dbfd clang/test/CodeGen/ms_this.cpp: Fix for -Asserts.
llvm-svn: 255690
2015-12-15 22:42:28 +00:00
NAKAMURA Takumi 512bd57699 Fix clang/test/CodeGen/ms_this.cpp.
llvm-svn: 255685
2015-12-15 22:19:00 +00:00
Krzysztof Parzyszek 6c3b837452 Unsupport test that should not be run on Hexagon
llvm-svn: 255667
2015-12-15 19:14:24 +00:00
Michael Zuckerman 724d02a21e [Microsoft][C++] Clang doesn't support a use of "this" pointer inside inline asm
add triple to test

Differential Revision: http://reviews.llvm.org/D15115

llvm-svn: 255647
2015-12-15 14:35:51 +00:00
Michael Zuckerman 229158c491 [Microsoft][C++] Clang doesn't support a use of "this" pointer inside inline asm
Clang doesn’t support a use of “this” pointer inside inline asm.
When I tried to compile a class or a struct (see example) with an inline asm that contains "this" pointer.
Clang returns with an error.
This patch fixes that.

error: expected unqualified-id
For example:
'''
struct A {
    void f() {
          __asm mov eax, this
              // error: expected unqualified-id
                  }
};
'''
Differential Revision: http://reviews.llvm.org/D15115

llvm-svn: 255645
2015-12-15 14:04:18 +00:00
Petar Jovanovic 2f264c31d3 [PowerPC] Fix test/CodeGen/ppc-sfvarargs
The issue seems to be that .ll file may either use number of register
value or alias %numUsedRegs, so the check needs to cover both cases.

This will hopefully fix the last regression introduced by r255515.

llvm-svn: 255539
2015-12-14 20:30:02 +00:00
Petar Jovanovic 59a981a8f3 [PowerPC] Fix make-check issues
Previous change r255515 introduced a couple of issues likely caused by
a different configure setup.

llvm-svn: 255533
2015-12-14 19:22:35 +00:00
Petar Jovanovic 88a328fbbe [Power PC] add soft float support for ppc32
This patch enables soft float support for ppc32 architecture and fixes
the ABI for variadic functions. This is the first in a set of patches
for soft float support in LLVM.

Patch by Strahinja Petrovic.

Differential Revision: http://reviews.llvm.org/D13351

llvm-svn: 255515
2015-12-14 17:51:50 +00:00
Krzysztof Parzyszek 1065323eec [Hexagon] Xfail two tests that fail due to over-aligning arrays
llvm-svn: 255510
2015-12-14 17:17:20 +00:00
Krzysztof Parzyszek 1e6e3c60b4 [Hexagon] Update default paths and arguments
- Removed support for hexagonv3 and earlier.
- Added handling of hexagonv55 and hexagonv60.
- Added handling of target features (hvx, hvx-double).
- Updated paths to reflect current directory layout.

llvm-svn: 255502
2015-12-14 15:03:57 +00:00
David Majnemer 4e52d6f811 Update clang to use the updated LLVM EH instructions
Depends on D15139.

Reviewers: rnk

Differential Revision: http://reviews.llvm.org/D15140

llvm-svn: 255423
2015-12-12 05:39:21 +00:00
Easwaran Raman dd4c71ca6e Revert r254647.
Reason: The testcase fails in many architectures.

Differential Revision: http://reviews.llvm.org/D15163

llvm-svn: 255416
2015-12-12 01:11:09 +00:00
Easwaran Raman d547e5e168 Attach maximum function count to Module when using PGO mode
This sets the maximum entry count among all functions in the program to the
module using module flags. This allows the optimizer to use this information.

Differential Revision: http://reviews.llvm.org/D15163

llvm-svn: 255397
2015-12-12 00:31:02 +00:00