2 Commits

Author	SHA1	Message	Date
Matthias Braun	7a482e2302	RegisterScavenging: Followup to r305625 ... This does some improvements/cleanup to the recently introduced scavengeRegisterBackwards() functionality: - Rewrite findSurvivorBackwards algorithm to use the existing LiveRegUnit::accumulateBackward() code. This also avoids the Available and Candidates bitset and just need 1 LiveRegUnit instance (= 1 bitset). - Pick registers in allocation order instead of register number order. llvm-svn: 305817	2017-06-20 18:43:14 +00:00
Matthias Braun	d78597ec08	AArch64FrameLowering: Check if the ExtraCSSpill register is actually unused ... The code assumed that when saving an additional CSR register (ExtraCSSpill==true) we would have a free register throughout the function. This was not true if this CSR register is also used to pass values as in the swiftself case. rdar://31451816 llvm-svn: 301057	2017-04-21 22:42:08 +00:00