0d639a28aa
Rename TargetSubtarget to TargetSubtargetInfo for consistency.
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llvm-svn: 134259
2011-07-01 21:01:15 +00:00
54b68e3432
- Added MCSubtargetInfo to capture subtarget features and scheduling
...
itineraries.
- Refactor TargetSubtarget to be based on MCSubtargetInfo.
- Change tablegen generated subtarget info to initialize MCSubtargetInfo
and hide more details from targets.
llvm-svn: 134257
2011-07-01 20:45:01 +00:00
703a0fbf39
Hide the call to InitMCInstrInfo into tblgen generated ctor.
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llvm-svn: 134244
2011-07-01 17:57:27 +00:00
fe6e405e8c
Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to
...
be the first encoded as the first feature. It then uses the CPU name to look up
features / scheduling itineray even though clients know full well the CPU name
being used to query these properties.
The fix is to just have the clients explictly pass the CPU name!
llvm-svn: 134127
2011-06-30 01:53:36 +00:00
d0e48c84f0
Remove getRegClassForInlineAsmConstraint from MBlaze. Add a TODO comment
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for the port.
Part of rdar://9643582
llvm-svn: 134085
2011-06-29 19:12:24 +00:00
8264e272a9
Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries) into MC.
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llvm-svn: 134049
2011-06-29 01:14:12 +00:00
194c3dc01f
Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.
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llvm-svn: 134030
2011-06-28 21:14:33 +00:00
0beca53a29
Hide more details in tablegen generated MCRegisterInfo ctor function.
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llvm-svn: 134027
2011-06-28 20:44:22 +00:00
1e210d08d8
Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc
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llvm-svn: 134024
2011-06-28 20:07:07 +00:00
6cc775f905
- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
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sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.
llvm-svn: 134021
2011-06-28 19:10:37 +00:00
09932bd5b6
Fix cmake build.
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llvm-svn: 133989
2011-06-28 03:17:03 +00:00
d9997acd14
Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc
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into XXXGenRegisterInfo.inc.
llvm-svn: 133922
2011-06-27 18:32:37 +00:00
247533179a
Starting to refactor Target to separate out code that's needed to fully describe
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target machine from those that are only needed by codegen. The goal is to
sink the essential target description into MC layer so we can start building
MC based tools without needing to link in the entire codegen.
First step is to refactor TargetRegisterInfo. This patch added a base class
MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
separate register description from the rest of the stuff.
llvm-svn: 133782
2011-06-24 01:44:41 +00:00
99f35eab45
Use set operations instead of plain lists to enumerate register classes.
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This simplifies many of the target description files since it is common
for register classes to be related or contain sequences of numbered
registers.
I have verified that this doesn't change the files generated by TableGen
for ARM and X86. It alters the allocation order of MBlaze GPR and Mips
FGR32 registers, but I believe the change is benign.
llvm-svn: 133105
2011-06-15 23:28:14 +00:00
5750ca7089
Remove custom allocation order boilerplate that is no longer needed.
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The register allocators automatically filter out reserved registers and
place the callee saved registers last in the allocation order, so custom
methods are no longer necessary just for that.
Some targets still use custom allocation orders:
ARM/Thumb: The high registers are removed from GPR in thumb mode. The
NEON allocation orders prefer to use non-VFP2 registers first.
X86: The GR8 classes omit AH-DH in x86-64 mode to avoid REX trouble.
SystemZ: Some of the allocation orders are omitting R12 aliases without
explanation. I don't understand this target well enough to fix that. It
looks like all the boilerplate could be removed by reserving the right
registers.
llvm-svn: 132781
2011-06-09 16:56:59 +00:00
0713a9d8fc
Add a parameter to CCState so that it can access the MachineFunction.
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No functional change.
Part of PR6965
llvm-svn: 132763
2011-06-08 23:55:35 +00:00
08600bcf65
Use the dwarf->llvm mapping to print register names in the cfi
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directives.
Fixes PR9826.
llvm-svn: 132317
2011-05-30 20:20:15 +00:00
ecb5573047
Remove DwarfRegNum from CARRY. I should be encoded with DW_OP_bit_piece.
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llvm-svn: 132190
2011-05-27 16:01:08 +00:00
e3a07a3b42
Fix some dwarf register numbers.
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llvm-svn: 132136
2011-05-26 19:25:47 +00:00
b9bef106c6
Add missing mayLoad / mayStore flags to instruction definitions without patterns,
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which fixes all of the CodeGen/MBlaze verifier failures.
llvm-svn: 131595
2011-05-18 23:03:10 +00:00
2518f8376d
Make the logic for determining function alignment more explicit. No functionality change.
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llvm-svn: 131012
2011-05-06 20:34:06 +00:00
9b73c8e293
Remove some hard coded CR-LFs. Some of these were the entire files, one of
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these was just one line of a file. Explicitly set the eol-style property on the
files to try and ensure this fix stays.
llvm-svn: 130125
2011-04-25 07:11:23 +00:00
2b9b0e3748
ADT/Triple: Move a variety of clients to using isOSDarwin() and isOSWindows()
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predicates.
llvm-svn: 129816
2011-04-19 21:14:45 +00:00
0ab5e2cded
Fix a ton of comment typos found by codespell. Patch by
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Luis Felipe Strano Moraes!
llvm-svn: 129558
2011-04-15 05:18:47 +00:00
f30a0e2d80
Fix an error in the MBlaze delay slot filler.
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llvm-svn: 129313
2011-04-11 22:45:02 +00:00
1914c39bd4
Add scheduling information for the MBlaze backend.
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llvm-svn: 129311
2011-04-11 22:31:52 +00:00
e3685217d0
Don't crash on invalid instructions when disassembling MBlaze code.
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This fixes http://llvm.org/bugs/show_bug.cgi?id=9653
llvm-svn: 129303
2011-04-11 21:35:21 +00:00
00f0cddfd4
We need to pass the TargetMachine object to the InstPrinter if we are printing
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the alias of an InstAlias instead of the thing being aliased. Because we need to
know the features that are valid for an InstAlias.
This is part of a work-in-progress.
llvm-svn: 127986
2011-03-21 04:13:46 +00:00
f3292b2196
Revert r124611 - "Keep track of incoming argument's location while emitting LiveIns."
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In other words, do not keep track of argument's location. The debugger (gdb) is not prepared to see line table entries for arguments. For the debugger, "second" line table entry marks beginning of function body.
This requires some coordination with debugger to get this working.
- The debugger needs to be aware of prolog_end attribute attached with line table entries.
- The compiler needs to accurately mark prolog_end in line table entries (at -O0 and at -O1+)
llvm-svn: 126155
2011-02-21 23:21:26 +00:00
ba1186c23e
Use explicit add_subdirectory's for LLVM target sublibraries instead
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of testing for its presence at cmake time.
This way the build automatically regenerates the makefiles when a svn
update brings in a new sublibrary.
llvm-svn: 126068
2011-02-20 02:55:27 +00:00
4c14a5cc2c
Triple::MinGW64 is deprecated and removed. We can use Triple::MinGW32 generally.
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No one uses *-mingw64. mingw-w64 is represented as {i686|x86_64}-w64-mingw32. In llvm side, i686 and x64 can be treated as similar way.
llvm-svn: 125747
2011-02-17 12:24:17 +00:00
6619340462
MC/AsmParser: Add support for allowing the conversion process to fail (via
...
custom conversion functions).
llvm-svn: 124872
2011-02-04 17:12:23 +00:00
fb0bd049da
Fix 80-column violations and whitespace.
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llvm-svn: 124819
2011-02-03 21:46:10 +00:00
56cc5fdf09
Keep track of incoming argument's location while emitting LiveIns.
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llvm-svn: 124611
2011-01-31 21:38:14 +00:00
36b1b47c5a
Introduce virtual ParseRegister method in TargetAsmParser.
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Create override of this method in X86/ARM/MBlaze.
llvm-svn: 124378
2011-01-27 17:14:22 +00:00
b3eca9bb71
Add support for the --noexecstack option.
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llvm-svn: 124077
2011-01-23 17:55:27 +00:00
0e7e34e476
Remove more duplicated code.
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llvm-svn: 124056
2011-01-23 04:43:11 +00:00
aea4958ea6
Remove duplicated code.
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llvm-svn: 124054
2011-01-23 04:28:49 +00:00
4bc5e38960
Teach frame lowering to ignore debug values after the terminators.
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llvm-svn: 123399
2011-01-13 21:28:52 +00:00
5fb942a307
Fix merge fallout
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llvm-svn: 123172
2011-01-10 12:56:18 +00:00
441ae5b88c
Update CMake stuff
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llvm-svn: 123171
2011-01-10 12:39:23 +00:00
2f93128109
Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
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llvm-svn: 123170
2011-01-10 12:39:04 +00:00
6eb516dbea
Do not model all INLINEASM instructions as having unmodelled side effects.
...
Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.
This allows memory instructions to be moved around INLINEASM instructions.
llvm-svn: 123044
2011-01-07 23:50:32 +00:00
3aa955e906
Remove dead code and silence warnings.
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llvm-svn: 122957
2011-01-06 13:01:02 +00:00
07fd1efcfa
Commit 122778 broke DWARF debug output when using the MBlaze backend. Fixed by overriding TargetFrameInfo::getFrameIndexOffset to take into account the new frame index information.
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llvm-svn: 122889
2011-01-05 17:34:20 +00:00
6941044c72
Fix more stack layout issues in the MBlaze backend.
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llvm-svn: 122778
2011-01-03 21:40:26 +00:00
1f289afc25
Fix stack layout error in MBlaze backend.
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llvm-svn: 122631
2010-12-29 19:46:28 +00:00
2a0a3b43d7
Flag -> Glue, the ongoing saga
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llvm-svn: 122513
2010-12-23 18:28:41 +00:00
ff2cd2ea6c
Don't generate carry bit when loading immediate values on the Microblaze.
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llvm-svn: 122385
2010-12-22 01:29:32 +00:00
3a3a5795c5
Add support for some of the LLVM atomic operations to the MBlaze backend.
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llvm-svn: 122384
2010-12-22 01:15:01 +00:00
1cd1554ca0
Modeling the carry bit in the MSR register of the MicroBlaze.
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llvm-svn: 122381
2010-12-22 00:53:07 +00:00
8143c61b91
Fix a regression introduced into the MBlaze delay slot filler.
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llvm-svn: 122379
2010-12-22 00:22:59 +00:00
3e5fbd74ed
rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
...
something that just glues two nodes together, even if it is
sometimes used for flags.
llvm-svn: 122310
2010-12-21 02:38:05 +00:00
ae58e7b179
Teach the MBlaze disassembler to disassemble special purpose registers.
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llvm-svn: 122269
2010-12-20 21:18:04 +00:00
3307d7cbad
Teach the MBlaze asm parser how to parse special purpose register names.
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llvm-svn: 122261
2010-12-20 20:43:24 +00:00
8396dd0893
Remove the MCObjectFormat class.
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llvm-svn: 122147
2010-12-18 05:37:28 +00:00
fdaae0d16f
Move some data to the TargetWriter.
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llvm-svn: 122134
2010-12-18 03:27:34 +00:00
292b44baea
Pass StringRefs by value, for consistency.
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llvm-svn: 122074
2010-12-17 18:19:06 +00:00
6b5e56c2b1
Stub out explicit MCELFObjectTargetWriter interface.
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llvm-svn: 122067
2010-12-17 17:45:22 +00:00
f0e24d426a
Move createELFObjectWriter to its own header.
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llvm-svn: 122064
2010-12-17 16:59:53 +00:00
d2867f13a0
MC/Target: Remove HasScatteredSymbols target hook variable, which has been
...
superceded and was effectively dead.
llvm-svn: 122024
2010-12-17 02:06:08 +00:00
266f4092d7
Fix MBlaze backend call instructions so that arguments passed through registers
...
are correctly marked as used. This removes a hack where the call instructions
marked all possible argument registers as used in the tablegen description.
llvm-svn: 121994
2010-12-16 19:41:31 +00:00
0c9d9fdd81
MC: Move target specific fixup info descriptors to TargetAsmBackend instead of
...
the MCCodeEmitter, which seems like a better organization.
- Also, cleaned up some magic constants while in the area.
llvm-svn: 121953
2010-12-16 03:20:06 +00:00
0c558b2080
Lower the MBlaze target specific calling conventions for "interrupt_handler"
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and "save_volatiles" correctly. This completes the custom calling convention
functionality changes for the MBlaze backend that were started in 121888.
llvm-svn: 121891
2010-12-15 20:27:28 +00:00
fdb174b6ef
Add some special purpose register definitions to the MBlaze backend and cleanup some old, unused floating point register definitions.
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llvm-svn: 121882
2010-12-15 19:35:36 +00:00
b4f896ce90
Missed some ADDI <-> ADDIK conversions in 121649.
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llvm-svn: 121652
2010-12-12 22:53:14 +00:00
7d99b5b651
MBlaze delay slot filler was not capable of using ADDK and variants to fill delay slots. This broke several test cases when 121649 was committed. This fixes the regression.
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llvm-svn: 121650
2010-12-12 22:22:49 +00:00
632b5926d3
The ADD and ADDK (and all variants) instructions where flip-flopped in the MBlaze backend. This bug fix makes 64-bit math work on the MBlaze backend.
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llvm-svn: 121649
2010-12-12 22:02:31 +00:00
968bc26a0a
1. Change MBlaze indirect branches to use absolute branch BRALD instead of pc relative branch BRLD.
...
2. Make sure that the MBlaze stack is aligned to 4-byte boundaries.
3. Determine frame indexes that should be placed in the callers stack frame, as per the MBlaze ABI, and place them in the correct locations.
llvm-svn: 121639
2010-12-12 20:52:31 +00:00
4c196543f5
Reworking the stack layout generated by the MBlaze backend.
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llvm-svn: 121355
2010-12-09 03:42:04 +00:00
dba03b050f
Adding bug fix that was suppose to be part of 121044.
...
patch contributed by Jack Whitham!
llvm-svn: 121049
2010-12-06 22:19:28 +00:00
8da34b6c35
Fixed reversed operands for IDIV and CMP instructions in MBlaze backend.
...
Use BRAD instead of BRD for indirect branches in MBlaze backend.
patch contributed by Jack Whitham!
llvm-svn: 121044
2010-12-06 22:06:49 +00:00
6ce9b60811
Fix a 16-bit immediate value detection bug in the MBlaze delay slot filler.
...
Address more hazards in the MBlaze delay slot filler.
patch contributed by Jack Whitham!
llvm-svn: 121037
2010-12-06 21:11:01 +00:00
0f30fec0bd
Remove the instruction fragment to data fragment lowering since it was causing
...
freed data to be read. I will open a bug to track it being reenabled.
llvm-svn: 121028
2010-12-06 19:08:48 +00:00
11ab8ddf10
Teaching MBlaze backend how to reverse branch conditions.
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llvm-svn: 120707
2010-12-02 16:17:11 +00:00
8a3a7923eb
Define generic 1, 2 and 4 byte pc relative relocations. They are common
...
and at least the 4 byte one will be needed to implement the .cfi_* directives.
llvm-svn: 120240
2010-11-28 14:17:56 +00:00
bf4a4e4ad9
Remove the unused TheTarget member.
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llvm-svn: 120168
2010-11-26 04:24:21 +00:00
8ad3b25633
Updating MBlaze .mask and .frame directives to match GCC's output and fixing regression introduced in 120095 by checking MCStreamer::hasRawTextSupport.
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llvm-svn: 120097
2010-11-24 16:32:35 +00:00
51917b868d
1. Fixing error where basic block labels were not being printed out when they need to be for the MBlaze backend because AsmPrinter::isBlockOnlyReachableByFallthrough does not take into account delay slots.
...
2. Re-adding .mask and .frame directives in printed assembly.
3. Adding .ent and .end directives in printed assembly.
4. Minor cleanups to MBlaze backend.
llvm-svn: 120095
2010-11-24 15:39:32 +00:00
527da1b6e2
Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.
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llvm-svn: 119990
2010-11-23 03:31:01 +00:00
7699d6cfe9
Implement ELF object file writing support for the MBlaze backend. Its not perfect yet, but it works for many tests.
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llvm-svn: 119952
2010-11-21 22:06:28 +00:00
f1d3800e65
Implement branch analysis in the MBlaze backend.
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llvm-svn: 119951
2010-11-21 21:53:36 +00:00
f4efd582ad
Make it a little bit more explicit that the MBlaze backend only supports upto
...
32-bit immediate values.
llvm-svn: 119950
2010-11-21 21:39:46 +00:00
7493e30d42
Fix an error in the MBlaze delay slot filler where instructions that already
...
fill a delay slot are moved to fill a different delay slot.
llvm-svn: 119949
2010-11-21 21:36:12 +00:00
0eecf5d201
Move hasFP() and few related hooks to TargetFrameInfo.
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llvm-svn: 119740
2010-11-18 21:19:35 +00:00
7a2cd8b540
make isVirtualSection a virtual method on MCSection. Chris' suggestion.
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llvm-svn: 119547
2010-11-17 20:03:54 +00:00
63274cbc5d
add fields to the .td files unconditionally, simplifying tblgen a bit.
...
Switch the ARM backend to use 'let' instead of 'set' with this change.
llvm-svn: 119120
2010-11-15 05:19:05 +00:00
51d2e9ca29
Attempt to unbreak cmake-based builds
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llvm-svn: 119098
2010-11-15 00:48:12 +00:00
f7183edb59
First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place
...
llvm-svn: 119097
2010-11-15 00:06:54 +00:00
fe0c28f4db
MC: Simplify Mach-O and ELF object writer implementations.
...
- What was I thinking?????
llvm-svn: 118992
2010-11-13 07:33:40 +00:00
82471189b7
Fixed error and re-enabled MBlaze MC disassembler tests.
...
llvm-svn: 118987
2010-11-13 05:48:21 +00:00
b3099e6863
1. Adding test cases for MBlaze MC disassembler.
...
2. Fixing several errors in disassembler uncovered by test cases.
3. Fixing invalid encoding of PCMPEQ and PCMPNE uncovered by test cases.
llvm-svn: 118969
2010-11-13 02:37:59 +00:00
240162629c
1. Adding missing immediate mode asm parser test cases.
...
2. Fixing improper immediate mode reverse subtract.
llvm-svn: 118948
2010-11-13 00:03:46 +00:00
4b074b8995
Fixing improperly encoded reverse subtract instructions in MBlaze backend.
...
llvm-svn: 118943
2010-11-12 23:41:10 +00:00
c542248602
1. Finishing MBlaze MC asm parser test cases
...
2. Parsing .word directive in MBlaze asm parser
3. Fixing hack where memory instructions reversed order of last two parameters
4. Fixing many improperly encoded instructions
5. Support parsing special instructions (MFS,MTS,etc.)
6. Removing unused functions from inst printer
llvm-svn: 118941
2010-11-12 23:30:17 +00:00
8abdf4b6ea
The BRK instruction in the MicroBlaze is a branch-and-link.
...
llvm-svn: 118848
2010-11-11 22:21:08 +00:00
bf65066a37
Fix tblgen instruction errors exposed by MC asm parser tests
...
Fix minimum 16-bit signed value error exposed by MC asm parser tests
Add initial MC asm parser tests for the MBlaze backend
llvm-svn: 118844
2010-11-11 21:40:53 +00:00
d1a6f5a384
Fixed some bugs in MBlaze asm parser that were introduced when removing OwningPtrs from the code.
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llvm-svn: 118807
2010-11-11 18:41:33 +00:00
fc82674b9c
Adding working version of assembly parser for the MBlaze backend
...
Major cleanup of whitespace and formatting issues in MBlaze backend
llvm-svn: 118434
2010-11-08 19:40:01 +00:00
71049f78ed
In the calling convention logic, ValVT is always a legal type,
...
and as such can be represented by an MVT - the more complicated
EVT is not needed. Use MVT for ValVT everywhere.
llvm-svn: 118245
2010-11-04 10:49:57 +00:00
Evan Cheng