Commit Graph

381032 Commits

Author SHA1 Message Date
Christopher Di Bella 4f395db86b adds more checks to -Wfree-nonheap-object
This commit adds checks for the following:

* labels
* block expressions
* random integers cast to `void*`
* function pointers cast to `void*`

Differential Revision: https://reviews.llvm.org/D94640
2021-02-25 19:25:00 +00:00
Fangrui Song 5bcb199a43 [test] Improve SanitizerCoverage tests 2021-02-25 11:20:40 -08:00
Peyton, Jonathan L d12ae7db99 [OpenMP] Fix accidental addition of use omp_lib_kinds
Fortran header accidentally had use omp_lib_kinds added inside a
subroutine and function. This patch removes the lines.
2021-02-25 12:49:56 -06:00
Jez Ng 84579fc24f [lld-macho] Basic support for linkage and visibility attributes in LTO
When parsing bitcode, convert LTO Symbols to LLD Symbols in order to perform
resolution. The "winning" symbol will then be marked as Prevailing at LTO
compilation time. This is similar to what the other LLD ports do.

This change allows us to handle `linkonce` symbols correctly, and to deal with
duplicate bitcode symbols gracefully. Previously, both scenarios would result in
an assertion failure inside the LTO code, complaining that multiple Prevailing
definitions are not allowed.

While at it, I also added basic logic around visibility. We don't do anything
useful with it yet, but we do check that its value is valid. LLD-ELF appears to
use it only to set FinalDefinitionInLinkageUnit for LTO, which I think is just a
performance optimization.

From my local experimentation, the linker itself doesn't seem to do anything
differently when encountering linkonce / linkonce_odr / weak / weak_odr. So I've
only written a test for one of them. LLD-ELF has more, but they seem to mostly
be testing the intermediate bitcode output of their LTO backend...? I'm far from
an expert here though, so I might very well be missing things.

Reviewed By: #lld-macho, MaskRay, smeenai

Differential Revision: https://reviews.llvm.org/D94342
2021-02-25 13:27:40 -05:00
Stanislav Mekhanoshin d9c99043bd Option to ignore llvm[.compiler].used uses in hasAddressTaken()
Differential Revision: https://reviews.llvm.org/D96087
2021-02-25 10:06:24 -08:00
Simon Pilgrim 9490b9f14b [DAG] Move simplification of SADDSAT/SSUBSAT/UADDSAT/USUBSAT of vXi1 to getNode()
As discussed on D97276 we should be able to always do this in node creation, we don't need a combine.
2021-02-25 17:49:26 +00:00
Stanislav Mekhanoshin 29e2d9461a Option to ignore assume like intrinsic uses in hasAddressTaken()
Differential Revision: https://reviews.llvm.org/D96081
2021-02-25 09:48:29 -08:00
Jon Roelofs 7f6e331645 Support `#pragma clang section` directives on MachO targets
rdar://59560986

Differential Revision: https://reviews.llvm.org/D97233
2021-02-25 09:30:10 -08:00
Craig Topper ceaedfb5fc [X86] Remove custom lowering of vXi1 ADD/SUB now that they are canonicalized to XOR in getNode.
Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D97478
2021-02-25 08:52:41 -08:00
Stanislav Mekhanoshin 502b3bfc6a [AMDGPU] require s-memtime-inst for __builtin_amdgcn_s_memtime
Differential Revision: https://reviews.llvm.org/D97420
2021-02-25 08:31:59 -08:00
Rong Xu 6103b6ad69 [SampleFDO][NFC] Refactor: make SampleProfileLoaderBaseImpl a template class
This patch makes SampleProfileLoaderBaseImpl a template class so it
can be used in CodeGen transformation.

Noticeable changes:
 * use one template parameter and use IRTraits to get other used
   types an type specific functions.
 * remove the temporary "inline" keywords in previous refactor
   patch.
 * change the template function findEquivalencesFor to a regular
   function. This function has a single caller with type of
   PostDominatorTree. It's simpler to use the type directly
   because MachinePostDominatorTree is not a derived type of
   template DominatorTreeBase.

Differential Revision: https://reviews.llvm.org/D96981
2021-02-25 08:26:17 -08:00
Diego Caballero ebca222b65 [mlir] Check 'iter_args' in 'isLoopParallel' utility
Fix 'isLoopParallel' utility so that 'iter_args' is taken into account
and loops with loop-carried dependences are not classified as parallel.

Reviewed By: tungld, vinayaka-polymage

Differential Revision: https://reviews.llvm.org/D97347
2021-02-25 18:12:34 +02:00
Tung D. Le 203d5eeec5 [MLIR][affine-loop-fusion] Handle defining ops between the source and dest loops
This patch handles defining ops between the source and dest loop nests, and prevents loop nests with `iter_args` from being fused.

If there is any SSA value in the dest loop nest whose defining op has dependence from the source loop nest, we cannot fuse the loop nests.

If there is a `affine.for` with `iter_args`, prevent it from being fused.

Reviewed By: dcaballe, bondhugula

Differential Revision: https://reviews.llvm.org/D97030
2021-02-25 18:12:34 +02:00
Fraser Cormack b368fc735d [CodeGen] Format code comment to 80 columns. NFC. 2021-02-25 15:55:21 +00:00
Florian Hahn 261f219ffc
[IndVars] Add test cases inspired by PR48965. 2021-02-25 15:54:18 +00:00
Craig Topper 95c6824995 [RISCV] Teach CleanupVSETVLI to remove 'vsetvli zero, zero, vtype' when the vtype matches the previous vsetvli or vsetivli
Reviewed By: frasercrmck, arcbbb

Differential Revision: https://reviews.llvm.org/D97408
2021-02-25 07:51:19 -08:00
Nico Weber 03b7bc0ba1 [arm builtin crosscompile docs] add COMPILER_RT_BUILD_MEMPROF=OFF
Reported by artok on irc, thanks!
2021-02-25 10:44:52 -05:00
Nico Weber b4f8daa5ec [arm builtin crosscompile docs] alphabetize flags, no behavior change 2021-02-25 10:44:16 -05:00
Craig Topper 25c6b7ddd2 [RISCV] Add isel pattern to match X > -1 to bgez.
Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D97262
2021-02-25 07:42:22 -08:00
Albion Fung 3b7104a2f2 Fix a test case that should check whether or not it is passed into lld
This test case was causing a PowerPC buildbot to fail as it happened to
be named lld-multistage,
which matches with the original regex and therefore fails the check-not.
This should better represent the desired check.

Differential Revision: https://reviews.llvm.org/D97423
2021-02-25 10:32:32 -05:00
Timm Bäder 2cc58463ca [clang][sema] Ignore xor-used-as-pow if both sides are macros
This happens in codebases a lot, which use xor where both sides are
macros. Using xor in that case is not the common error-prone 2^6 code
that the warning was introduced for.

Don't diagnose such a use of xor.

Differential Revision: https://reviews.llvm.org/D97445
2021-02-25 16:31:07 +01:00
Vladislav Vinogradov f4d78a5e3a [mlir][NFC] Add missing namespace qualifier to ODS generated code
Use `::mlir::Region` inside array ref for `VariadicRegion`.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D97376
2021-02-25 17:48:32 +03:00
Fraser Cormack 0ad86f879f [RISCV] Update RVV ISA section-header comments. NFC.
Some of the section headers had become stale with the transition from
RVV specification version 0.9 to 0.10. This patch brings them up to
date.
2021-02-25 14:15:28 +00:00
Fraser Cormack 02f435db0b [RISCV] Support fixed-length vector i2fp/fp2i conversions
This patch extends the support for scalable-vector int->fp and fp->int
conversions by additionally handling fixed-length vectors.

The existing scalable-vector lowering re-expresses widening/narrowing by
x4+ conversions as standard nodes. The fixed-length vector support slots
in at "the end" of this process by lowering the now equally-sized and
widening/narrowing by x2 nodes to our custom VL versions.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D97374
2021-02-25 13:47:58 +00:00
Shao-Ce Sun ad14ccc8c2 [clang][flang] Improve the consistency of the code-base
In clang:
Replace argc_ with Argc
Replace argv_ with Argv
Replace argv with Args
In flang:
Replace argc_ with argc
Replace argv_ with argv
Replace argv with args

Reviewed By: awarzynski, aganea

Differential Revision: https://reviews.llvm.org/D97138
2021-02-25 21:25:43 +08:00
Andrzej Warzynski baebc1162f [clang][driver] Set the input type to Fortran when reading from stdin
This patch makes sure that for the following invocation of the new Flang
driver, clangDriver sets the input type to Fortran:
```
flang-new -E -
```
This change does not affect `clang`, i.e. for the following invocation
the input type is set to C:
```
clang -E -
```

This change leverages the fact that for `flang-new` the driver is in
Flang mode.

Differential Revision: https://reviews.llvm.org/D96777
2021-02-25 13:13:42 +00:00
Martin Storsjö 0c8b26bf53 [clang] Remove a superfluous semicolon, silencing GCC warnings. NFC. 2021-02-25 14:54:19 +02:00
Jan Svoboda 43cac1d27d [clang][cli] NFC: Remove ArgList infrastructure for recording queries
This patch removes the infrastructure for recording queries in `ArgList`, partially reverting D94472.

The infrastructure was used during command line round-trip to determine which arguments should a certain subset of `CompilerInvocation` generate.

Since D96280, the command line arguments are being generated all at once, making this code no longer necessary.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D96325
2021-02-25 13:53:24 +01:00
Jan Svoboda fa7eb3e4a6 [clang][cli] NFC: Remove intermediate command line parsing functions
Patch D96280 moved command line round-tripping from each parsing functions into single `CreateFromArgs` function.

This patch cleans up the individual parsing functions, essentially merging `ParseXxxImpl` with `ParseXxx`, as the distinction is not necessary anymore.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D96323
2021-02-25 13:45:06 +01:00
Raphael Isemann 86c267233f [lldb][NFC] Document ClangASTImporter 2021-02-25 13:25:34 +01:00
Fraser Cormack 9620ce90d7 [RISCV] Support fixed-length vector FP_ROUND & FP_EXTEND
This patch extends the support for vector FP_ROUND and FP_EXTEND by
including support for fixed-length vector types. Since fixed-length
vectors use "VL" nodes and scalable vectors can use the standard nodes,
there is slightly more to do in the fixed-length case. A helper function
was introduced to try and reduce the divergent paths. It is expected
that this function will similarly come in useful for lowering the
int-to-fp and fp-to-int operations for fixed-length vectors.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D97301
2021-02-25 12:16:06 +00:00
Christian Sigg f03826f896 Pass GPU events instead of streams across async regions.
Lower !gpu.async.tokens returned from async.execute regions to events instead of streams.

Make !gpu.async.token returned from !async.execute single-use.
This allows creating one event per use and destroying them without leaking or ref-counting.
Technically we only need this for stream/event-based lowering. I kept the code separate
from the rest of the gpu-async-region pass so that we can make this optional or move
to a separate pass as needed.

Reviewed By: herhut

Differential Revision: https://reviews.llvm.org/D96965
2021-02-25 13:18:18 +01:00
Fraser Cormack 84413e1947 [RISCV] Support fixed-length vector truncates
This patch extends support for our custom-lowering of scalable-vector
truncates to include those of fixed-length vectors. It does this by
co-opting the custom RISCVISD::TRUNCATE_VECTOR node and adding mask and
VL operands. This avoids unnecessary duplication of patterns and
inflation of the ISel table.

Some truncates go through CONCAT_VECTORS which currently isn't
efficiently handled, as it goes through the stack. This can be improved
upon in the future.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D97202
2021-02-25 12:11:34 +00:00
Fraser Cormack 3bc5ed3875 [RISCV] Support fixed-length vector sign/zero extension
This patch adds support for the custom lowering sign- and zero-extension
of fixed-length vector types. It does so through custom nodes. Since the
source and destination types are (necessarily) of different sizes, it is
possible that the source type is legal whilst the larger destination
type isn't. In this case the legalization makes heavy use of
EXTRACT_SUBVECTOR.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D97194
2021-02-25 12:05:17 +00:00
Fraser Cormack 821f8bb29a [RISCV] Unify scalable- and fixed-vector EXTRACT_SUBVECTOR lowering
This patch unifies the two disparate paths for lowering
EXTRACT_SUBVECTOR operations under one roof. Consequently, with this
patch it is possible to support any fixed-length subvector extraction,
not just "cast-like" ones.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D97192
2021-02-25 11:46:57 +00:00
Evgeniy Brevnov d0a6f8bb65 [NFC] Fix build failure after 83d134c3c4 2021-02-25 18:43:00 +07:00
Simon Pilgrim 0d835ba48d [X86] Regenerate sdiv_fix.ll tests. NFCI. 2021-02-25 11:37:46 +00:00
Evgeniy Brevnov 83d134c3c4 [NARY-REASSOCIATE] Support reassociation of min/max
Support reassociation for min/max. With that we should be able to transform min(min(a, b), c) -> min(min(a, c), b) if min(a, c) is already available.

Reviewed By: mkazantsev

Differential Revision: https://reviews.llvm.org/D88287
2021-02-25 18:22:39 +07:00
Simon Pilgrim 8b82669d56 [X86][SSE] Move unaryshuffle(xor(x,-1)) -> xor(unaryshuffle(x),-1) fold into helper. NFCI.
We should be able to extend this "canonicalizeShuffleWithBinOps" to handle more generic binop cases where either/both operands can be cheaply shuffled.
2021-02-25 10:56:23 +00:00
serge-sans-paille f0e4610572 Support standalone build of clang-tidy unittest
Apply the same pattern as the one used in clangd/unittests/CMakeLists.txt

Differential Revision: https://reviews.llvm.org/D96788
2021-02-25 11:51:12 +01:00
Raphael Isemann 2d6b767c1d [lldb][NFC] Remove some obsolete comments in ClangASTImporter.cpp
The first two comments are incomplete and reference obsolete code. The
last one is just commented out code (that also doesn't look correct).
2021-02-25 11:44:19 +01:00
Raphael Isemann 7cfa6e1cc6 [lldb] Let ClangASTImporter assert that the target AST has an external source
This prevents people from accidentially using this code outside the
intended setup.
2021-02-25 11:42:14 +01:00
Harmen Stoppels a54f160b3a Prefer /usr/bin/env xxx over /usr/bin/xxx where xxx = perl, python, awk
Allow users to use a non-system version of perl, python and awk, which is useful
in certain package managers.

Reviewed By: JDevlieghere, MaskRay

Differential Revision: https://reviews.llvm.org/D95119
2021-02-25 11:32:27 +01:00
David Sherwood 87dbcd8865 [CodeGen] Canonicalise adds/subs of i1 vectors using XOR
When calling SelectionDAG::getNode() to create an ADD or SUB
of two vectors with i1 element types we can canonicalise this
to use XOR instead, where 1+1 is treated as wrapping around
to 0 and 0-1 wraps to 1.

I've added the following tests for SVE targets:

  CodeGen/AArch64/sve-pred-arith.ll

and modified some X86 tests to reflect the much simpler codegen
required.

Differential Revision: https://reviews.llvm.org/D97276
2021-02-25 10:31:26 +00:00
Tim Northover 201ada80ee AArch64: relax address-space assertion in FastISel.
Some people are using alternative address spaces to track GC data, but
otherwise they behave exactly the same. This is the only place in the backend
we even try to care about it so it's really not achieving anything.
2021-02-25 10:15:55 +00:00
Jan Svoboda d748908fa0 [clang][cli] Round-trip the whole CompilerInvocation
Finally, this patch moves from round-tripping one `CompilerInvocation` at a time to round-tripping the invocation as a whole.

This patch includes only the code required to make round-tripping the whole invocation work. More cleanups will be done in a follow-up patch.

Depends on D96847, D97041 & D97042.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D96280
2021-02-25 11:02:49 +01:00
Jan Svoboda a25e4a6da3 [clang][cli] Store additional optimization remarks info
After a revision of D96274 changed `DiagnosticOptions` to not store all remark arguments **as-written**, it is no longer possible to reconstruct the arguments accurately from the class.

This is caused by the fact that for `-Rpass=regexp` and friends, `DiagnosticOptions` store only the group name `pass` and not `regexp`. This is the same representation used for the plain `-Rpass` argument.

Note that each argument must be generated exactly once in `CompilerInvocation::generateCC1CommandLine`, otherwise each subsequent call would produce more arguments than the previous one. Currently this works out because of the way `RoundTrip` splits the responsibilities for certain arguments based on what arguments were queried during parsing. However, this invariant breaks when we move to single round-trip for the whole `CompilerInvocation`.

This patch ensures that for one `-Rpass=regexp` argument, we don't generate two arguments (`-Rpass` from `DiagnosticOptions` and `-Rpass=regexp` from `CodeGenOptions`) by shifting the responsibility for handling both cases to `CodeGenOptions`. To distinguish between the cases correctly, additional information is stored in `CodeGenOptions`.

The `CodeGenOptions` parser of `-Rpass[=regexp]` arguments also looks at `-Rno-pass` and `-R[no-]everything`, which is necessary for generating the correct argument regardless of the ordering of `CodeGenOptions`/`DiagnosticOptions` parsing/generation.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D96847
2021-02-25 11:02:49 +01:00
Stelios Ioannou 30cb9c03b5 [AArch64] Add abs intrinsic costs
This patch adds cost-modelling for abs vector intrinsic.

Change-Id: I89007971bfb15f5b4a02a2eadfd43018e9a73976
2021-02-25 09:31:52 +00:00
Haojian Wu b218f7c4ba [clangd] NFC, remove an extra "class" keyword. 2021-02-25 09:32:36 +01:00
Jan Svoboda d8a8e5d624 [clang][cli] Remove marshalling from Opt{In,Out}FFlag
We can now express all marshalling semantics in `Opt{In,Out}FFlag` via `BoolFOption`.

This patch moves remaining `Opt{In,Out}FFlag` instances using marshalling to `BoolFOption` and removes marshalling capabilities from `Opt{In,Out}FFlag` entirely.

This simplifies the decisions developers have to make when creating new boolean options:
  * For simple cc1 flag pairs, use `Bool{,F,G}Option`.
  * For cc1 flag pairs that require complex marshalling logic, use `Opt{In,Out}FFlag` and implement marshalling manually.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D97370
2021-02-25 08:53:58 +01:00