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10895 Commits

Author SHA1 Message Date
Evan Cheng dbcc4b4d4d Enable code placement optimization pass for ARM. 
llvm-svn: 114746
 2010-09-24 19:07:23 +00:00
Rafael Espindola 3843bb9d2c Revert 114678 and 114667 to see if 
http://google1.osuosl.org:8011/builders/llvm-gcc-i386-linux-selfhost

gets happy.

llvm-svn: 114742
 2010-09-24 18:48:08 +00:00
Daniel Dunbar ce17f72c38 MC/AsmParser: Handle a missed case of floating literals in the lexer. 
llvm-svn: 114733
 2010-09-24 17:10:26 +00:00
Michael J. Spencer 10d274d874 CMake: Build unittests. 
llvm-svn: 114725
 2010-09-24 09:01:13 +00:00
Michael J. Spencer 1444f47deb Fix whitespace. 
llvm-svn: 114724
 2010-09-24 09:00:56 +00:00
Daniel Dunbar 2af1653032 MC/AsmParser: Support .single and .double for embedding floating point literals. 
- I believe more modern 'gas' supports a more enhanced set of arithmetic on
   them, but for now the only thing we can do is emit them as data.

llvm-svn: 114719
 2010-09-24 01:59:56 +00:00
Bob Wilson 7fbbe9a43a Set alignment operand for NEON VST instructions. 
llvm-svn: 114709
 2010-09-23 23:42:37 +00:00
Bob Wilson 9eeb890172 Set alignment operand for NEON VLD instructions. 
llvm-svn: 114696
 2010-09-23 21:43:54 +00:00
Rafael Espindola f458f04eb1 Correctly handle weak undefined symbols. Before we would get a invalid binding 
(2 == STB_WEAK | STB_GLOBAL).

llvm-svn: 114690
 2010-09-23 19:55:14 +00:00
Rafael Espindola 48e108753b Represent relocations against local symbols as relocations against the section 
they are in. Both ways should be equivalent, but gas produces relocations
against the section.

Roman wrote the patch, I added the test.

llvm-svn: 114667
 2010-09-23 17:25:18 +00:00
Bob Wilson 3aecb15f0a Fix llvm-extract so that it changes the linkage of all GlobalValues to 
"external" even when doing lazy bitcode loading.  This was broken because
a function that is not materialized fails the !isDeclaration() test.

llvm-svn: 114666
 2010-09-23 17:25:06 +00:00
Evan Cheng 794aaa79e2 Disable codegen prepare critical edge splitting. Machine instruction passes now 
break critical edges on demand.

llvm-svn: 114633
 2010-09-23 06:55:34 +00:00
Dan Gohman 0d2c07cf58 Fix llvm-extract -delete's lazy loading to materialize the functions that 
will not be deleted, rather than the ones that will.

llvm-svn: 114614
 2010-09-23 00:33:13 +00:00
Owen Anderson 3231d13ddd A select between a constant and zero, when fed by a bit test, can be efficiently 
lowered using a series of shifts.
Fixes <rdar://problem/8285015>.

llvm-svn: 114599
 2010-09-22 22:58:22 +00:00
Cameron Esfahani bbb9287080 Fix PR8201: Update the code to call via X86::CALL64pcrel32 in the 64-bit case. 
llvm-svn: 114597
 2010-09-22 22:35:21 +00:00
Rafael Espindola dee12d8110 Avoid some Mach-O specific alignment being done on ELF. 
llvm-svn: 114594
 2010-09-22 22:27:05 +00:00
Rafael Espindola 9bac6cb544 Correctly align bss. 
llvm-svn: 114556
 2010-09-22 17:43:04 +00:00
Mikhail Glushenkov 922f13ce2e llvmc: Support '-emit-llvm -S' with -opt. 
llvm-svn: 114541
 2010-09-22 09:00:41 +00:00
Chris Lattner 415624cf3f fix rdar://8456371 - Handle commutable instructions written backward. 
llvm-svn: 114536
 2010-09-22 06:26:39 +00:00
Chris Lattner bd85725341 Fix an inconsistency in the x86 backend that led it to reject "calll foo" on 
x86-32: 32-bit calls were named "call" not "calll".  64-bit calls were correctly
named "callq", so this only impacted x86-32.

This fixes rdar://8456370 - llvm-mc rejects 'calll'

This also exposes that mingw/64 is generating a 32-bit call instead of a 64-bit call,
I will file a bugzilla.

llvm-svn: 114534
 2010-09-22 05:49:14 +00:00
Chris Lattner 37fc469f88 fix rdar://8456412 - llvm-mc crash in encoder on "mov %rdx, %cr8" 
Teaching the code generator about CR8-15, how to rex them up, etc.

llvm-svn: 114533
 2010-09-22 05:29:50 +00:00
Chris Lattner 2bb9504d1a fix rdar://8456417 - llvm-mc can't do basic math 
llvm-svn: 114532
 2010-09-22 05:05:16 +00:00
Chris Lattner 9dfd2e354e add the missing aliases for fp stack cmovs, rdar://8456391 
llvm-svn: 114531
 2010-09-22 04:56:20 +00:00
Chris Lattner 8a236b63d8 reimplement elf TLS support in terms of addressing modes, eliminating SegmentBaseAddress. 
llvm-svn: 114529
 2010-09-22 04:39:11 +00:00
Chris Lattner 1261b81e82 Fix rdar://8456364 - llvm-mc rejects '%CS' 
llvm-svn: 114528
 2010-09-22 04:11:10 +00:00
Chris Lattner 39cf8deded fix rdar://8456389 - llvm-mc mismatch with 'as' on 'fstp' 
-This line, and those below, will be ignored--

M    test/MC/AsmParser/X86/x86_instructions.s
M    lib/Target/X86/AsmParser/X86AsmParser.cpp

llvm-svn: 114527
 2010-09-22 04:04:03 +00:00
Chris Lattner a91e510f94 fix rdar://8456361 - llvm-mc rejects 'rep movsd' 
llvm-svn: 114526
 2010-09-22 03:50:32 +00:00
Chris Lattner 505af598d0 linux has a different stack alignment than the mac, relax this a bit. 
llvm-svn: 114519
 2010-09-22 00:46:26 +00:00
Chris Lattner 54e5329545 give VZEXT_LOAD a memory operand, it now works with segment registers. 
llvm-svn: 114515
 2010-09-22 00:34:38 +00:00
Chris Lattner 07827ba978 revert r114386 now that address modes work correctly, we get a nice 
call through gs-relative memory now.

llvm-svn: 114510
 2010-09-22 00:11:31 +00:00
Chris Lattner e479e9643b give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace 256/257 
llvm-svn: 114508
 2010-09-21 23:59:42 +00:00
Chris Lattner 0cefa51114 filecheckize 
llvm-svn: 114507
 2010-09-21 23:57:27 +00:00
Evan Cheng d757c88bba OptimizeCompareInstr should avoid iterating pass the beginning of the MBB when the 'and' instruction is after the comparison. 
llvm-svn: 114506
 2010-09-21 23:49:07 +00:00
Owen Anderson 61158f98ab Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes 
irrelevant, but add a new test for the new, improved functionality.

llvm-svn: 114494
 2010-09-21 22:51:46 +00:00
Devang Patel d92f42d1d0 Use FileCheck 
llvm-svn: 114475
 2010-09-21 20:50:32 +00:00
Owen Anderson f4b1a5bdc4 When adding the carry bit to another value on X86, exploit the fact that the carry-materialization 
(sbbl x, x) sets the registers to 0 or ~0.  Combined with two's complement arithmetic, we can fold
the intermediate AND and the ADD into a single SUB.

This fixes <rdar://problem/8449754>.

llvm-svn: 114460
 2010-09-21 18:41:19 +00:00
Mikhail Glushenkov ed79d5f24d llvmc: Allow multiple output languages. 
llvm-svn: 114433
 2010-09-21 14:59:42 +00:00
Chris Lattner bb0a1c44bf fix rdar://8453210, a crash handling a call through a GS relative load. 
For now, just disable folding the load into the call.

llvm-svn: 114386
 2010-09-21 03:37:00 +00:00
Rafael Espindola f0591c1642 Implement support for .local and its "interesting" interactions with .comm. 
llvm-svn: 114382
 2010-09-21 00:24:38 +00:00
Evan Cheng f3e9a48584 Enable machine sinking critical edge splitting. e.g. 
define double @foo(double %x, double %y, i1 %c) nounwind {
  %a = fdiv double %x, 3.2
  %z = select i1 %c, double %a, double %y
  ret double %z
}

Was:
_foo:
        divsd   LCPI0_0(%rip), %xmm0
        testb   $1, %dil
        jne     LBB0_2
        movaps  %xmm1, %xmm0
LBB0_2:
        ret

Now:
_foo:
        testb   $1, %dil
        je      LBB0_2
        divsd   LCPI0_0(%rip), %xmm0
        ret
LBB0_2:
        movaps  %xmm1, %xmm0
        ret

This avoids the divsd when early exit is taken.
rdar://8454886

llvm-svn: 114372
 2010-09-20 22:52:00 +00:00
Owen Anderson 5e4734245d CombinerAA is now reordering these stores. 
llvm-svn: 114354
 2010-09-20 20:56:29 +00:00
Owen Anderson 272ff94916 When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore, 
CombinerAA cannot assume that different FrameIndex's never alias, but can instead use
MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing.

This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll
when CombinerAA is enabled, modulo a different register allocation sequence.

llvm-svn: 114348
 2010-09-20 20:39:59 +00:00
Jim Grosbach 94dfd6fc4f Simplify ARM callee-saved register handling by removing the distinction 
between the high and low registers for prologue/epilogue code. This was
a Darwin-only thing that wasn't providing a realistic benefit anymore.
Combining the save areas simplifies the compiler code and results in better
ARM/Thumb2 codegen.

For example, previously we would generate code like:
        push    {r4, r5, r6, r7, lr}
        add     r7, sp, #12
        stmdb   sp!, {r8, r10, r11}
With this change, we combine the register saves and generate:
        push    {r4, r5, r6, r7, r8, r10, r11, lr}
        add     r7, sp, #12

rdar://8445635

llvm-svn: 114340
 2010-09-20 19:32:20 +00:00
Rafael Espindola 32ab4558fe Produce a R_X86_64_32 when the value is >=0. 
llvm-svn: 114339
 2010-09-20 19:20:47 +00:00
NAKAMURA Takumi b912c27fc9 test/CodeGen/X86: Add explicit triplet -mtriple=i686-linux to 3 tests incompatible to Win32 codegen. 
r114297 raises 3 failures. They might fail also on mingw.

llvm-svn: 114317
 2010-09-19 21:58:55 +00:00
Eric Christopher dbb199d89b Add the exit instruction to the PTX target. 
Patch by Che-Liang Chiou <clchiou@gmail.com>!

llvm-svn: 114294
 2010-09-18 18:52:28 +00:00
Rafael Espindola 57e599a82a Make sure the STT_FILE symbol is the first one in the symbol table. 
llvm-svn: 114285
 2010-09-18 15:03:21 +00:00
Owen Anderson b92b13d8a0 Invert the logic of reachesChainWithoutSideEffects(). What we want to check is that there is 
NO path to the destination containing side effects, not that SOME path contains no side effects.
In  practice, this only manifests with CombinerAA enabled, because otherwise the chain has little
to no branching, so "any" is effectively equivalent to "all".

llvm-svn: 114268
 2010-09-18 04:45:14 +00:00
Rafael Espindola 15829c6c4c Add test that was missing in my previous commit. 
llvm-svn: 114248
 2010-09-18 00:37:27 +00:00
Dan Gohman 49c15c0f9f Attempt to XFAIL this test on arm-linux, which is inexplicably failing. 
llvm-svn: 114241
 2010-09-18 00:04:37 +00:00