fac8452acf
Fix cases where we generated horrible code like this:
...
mov %EDI, 12
add %EDI, %ECX
mov %ECX, 12
add %ECX, %EDX
mov %EDX, 12
add %EDX, %ESI
instead (really!) generate this:
add %ECX, 12
add %EDX, 12
add %ESI, 12
llvm-svn: 15090
2004-07-21 21:28:26 +00:00
dbd14bc3e5
* Add the lost fix to define the second reg of a 2-reg representation of longs
...
* Fix opcode RLWNM -> RLWINM since it uses an immediate const shift value
llvm-svn: 15087
2004-07-21 20:30:18 +00:00
87e07f8596
* Speed up canUseAsImmediateForOpcode() by comparing Operand before
...
dyn_cast<>ing and checking Constant's value
* Convert tabs to spaces
llvm-svn: 15086
2004-07-21 20:22:06 +00:00
8d75aa4475
* Fix printing of signed immediate values (Nate Begeman)
...
* Fix printing of `zeroinitializer'
* Fix printing of `linkonce' globals, complete with stubs
llvm-svn: 15084
2004-07-21 20:11:11 +00:00
072af37088
* Fix printing of signed immediate values
...
* Generation of opcodes that take 16 bit immediates
* Rewrote multiply to be correct for 64 bit values
* Rewrote all the long handling to be correct for PowerPC
* Fix visitSelectInst() to define the upper register of the pair of regs
representing a long value
Patch contributed by Nate Begeman.
llvm-svn: 15083
2004-07-21 20:09:08 +00:00
455622577a
Use addSImm() instead of addImm() for stack offsets, which may be negative.
...
llvm-svn: 15081
2004-07-21 19:36:57 +00:00
984bfdc702
Add SUBI instruction
...
llvm-svn: 15077
2004-07-21 15:53:04 +00:00
1dde3fa94f
Emit NaNs and INFs bit-identically to the bytecode file, if the system has
...
printf("%a") support.
Patch contributed by Bill Wendling.
llvm-svn: 15056
2004-07-21 03:15:26 +00:00
75f3291ef3
Shorts are aligned to 2 bytes, bools to 1 byte (in structs).
...
llvm-svn: 15048
2004-07-20 20:59:57 +00:00
8e36261aa8
Treat external variables similarly to those with weak linkage: load indirect.
...
llvm-svn: 15047
2004-07-20 20:43:05 +00:00
4aab086eda
Differentiate between global and weak symbol loads
...
llvm-svn: 15037
2004-07-20 15:52:25 +00:00
684ef6ca20
* Differentiate between global and weak symbol loads
...
* Fix functions that take more than 32 bytes of args
* Alignment of doubles in structs is 4 bytes, not 8
* Fix passing long args: rN = hi, rN+1 = lo
* Rewrite signed divide
* Rewrite Intrinsic::returnaddress
Patch courtesy of Nate Begeman.
llvm-svn: 15036
2004-07-20 15:51:37 +00:00
42666aed5e
Differentiate between global and weak symbol loads
...
llvm-svn: 15035
2004-07-20 15:45:27 +00:00
dff882a230
Double alignment in structs is 4 bytes, not 8. Patch by Nate Begeman.
...
llvm-svn: 15034
2004-07-20 15:43:25 +00:00
e036ff8b32
Fix stack frame layout in prologue/epilogue. Patch courtesy of Nate Begeman.
...
llvm-svn: 15026
2004-07-20 02:23:09 +00:00
5e744fa1a3
Move handing of GlobalValues from getReg() to copyConstantToRegister(), this
...
will avoid extra register-to-register copies. Thanks to Chris for the idea.
llvm-svn: 15019
2004-07-20 00:59:38 +00:00
22802cc6cd
* Fn args passed in registers are now recorded as used by the call instruction
...
`-> asm printer updated to not print out those registers with the call instr
All of Shootout tests now work. Great thanks to Nate Begeman for the patch!
llvm-svn: 15015
2004-07-20 00:42:19 +00:00
818a9dc317
* cFP class split into cFP32 and cFP64
...
* Fn args passed in registers are now recorded as used by the call instruction
`-> asm printer updated to not print out those registers with the call instr
* Stack frame layout in prolog/epilog fixed, spills and vararg fns now work
* float/double to signed int codegen now correct
* various single precision float codegen bugs fixed
* const integer multiply codegen fixed
* select and setcc blocks inserted into the correct place in machine CFG
* load of integer constant code optimized
All of Shootout tests now work. Great thanks to Nate Begeman for the patch!
llvm-svn: 15014
2004-07-20 00:41:46 +00:00
f8cf35855a
While I'm at it, don't break codegen of mul by 3,5,9.
...
llvm-svn: 15013
2004-07-19 23:50:57 +00:00
7c06d44f42
Generate better code for multiplies by negative constants like -4, -1, -9, etc.
...
llvm-svn: 15012
2004-07-19 23:47:21 +00:00
82e7fe5b5b
bug 122:
...
Simplify a conditional operator for a constant result from
GV->isNullValue()
llvm-svn: 15001
2004-07-19 13:25:02 +00:00
57ca7382d9
Inline 4 methods
...
llvm-svn: 15000
2004-07-19 07:52:35 +00:00
6bdfbaf80d
Fix infinite loop
...
llvm-svn: 14971
2004-07-18 18:45:01 +00:00
aba6c47900
CPR Fixes
...
llvm-svn: 14961
2004-07-18 07:29:35 +00:00
9ce34cb323
CPR fixes
...
llvm-svn: 14960
2004-07-18 07:26:17 +00:00
cb3fb5d4f5
bug 122:
...
- Replace ConstantPointerRef usage with GlobalValue usage
llvm-svn: 14953
2004-07-18 00:44:37 +00:00
874368790f
bug 122:
...
- Replace ConstantPointerRef usage with GlobalValue usage
- Minimize redundant isa<GlobalValue> usage
- Correct isa<Constant> for GlobalValue subclass
llvm-svn: 14950
2004-07-18 00:38:32 +00:00
3074d3cfe7
bug 122:
...
- Correct isa<Constant> for GlobalValue subclass
llvm-svn: 14949
2004-07-18 00:37:35 +00:00
c856e90d1d
Make sure to emit the immediate byte for instructions like:
...
shrd [mem], reg, imm
This fixes the jit-ls failure on 186.crafty.
llvm-svn: 14914
2004-07-17 20:26:14 +00:00
8a4039ed9a
Reserve the correct amt of space.
...
llvm-svn: 14913
2004-07-17 20:24:05 +00:00
e6f4a5ebb0
We don't really need to #include IPO.h into this file.
...
llvm-svn: 14911
2004-07-17 18:37:46 +00:00
b85c2522fa
* Use LI(S) to copy constants into registers intead of ADDI(S) as the latter is
...
a funky way to "use" R0 for a 0-valued operand
* Add IMPLICIT_DEFs for incoming function arguments via registers to help the
register allocator not clobber those registers
* Implement comparisons with longs
* Teach emitSelectOperation() to fold the SetCC operation
Patch contributed by Nate Begeman
llvm-svn: 14901
2004-07-16 21:06:24 +00:00
db032fb1f9
* Store all non-volatile int registers R13-31 on the stack, restore on exit
...
* Fix comment formatting
llvm-svn: 14900
2004-07-16 20:55:20 +00:00
780da8425f
Fix code formatting
...
llvm-svn: 14899
2004-07-16 20:54:25 +00:00
3adf84ba0d
Implement PowerPCInstrInfo::isMoveInstr(), patch by Nate Begeman
...
llvm-svn: 14898
2004-07-16 20:51:55 +00:00
f0def96a36
Add prototype for TargetInstrInfo::isMoveInstr()
...
llvm-svn: 14897
2004-07-16 20:50:55 +00:00
9c2c293225
* Enable allocation of registers r2-r10
...
* Allocate registers 13-31 backwards (to be able to store them all at once)
llvm-svn: 14896
2004-07-16 20:35:20 +00:00
6ed15fd181
Add IMPLICIT_DEFS pseudo-instruction; patch by: Nate Begeman
...
llvm-svn: 14895
2004-07-16 20:33:41 +00:00
8c9938654a
The generated instruction selector isn't (yet) functional
...
llvm-svn: 14894
2004-07-16 20:31:13 +00:00
d4ac818593
* Output non-lazy linking stubs for external global variables
...
* Get rid of dead and #if 0'd code
* Minor for loop speed-up: save end iterator instead of querying every time
llvm-svn: 14893
2004-07-16 20:29:04 +00:00
a6b9a566b9
Define double alignment as 8 bytes now that assert(DoubleAlignment == PointerSize)
...
has been eliminated
llvm-svn: 14891
2004-07-16 19:32:12 +00:00
d350b64352
* Add spaces between words and numbers in comments printed out for longs/floats
...
* Print out IMPLICIT_DEFS as comments in the assembly, patch by Nate Begeman
llvm-svn: 14890
2004-07-16 19:01:13 +00:00
65728ddf45
Fix grammar.
...
llvm-svn: 14888
2004-07-16 17:40:28 +00:00
135b870f72
Add a class for pseudo-instructions. Use it.
...
Add IMPLICIT_USE and IMPLICIT_DEF, a la X86.
llvm-svn: 14884
2004-07-16 10:32:10 +00:00
a57943154e
Add what will eventually be the TSFlags. Big switch(opcode) statements are bad.
...
llvm-svn: 14883
2004-07-16 10:31:59 +00:00
f486726c56
Add special handling for pseudo-instructions (print them as comments).
...
llvm-svn: 14882
2004-07-16 10:31:47 +00:00
97b71c9fa9
Add to-do list.
...
llvm-svn: 14881
2004-07-16 10:31:36 +00:00
5ce1408537
Do IMPLICIT_DEFs on incoming args' hard regs, to avoid confusing the regalloc.
...
Support single-fp incoming args.
Support single-fp outgoing args ('call' operands).
Support double-fp return values.
llvm-svn: 14880
2004-07-16 10:31:25 +00:00
2453818b8a
The powerpc is now gone. However it is now just known as the Skeleton target.
...
llvm-svn: 14877
2004-07-16 07:14:34 +00:00
a46d2a63c7
Build the skeleton target
...
llvm-svn: 14875
2004-07-16 07:11:53 +00:00
ed85542ad7
Initial checkin of the rest of the skeleton target
...
llvm-svn: 14874
2004-07-16 07:11:15 +00:00
3d53a4752d
Initial skeleton tablegen files
...
llvm-svn: 14873
2004-07-16 06:29:19 +00:00
42023220fa
Add skeleton makefile
...
llvm-svn: 14872
2004-07-16 06:20:55 +00:00
e8a034901d
Initial readme
...
llvm-svn: 14871
2004-07-16 06:12:28 +00:00
9716100a5d
IA64 compat
...
llvm-svn: 14867
2004-07-16 00:08:28 +00:00
072a4c0091
Nuke a clearly bogus assertion
...
llvm-svn: 14854
2004-07-15 07:44:34 +00:00
c9819f09c2
Revert stuff that I didn't mean to checkin
...
llvm-svn: 14844
2004-07-15 02:33:38 +00:00
7dc9de5f43
Patches towards fixing PR341
...
llvm-svn: 14841
2004-07-15 02:14:30 +00:00
33930ad7bd
Improve codegen for the LLVM offsetof/sizeof "operator". Before we compiled
...
this LLVM function:
int %foo() {
ret int cast (int** getelementptr (int** null, int 1) to int)
}
into:
foo:
mov %EAX, 0
lea %EAX, DWORD PTR [%EAX + 4]
ret
now we compile it into:
foo:
mov %EAX, 4
ret
This sequence is frequently generated by the MSIL front-end, and soon the malloc lowering pass and
Java front-ends as well..
-Chris
llvm-svn: 14834
2004-07-15 00:58:53 +00:00
2661c50173
Make sure MTSPR instruction is inserted into the BasicBlock
...
llvm-svn: 14822
2004-07-14 18:26:31 +00:00
5193410cd9
Don't define the same register twice when loading a ConstantPointerRef to a reg
...
llvm-svn: 14819
2004-07-14 17:57:04 +00:00
d4cbe67ce6
* Fix multiplication by powers of two and otherwise
...
* Clarify variable name (StoreInst SI instead of LI)
llvm-svn: 14818
2004-07-14 15:29:51 +00:00
590b5f12db
Add Machine-CFG edges to SparcV9 MachineBasicBlocks.
...
llvm-svn: 14806
2004-07-14 05:40:50 +00:00
aa678b5ed4
* Specify that FP arith options have 3 operands
...
* Correctly load FP constants from the constant pool, should be refactored
llvm-svn: 14799
2004-07-13 15:35:45 +00:00
be1b680f54
Correctly load FP constants out of the constant pool.
...
llvm-svn: 14782
2004-07-12 23:49:47 +00:00
9dacda651f
Apple's MacOS X is another OS which does not provide alloca() via <alloca.h>
...
llvm-svn: 14781
2004-07-12 23:37:18 +00:00
dcb0eec80d
Implement getModuleMatchQuality and getJITMatchQuality() for PowerPC
...
llvm-svn: 14780
2004-07-12 23:36:12 +00:00
c9c16a0e60
Implement TargetRegistrationListener
...
llvm-svn: 14759
2004-07-11 06:03:21 +00:00
b889c6b261
Delete the allocate*TargetMachine function, which is now dead.
...
The shared command line options are now in a header that makes sense.
llvm-svn: 14757
2004-07-11 04:17:58 +00:00
c2726e63ed
Delete the allocate*TargetMachine function, which is now dead .
...
The shared command line options are now in a header that makes sense.
llvm-svn: 14756
2004-07-11 04:17:10 +00:00
2beb4392cf
Delete the allocate*TargetMachine function, which is now dead .
...
llvm-svn: 14755
2004-07-11 04:16:31 +00:00
baf43cf335
Implement a couple of methods that TargetMachineRegistry now provides. See,
...
I told you this file wasn't useless :)
llvm-svn: 14749
2004-07-11 04:00:19 +00:00
73eb9436ee
Make these format a bit nicer
...
llvm-svn: 14747
2004-07-11 03:27:42 +00:00
4266f8017d
Auto-registrate target
...
llvm-svn: 14745
2004-07-11 02:48:49 +00:00
97c176b639
Add compilability
...
llvm-svn: 14744
2004-07-11 02:48:28 +00:00
5842560090
Initial impl of this file. Yes this is pretty useless right now, but it
...
will grow in time.
llvm-svn: 14743
2004-07-11 02:44:26 +00:00
82a065dc41
* Add support for indexing into structures, thanks to Chris (x86)
...
The large diff is because of indentation of a whole region
* Fix querying predecessor blocks in SelectPHINodes(), thanks to Brian (v8)
* Add support for external functions malloc() and free()
* Fix some code indentation
Remember, kids: It's not plagiarism if you "creatively borrow" from your
sources. It's called "research"!
llvm-svn: 14723
2004-07-09 15:45:07 +00:00
14d02cd2d8
Read/write the offset value for stack-relative loads via correct instr operand.
...
llvm-svn: 14722
2004-07-09 15:37:16 +00:00
aefab3404e
Add support for __fixdfdi(), __floatdisf(), and __floatdidf() external functions
...
llvm-svn: 14703
2004-07-08 19:41:16 +00:00
4c4e044e65
* Use several Function* for external functions instead of a std::map
...
* Non-const FP values must be loaded into int regs (for vararg fns) via memory
llvm-svn: 14701
2004-07-08 18:27:59 +00:00
59b2d4ef9d
* Add support for loading FP constants from the constant pool
...
* Load FP values into int regs as well for vararg functions; without memory ops!
llvm-svn: 14700
2004-07-08 18:02:38 +00:00
b604b4df21
* Fix header comment, excise references to X86
...
* Add suport for printing out references to constant pool indices
llvm-svn: 14699
2004-07-08 17:58:04 +00:00
8165863a9d
Support setcc on fp values.
...
llvm-svn: 14687
2004-07-08 09:08:35 +00:00
7b4722e62c
Add floating-point branches and compares. Compares don't complete
...
until the next cycle, and there's no interlock, so they effectively
have a delay slot.
llvm-svn: 14686
2004-07-08 09:08:22 +00:00
3b204c3f24
Fix bug where SwitchSection would fail to change to ".bss" successfully.
...
llvm-svn: 14685
2004-07-08 08:08:23 +00:00
4fdd22b922
Fix bug involving bool arguments to binary operators.
...
Fix typo in comment.
llvm-svn: 14684
2004-07-08 08:08:10 +00:00
dc5940794c
Fix bug in copying long constants to register pairs. We were getting
...
the top and bottom halves backwards...how embarrassing.
Support 'cast long to long' and other similar no-op casts to long.
Support 'ret long'.
llvm-svn: 14683
2004-07-08 07:52:13 +00:00
4ba31a2e1e
Support 'ret float'
...
llvm-svn: 14681
2004-07-08 07:22:27 +00:00
3955f9079b
* Use a map for caching lookups to external functions (fp div/rem)
...
* Tabs to spaces
llvm-svn: 14673
2004-07-07 20:07:22 +00:00
6ff655117d
* Wrap long lines (comments and code)
...
* Tabs to spaces
llvm-svn: 14672
2004-07-07 20:01:36 +00:00
ef84814ea9
Add fmod() to the Module being compiled so that it gets a stub in the asm file
...
llvm-svn: 14670
2004-07-07 15:36:18 +00:00
4556d889f4
* Add support for calling vararg functions (must pass doubles in int regs too)
...
* Make visitSetCondInst() share condition-generating code with EmitComparison()
* There are 13 FPRs for function-passing arguments, not 8
* Do not rely on registers being sequential, use an array lookup
* In unimplemented switch cases, send an error and abort instead of silent
fall-through
* Add doInitialization() for adding function prototypes for external math fns
* Minor changes: fix indentation, spacing, code clarity
llvm-svn: 14653
2004-07-06 22:51:53 +00:00
2138f1b2b0
Use the more compact `bl' instead of cryptic (but equivalent) `bcl 20,31'
...
llvm-svn: 14652
2004-07-06 22:40:34 +00:00
e9b763a83f
* Add utility functions: convert SetCC => PPC opcode and invert PPC opcode
...
* If SetCondInst is folded into BranchInst (and it is the only user), do not
emit code for SetCondInst
* Fix assembly opcodes in comments in visitSetCondInst()
* Fix codegen of conditional branches
llvm-svn: 14643
2004-07-06 15:32:44 +00:00
0969646d6e
Add #includes
...
llvm-svn: 14625
2004-07-04 17:19:21 +00:00
eb04d9bcb4
Add #include <iostream> since Value.h does not #include it any more.
...
llvm-svn: 14622
2004-07-04 12:19:56 +00:00
4308baa0f1
Add FIXME notes for spilling int/fp regs (need to calculate stack space).
...
llvm-svn: 14581
2004-07-02 17:54:38 +00:00
f6d2471c5d
Fix use-before-def thinko
...
llvm-svn: 14570
2004-07-02 07:01:31 +00:00
55256dbf9b
Fix potential problems with unreachable basic blocks.
...
Also, while noone's looking, add support for constant expressions. Wait,
I said not to look!
llvm-svn: 14566
2004-07-02 05:49:11 +00:00
3594324248
Fix all of those problems that the PPC backend has running 176.gcc :)
...
llvm-svn: 14565
2004-07-02 05:48:42 +00:00
6c322ecc31
Remove dead blocks
...
llvm-svn: 14564
2004-07-02 05:46:41 +00:00
186e3d1098
Add M_TERMINATOR_FLAG to terminator instructions (branches and returns).
...
Also, the RETURN instructions are not used in the sparcv9 backend.
llvm-svn: 14559
2004-07-02 04:57:37 +00:00
fb894bd864
RETURN instructions are not used in the sparc backend.
...
When in doubt, stamp it out!!
llvm-svn: 14558
2004-07-02 04:57:35 +00:00
24a0371791
* Follow the PowerPC convention of leaving 24 bytes for linking on the stack.
...
* Also leave space for spilling integer registers (this should be calculated)
llvm-svn: 14554
2004-07-01 21:35:00 +00:00
d028593c6e
* Get rid of constant-expr handling code: we use the ConstantExpr lowering pass
...
* Use the SetCC handling code in the format of Brian's V8
* Add FIXMEs where calls to functions are being made without adding them to the
Module first... they cause missing symbols at assembly-time.
llvm-svn: 14553
2004-07-01 21:34:10 +00:00
1f3a7f0255
Wrap long line
...
llvm-svn: 14552
2004-07-01 21:27:59 +00:00
d575287551
* Do not allocate r0 as we use it indiscriminantly in the instr selector.
...
* Do not define CR register class because we don't (yet) have the i4 type
llvm-svn: 14551
2004-07-01 21:24:50 +00:00
fcc59bd0e0
Check if operand has an allocated reg before requesting it.
...
llvm-svn: 14550
2004-07-01 21:09:12 +00:00
18a08e702d
Handle targets where alignment can be bigger than the size of the data.
...
Contributed by Vladimir Prus!
llvm-svn: 14534
2004-07-01 17:32:59 +00:00
b9125f462d
Fix indentation to be 2 spaces.
...
llvm-svn: 14512
2004-06-30 22:11:03 +00:00
0648a903c7
* Coalesce the handy CALL* alias opcodes with the standard ones
...
* Congregate more branch-and-link opcodes together
* Mark FP, CPR, and special registers as volatile across calls
llvm-svn: 14511
2004-06-30 22:00:45 +00:00
299fa1b147
* Allow more registers to be allocated from the general register pool
...
* Define the condition register class
llvm-svn: 14510
2004-06-30 21:54:50 +00:00
fee5a22f8a
* Inquire about the number of operands from the instruction directly
...
* Only check for a register if we are sure the instruction has one allocated
llvm-svn: 14509
2004-06-30 21:54:12 +00:00
04f07b4589
visitSetCondInst() takes a parameter of type `SetCondInst'
...
llvm-svn: 14508
2004-06-30 21:47:40 +00:00
2b9106f808
Always assume a function may have calls because the printer may add `bl' to get
...
the PC in a code sequence for global variables.
llvm-svn: 14506
2004-06-30 00:09:12 +00:00
351646f31e
* Don't save LR when outputting globals: it's already saved on the stack once
...
for the function
* Registers aren't necessarily sequential wrt their enums, don't rely on it
when emitting function arguments into sequential registers
* Remove X86-specific comments about AL/BL/AH/BH/EDX/etc
* Add an abort() for an unimplemented signed right shift
* The src operand for a GEP was never emitted! Fixed.
* We can skip zero-valued GEP indices as they are no-ops.
"Hello, World!" now works.
llvm-svn: 14505
2004-06-29 23:45:05 +00:00
c794feab51
* Stop using BBNumbering, we don't really need it
...
* Only increment labelNumber once, because it's used by both Load{hi,lo}Addr
* There is no .bss section on PowerPC
* Use .align 2 instead of other random numbers
llvm-svn: 14504
2004-06-29 23:40:57 +00:00
d409669877
Set up the prologue and epilogue to be more like the manual and GCC output.
...
llvm-svn: 14502
2004-06-29 23:38:26 +00:00
7454c6fff0
* Use LA instead of LWZ for LoadLoAddr
...
* Specify the isCall bit and caller-save registers for some call instrs
llvm-svn: 14501
2004-06-29 23:37:36 +00:00
5459dfb47b
Only allocate non-volatile registers R13-31 (for now).
...
llvm-svn: 14500
2004-06-29 23:35:32 +00:00
4efe3da794
Lower ConstantExpressions before the code generator.
...
llvm-svn: 14497
2004-06-29 23:33:20 +00:00
887fd23dfc
Fix associativity of parameters to assert(): now it actually makes sense.
...
llvm-svn: 14483
2004-06-29 19:43:20 +00:00
c968b87d94
Convert tabs to spaces.
...
llvm-svn: 14482
2004-06-29 19:28:53 +00:00
802403723b
* Fix saving LR in function prologue
...
* Adjust epilogue restore sequence to match the PowerPC documentation
llvm-svn: 14480
2004-06-29 17:14:42 +00:00
811f5c2c4c
Assembly syntax/comment fixes by Nate Begeman.
...
llvm-svn: 14479
2004-06-29 17:13:26 +00:00
c5f9b356af
The code generator should work with unreachable blocks. If not, then this
...
is a bug that should be fixed in the code generator, not papered over with
the simplifycfg pass. Eliminating this makes bugpoint much more useful
llvm-svn: 14477
2004-06-29 07:20:16 +00:00
e6e1b48023
I believe that the code generator now properly handles dead basic blocks. If not,
...
this is a bug, and should be fixed.
llvm-svn: 14476
2004-06-29 07:17:12 +00:00
1a920d49f6
Fix a regression from r1.224. In particular, codegen a cast from double ->
...
float as a truncation by going through memory. This truncation was being
skipped, which caused 175.vpr to fail after aggressive register promotion.
llvm-svn: 14473
2004-06-29 00:14:38 +00:00
15c10883ff
Can't print out machine code before it is constructed.
...
llvm-svn: 14472
2004-06-28 21:16:57 +00:00
3aad397726
Fix the assembly opcode on LOADLoAddr, courtesy of Nate Begeman.
...
llvm-svn: 14470
2004-06-28 18:27:08 +00:00
767fa11096
Set isBranch and isTerminator bits on all branch instructions.
...
llvm-svn: 14469
2004-06-28 18:23:35 +00:00
2f0cda8b2a
Fix loading and storing PC-relative static variables, courtesy of Nate Begeman.
...
llvm-svn: 14468
2004-06-28 18:20:59 +00:00
75985d725c
No need to generate a lazy-linking stub for internal functions, they can be
...
resolved by the static linker.
llvm-svn: 14467
2004-06-28 18:03:37 +00:00
8455e0177b
Do not set the `link' bit when branching to the first BB of a function, as it
...
will cause an infinite loop. The link bit is only used for calling functions.
llvm-svn: 14466
2004-06-28 17:57:40 +00:00
9cb88aae40
Fix spacing around function arguments.
...
llvm-svn: 14463
2004-06-28 15:53:27 +00:00
81f67f60ec
Allow saving and restoring of double and float registers.
...
Allow copying of float registers.
llvm-svn: 14445
2004-06-27 22:59:56 +00:00
b3d33c7994
Add FITOS, FITOD, and F{ADD,SUB,MUL,DIV}{S,D}.
...
llvm-svn: 14444
2004-06-27 22:53:56 +00:00
187ff172b6
Support printing constant pool indices.
...
If we see an "unknown operand", abort so it's easier to fix it.
llvm-svn: 14441
2004-06-27 22:50:44 +00:00
c81b5a5331
Trim whitespace.
...
Support cast of ints (and narrower) to float and double.
Support cast double to double (using load and store).
Abort if we see a CallInst or SetCondInst with long/fp args, instead
of producing bad code.
Support add, sub, mul, div of float and double.
llvm-svn: 14440
2004-06-27 22:47:33 +00:00
6fb22cd7ef
There is no reason to print ValueType here
...
llvm-svn: 14425
2004-06-26 19:36:34 +00:00
c52ea2574d
Allow debugging machine instrs (by printout) before/after isel and regalloc
...
llvm-svn: 14416
2004-06-25 19:57:47 +00:00
26e36e5758
Combine several if stmts with returns into an if-then-elseif-else chain.
...
llvm-svn: 14414
2004-06-25 19:24:52 +00:00
c22fd9a6a5
Do not move any values into registers for a void return (there isn't anything).
...
llvm-svn: 14413
2004-06-25 19:04:27 +00:00
b5932a5708
Convert tabs to spaces.
...
llvm-svn: 14412
2004-06-25 18:45:07 +00:00
5dbf760e00
Fix opcode: no immediate in an `or r1, r2, r3' (all registers) instr.
...
llvm-svn: 14411
2004-06-25 18:36:53 +00:00
c56b66f504
* Be consistent about MachineBB labels and references to them in instr stream
...
* Use MachineBB's built-in numbering system instead of reinventing one
llvm-svn: 14408
2004-06-25 15:42:10 +00:00
a27375832b
* Initialize the entire array statically, not member-at-a-time
...
* Remove x86-specific comment re: intel vs. at&t assembly syntax
llvm-svn: 14406
2004-06-25 15:11:34 +00:00
468d9a0087
Fix bug in previous checkin.
...
llvm-svn: 14405
2004-06-25 14:57:19 +00:00
9ff1cda1a8
* Wrap long lines
...
* Replace silent fall-through FIXME comments with an error to cerr and an abort
* No need to set size of statically initialized arrays
llvm-svn: 14404
2004-06-25 14:50:41 +00:00
08b0e61841
Excise X86-specific comments.
...
llvm-svn: 14403
2004-06-25 14:13:26 +00:00
23dbc8170c
Made a fix so that you can print out MachineInstrs that belong to a MachineBasicBlock that is not yet attached to a MachineFunction. This change includes changing the third operand (TargetMachine) to a pointer for the MachineInstr::print function.
...
llvm-svn: 14389
2004-06-25 00:13:11 +00:00
5e3afa0d4c
Add option to print out machine code before register allocation.
...
llvm-svn: 14387
2004-06-24 23:55:01 +00:00
a79dd915b7
Use DEBUG() guard for printing out debug info.
...
llvm-svn: 14386
2004-06-24 23:54:05 +00:00
c45a5a369d
Add a `break' in the switch/case statement between the int/fp sections.
...
llvm-svn: 14385
2004-06-24 23:53:24 +00:00
a08a2363ec
* Lowercase the register names
...
* Parenthesize assert() expressions correctly
* Fix spacing around for() and if() statements
llvm-svn: 14384
2004-06-24 23:51:00 +00:00
c562342751
* LowercaseString moved to StringExtras.h
...
* Wrap long line to 80 cols
llvm-svn: 14382
2004-06-24 23:38:20 +00:00
842c710028
* Tabs to spaces
...
* Send an error message to std::cerr before abort()ing
llvm-svn: 14381
2004-06-24 23:19:36 +00:00
f62ee7a11b
* Tabs to spaces
...
* Remove unnecessary parens, braces, clean up code layout
llvm-svn: 14379
2004-06-24 23:04:11 +00:00
9adccb6a50
Unindent some more code to be consistent.
...
llvm-svn: 14377
2004-06-24 22:00:15 +00:00
1e057bf1b7
Unindent some code, it only needs 2 spaces.
...
llvm-svn: 14376
2004-06-24 21:56:15 +00:00
29b3dd7d35
In emitting code for a GEP instr, iterate over GEPTypes because there is one
...
more operand in GEPOps than there are types in GEPTypes: the pointer that is the
first operand of the GEP instruction.
llvm-svn: 14375
2004-06-24 21:54:47 +00:00
27966ba77b
Add FSTOD and FDTOS conversion instructions.
...
llvm-svn: 14372
2004-06-24 21:22:09 +00:00
72490c8d86
Support cast float to float, cast double to float, and cast float to double.
...
(It's not yet clear how to copy doubles from register to register.)
llvm-svn: 14371
2004-06-24 21:22:08 +00:00
f57c3cd1e8
* Order #includes
...
* Use the DEBUG() guard for debug printouts
llvm-svn: 14367
2004-06-24 17:31:42 +00:00
eea4b17cf8
Make the double-fp pseudo registers be "NamedRegs".
...
llvm-svn: 14366
2004-06-24 09:23:21 +00:00
2f6741f4f3
Fix a dyn_cast in copyConstantToRegister which should have been a cast.
...
Compactify the code that emits copies of constant ints into registers.
llvm-svn: 14365
2004-06-24 09:17:47 +00:00
c605ae6754
The long integer pseudo-regs are history. So long, we hardly knew ye.
...
llvm-svn: 14364
2004-06-24 08:55:21 +00:00
4ed2826ce5
Use correct add*Imm form in more BuildMI calls.
...
Fix bug in emitGEPOperation where we weren't passing MBB, IP to getReg.
(hey, wouldn't a constant expression lowering pass be cool? huh huhuhuh)
Fix bug in emitGEPOperation where we might try to OR a constant into a
register which was too big to fit in the immediate field.
Support and, or, xor of longs.
llvm-svn: 14363
2004-06-24 08:55:09 +00:00
7777e66704
Rename the load and store opcodes. The non-fp ones only have one
...
variant worth worrying about; the fp ones have two.
llvm-svn: 14362
2004-06-24 07:37:12 +00:00
c8e1b5abe8
Rename the load and store opcodes. The non-fp ones only have one
...
variant worth worrying about; the fp ones have two.
Add fp stores.
llvm-svn: 14361
2004-06-24 07:36:59 +00:00
9f455efff1
Rename the load and store opcodes. The non-fp ones only have one
...
variant worth worrying about; the fp ones have two.
Stub out the case analysis of int-to-fp casts (no code yet).
I think the number of operands passed to BuildMI for loads was wrong.
Support load and store of float and double.
llvm-svn: 14360
2004-06-24 07:36:48 +00:00
8863de761d
Strange as it may sound, we'll not use LDD/STD to store longs. For reasons of
...
representational consistency, we want to address the halves of each 64-bit value
separately.
llvm-svn: 14356
2004-06-24 06:44:57 +00:00
1e8cc73ea3
Support constant cast expressions.
...
llvm-svn: 14355
2004-06-24 06:33:00 +00:00
ae6fb8ae5c
Make the most commonly preselected instructions add to the names of the
...
instructions they augment, instead of replacing them. It's good for debugging,
and it's OK for the sparcv9 backend.
llvm-svn: 14353
2004-06-23 21:41:32 +00:00
5825bdd8b2
Add pseudo-registers and register class for 64-bit integer values.
...
llvm-svn: 14332
2004-06-22 20:14:41 +00:00
31f4df6b54
Order #includes as per style guide.
...
llvm-svn: 14305
2004-06-21 21:54:40 +00:00
96041e58b9
Direct declaration of namespace-ified globals does not work, must enclose
...
them with a namespace declaration.
llvm-svn: 14303
2004-06-21 21:44:12 +00:00
d0bf6f17d1
Specify variables' namespace directly instead of using an enclosing namespace.
...
llvm-svn: 14302
2004-06-21 21:21:49 +00:00
0bfea680bb
Move implemented interface header up to the top.
...
llvm-svn: 14301
2004-06-21 21:20:23 +00:00
c88c1ba066
Spell out `NoFramePointerElim'.
...
llvm-svn: 14300
2004-06-21 21:18:48 +00:00
c22299d21b
Spell out `NoFramePointerElim' for readability.
...
llvm-svn: 14299
2004-06-21 21:17:44 +00:00
5cb198a9c6
Use the common `NoFPElim' setting instead of our own.
...
llvm-svn: 14298
2004-06-21 21:10:24 +00:00
069ca067e1
Implement `NoFPElim' in a target-agnostic fashion so it can be shared.
...
llvm-svn: 14297
2004-06-21 21:08:45 +00:00
5e323e10df
* Make indentation consistent at 2 chars
...
* Doxygenify function comments
* Wrap code at 80 cols
llvm-svn: 14295
2004-06-21 20:22:03 +00:00
a97f29237e
This file is no longer applicable.
...
llvm-svn: 14294
2004-06-21 20:17:41 +00:00
302df232b5
llvm/IntrinsicLowering.h => llvm/CodeGen/IntrinsicLowering.h
...
llvm-svn: 14292
2004-06-21 18:30:31 +00:00
11f74d7072
Intrinsic::isnan has gone away, support for it commented out.
...
Intrinsic::isunordered has arrived, and we just use the standard lowering
pass for it.
llvm-svn: 14290
2004-06-21 17:58:36 +00:00
c3a0b330c9
Convert tabs to spaces.
...
llvm-svn: 14289
2004-06-21 17:41:12 +00:00
254d2cf452
Type::getPrimitiveID() -> getTypeID()
...
llvm-svn: 14288
2004-06-21 17:25:55 +00:00
6292a056a8
Type::getPrimitiveID() -> getTypeID()
...
llvm-svn: 14287
2004-06-21 17:19:08 +00:00
e05203fb40
Initial revision
...
llvm-svn: 14283
2004-06-21 16:55:25 +00:00
bcdadf3765
Move the IntrinsicLowering header into the CodeGen directory, as per PR346
...
llvm-svn: 14266
2004-06-20 07:49:54 +00:00
5b433a5de9
.zero doesn't work in the Solaris assembler.
...
llvm-svn: 14231
2004-06-18 08:59:16 +00:00
4125c92009
Get rid of selects the easy way
...
llvm-svn: 14230
2004-06-18 08:46:15 +00:00
694f7b78d9
Make visitAllocaInst() look more like its X86 counterpart.
...
llvm-svn: 14229
2004-06-18 08:45:52 +00:00
fcc30aca1b
Mess around with allocation order. In particular, I think we ought to be
...
using the local & in regs first because they are not clobbered by calls.
llvm-svn: 14228
2004-06-18 08:19:08 +00:00
b42345811e
JMPL has a delay slot.
...
llvm-svn: 14227
2004-06-18 08:18:54 +00:00
7d9af983de
Clean up the commented-out F3_3 stuff.
...
Replace it with a working class for FP instrs.
llvm-svn: 14226
2004-06-18 06:28:21 +00:00
75f3738969
Fix jmpl.
...
Add some FP moves.
llvm-svn: 14225
2004-06-18 06:28:10 +00:00
12ee9a1e75
Support printing base+offset pairs where the offset is a register.
...
Use this for printing the jmpl indirect-call instruction.
llvm-svn: 14224
2004-06-18 06:27:59 +00:00
5ebab28a8a
Support intrinsic calls (although no particular intrinsics are supported yet).
...
Support indirect calls.
Support returning a float value.
llvm-svn: 14223
2004-06-18 06:27:48 +00:00
51d3c7b05b
Add load instructions for floating-point registers.
...
llvm-svn: 14217
2004-06-18 05:19:27 +00:00
21305c6f0c
Support alloca instructions.
...
Support copying floating-point constants to registers.
Add assertion to visitCallInst to abort if we hit a NULL calledFunction, for now.
llvm-svn: 14216
2004-06-18 05:19:16 +00:00
aa27623b99
Codegen sub C, X a little bit better for register pressure. Instead of
...
mov REG, C
sub REG, X
generate:
neg X
add X, C
which uses one less reg
llvm-svn: 14213
2004-06-18 00:50:37 +00:00
b30d12292a
Fold setcc instructions into select and branches that are not in the same BB as
...
the setcc.
llvm-svn: 14212
2004-06-18 00:29:22 +00:00
c37af629b4
Make storeRegToStackSlot slightly shorter.
...
Make copyRegToReg return 1 instead of -1.
Edit a comment in emitPrologue().
llvm-svn: 14211
2004-06-17 22:34:48 +00:00
eca9546dc3
Set the isBranch and isTerminator flags on branch instructions correctly.
...
Add a FIXME about the (currently unused) JMPL instructions.
llvm-svn: 14210
2004-06-17 22:34:29 +00:00
63c1d6eda8
Emit stores correctly; don't fail an assertion.
...
llvm-svn: 14209
2004-06-17 22:34:19 +00:00
c4ee938f55
Support generating machine instructions for Phi nodes (based on x86, but with
...
modifications for 1 LLVM BB --> many MBBs).
Fix store operand order: make it always be Base, Offset, SrcReg (think
"[ Base + Offset ] = SrcReg").
Rewrite visitBranchInst() to be even dumber (but working) -- give up on
the branch fallthrough trick, for the time being.
Make visitSetCondInst() work.
llvm-svn: 14208
2004-06-17 22:34:08 +00:00
a067fb3e6b
Recognize more branches.
...
llvm-svn: 14207
2004-06-17 22:33:57 +00:00
7887da36de
Do not fold loads into instructions if it is used more than once. In particular
...
we do not want to fold the load in cases like this:
X = load
= add A, X
= add B, X
llvm-svn: 14204
2004-06-17 22:15:25 +00:00
2f2b5f5b93
Use addGlobalAddress and addMBB for call & branch targets instead of addPCDisp.
...
Abort if we see a PCRelativeDisp MachineOperand, to be safe. This matches
the X86 backend.
llvm-svn: 14202
2004-06-17 19:39:23 +00:00
6b7275996c
Rename Type::PrimitiveID to TypeId and ::getPrimitiveID() to ::getTypeID()
...
llvm-svn: 14201
2004-06-17 18:19:28 +00:00
7011d35594
Remove support for llvm.isnan. Alkis wins :)
...
llvm-svn: 14189
2004-06-15 21:48:07 +00:00
70dfc06e02
Add basic support for the isunordered intrinsic. The isnan stuff still needs to go
...
llvm-svn: 14185
2004-06-15 21:36:44 +00:00
476c73b241
Fix thinko in visitor... ShiftInsts should currently be delegated
...
to visitBinaryOperator.
llvm-svn: 14182
2004-06-15 21:09:46 +00:00
675c0e9701
I think we'll use the standard lowering passes for now.
...
llvm-svn: 14179
2004-06-15 20:37:12 +00:00
0c8ee30d53
Fix bug generating code for void call instructions: don't call
...
getReg() on void value.
llvm-svn: 14178
2004-06-15 20:06:32 +00:00
065a6cb93a
Squash a warning from the Solaris assembler by aligning the stack
...
on a double-word boundary instead of a single-word boundary.
llvm-svn: 14177
2004-06-15 19:53:10 +00:00
ad98a9b526
Allow special-casing of operand printing based on opcode. Print
...
non-register, non-immed. arguments to SETHI and OR using %hi() and
%lo() respectively.
llvm-svn: 14176
2004-06-15 19:52:59 +00:00
19fbd28a06
Support constant GEP expressions.
...
Support copying long constants to register pairs.
Support copying ConstantPointerNulls and ConstantPointerRefs to registers.
llvm-svn: 14175
2004-06-15 19:16:07 +00:00
bba0f0e492
Add file comment.
...
llvm-svn: 14172
2004-06-14 15:13:59 +00:00
99c6539bce
Make -print-machineinstrs even stronger. You get to see the final code after
...
peepholing, and make it work the same way in the JIT as in LLC.
llvm-svn: 14170
2004-06-14 05:05:45 +00:00
1c2be0e5a9
By far, one of the most common uses of isnan is to make 'isunordered'
...
comparisons. In an 'isunordered' predicate, which looks like this at
the LLVM level:
%a = call bool %llvm.isnan(double %X)
%b = call bool %llvm.isnan(double %Y)
%COM = or bool %a, %b
We used to generate this code:
fxch %ST(1)
fucomip %ST(0), %ST(0)
setp %AL
fucomip %ST(0), %ST(0)
setp %AH
or %AL, %AH
With this patch, we generate this code:
fucomip %ST(0), %ST(1)
fstp %ST(0)
setp %AL
Which should make alkis happy. Tested as X86/compare_folding.llx:test1
llvm-svn: 14148
2004-06-11 05:33:49 +00:00
71186e2fb6
Fix bug in previous checkin
...
llvm-svn: 14146
2004-06-11 05:22:44 +00:00
5ed9113e14
No really, these are dead now
...
llvm-svn: 14145
2004-06-11 04:50:14 +00:00
b35f47627d
Now that compare instructions aren't lumped in with the other twoargfp instructions,
...
we can get rid of the FpUCOM/FpUCOMi pseudo instructions, which makes stuff simpler
and faster.
llvm-svn: 14144
2004-06-11 04:49:02 +00:00
0876edf122
Introduce a new FP instruction type to separate the compare cases from the
...
twoarg cases.
llvm-svn: 14143
2004-06-11 04:41:24 +00:00
26a964f88e
Add direct support for the isnan intrinsic, implementing test/Regression/CodeGen/X86/isnan.llx
...
testcase
llvm-svn: 14141
2004-06-11 04:31:10 +00:00
a0cfedef3a
Add support for the setp instructions
...
llvm-svn: 14140
2004-06-11 04:30:06 +00:00
94ff2c3210
Split compare instruction handling OUT of handleTwoArgFP into handleCompareFP.
...
This makes the code much simpler, and the two cases really do belong apart.
Once we do it, it's pretty obvious how flawed the logic was for A != A case,
so I fixed it (fixing PR369).
This also uses freeStackSlotAfter instead of inserting an fxchg then
popStackAfter'ing in the case where there is a dead result (unlikely, but
possible), producing better code.
llvm-svn: 14139
2004-06-11 04:25:06 +00:00
2655aab200
Turn loads of ConstantPointerNulls into loads of zero... don't spill
...
them into the constant pool.
llvm-svn: 14128
2004-06-11 02:03:48 +00:00
6d6b3b3ce9
Fix the fixed stack offset, patch contributed by Vladimir Prus
...
llvm-svn: 14110
2004-06-10 06:19:25 +00:00
5b03a0628f
Encode %fsr correctly; don't fail an assertion.
...
llvm-svn: 14103
2004-06-09 21:54:59 +00:00
87d8878f6d
Fix encoding of ST*FSR instructions.
...
llvm-svn: 14102
2004-06-09 21:54:58 +00:00
87c75632ee
Fix assertion failure message to have the right method name.
...
llvm-svn: 14101
2004-06-09 20:44:42 +00:00
9095c64147
Fix for PR#366. We use getClassB() so that we can handle cast instructions
...
that cast to bool.
llvm-svn: 14096
2004-06-09 15:18:51 +00:00
c365e7cc99
Fix a minor bug in the map - since this pass adds a global symbol, it must be
...
accounted for in the map (at least, in its current format).
llvm-svn: 14075
2004-06-08 20:08:30 +00:00
76b6426a8c
Add a TmpInstruction ctor that doesn't take a MCFI.
...
llvm-svn: 14073
2004-06-08 18:52:46 +00:00
78faa9a9e6
Fix up some spacing & fix a typo in an assertion in cpValue2Value.
...
llvm-svn: 14027
2004-06-04 20:51:40 +00:00
add9f29fdf
This file is obsolete
...
llvm-svn: 14005
2004-06-04 00:15:21 +00:00
6973e85b16
Add new internal-global-symbol mapping info pass... may its life be short
...
and sweet.
llvm-svn: 13983
2004-06-03 05:03:37 +00:00
0a48c0d913
Add new mapping info pass, when EmitMappingInfo is on.
...
llvm-svn: 13981
2004-06-03 05:03:01 +00:00
25c6fa0e83
Fix big mistake in my last checkin... the big question is, how did I ever
...
get this to link before?
llvm-svn: 13980
2004-06-03 05:03:00 +00:00
11cfb090b8
Add decl. for new mapping info pass factory method.
...
llvm-svn: 13979
2004-06-03 05:02:59 +00:00
dca24ddfc7
Collapse together the abstract superclass TargetRegInfo and SparcV9RegInfo, its
...
only concrete implementation.
llvm-svn: 13977
2004-06-03 02:45:09 +00:00
4f816d2e38
<alloca.h> on cygwin pulls in a ton of stuff (macros and function protos)
...
that we REALLY don't want in the CBE code.
With this fix, the CBE passes all of the MultiSource tests on cygwin that
it does on linux. Yaay!
llvm-svn: 13975
2004-06-02 23:10:26 +00:00
562d15636e
Adjust to new TM interface
...
llvm-svn: 13954
2004-06-02 05:56:04 +00:00
c832e546d0
Method has been inlined into all callers
...
llvm-svn: 13953
2004-06-02 05:55:48 +00:00
82baa9c394
Convert to the new TargetMachine interface.
...
llvm-svn: 13952
2004-06-02 05:55:25 +00:00
535e8db0da
Stubs are no longer needed
...
llvm-svn: 13951
2004-06-02 05:53:52 +00:00
63c07bf246
Adjust to new TM interfaces
...
llvm-svn: 13949
2004-06-02 05:47:26 +00:00
4cc9328b5d
There is no "mcff" here; delete the confusing comments that refer to it.
...
llvm-svn: 13911
2004-05-30 08:29:16 +00:00
7a8734af7f
Transform an occurrence of if(...) { assert (0) }.
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llvm-svn: 13908
2004-05-30 07:34:01 +00:00
01c1f3279d
Reduce the amount of LLVM Values for which we save reg. allocator
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state. Also, save the state for the incoming register of each phi
node.
llvm-svn: 13906
2004-05-30 07:08:43 +00:00
9836668944
Rename verifySavedState to dumpSavedState. Give it a new comment.
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Call it at a more appropriate point.
llvm-svn: 13905
2004-05-30 04:22:24 +00:00
bc3d8652ec
Insert machine instructions generated for Phi nodes into their
...
corresponding MachineCodeForInstruction vectors.
I need to be able to get the register allocated for the thing which is
called PhiCpRes in this code; this should make that task easier, plus,
Phi nodes are no longer "special" in the sense that their
MachineCodeForInstruction is empty.
llvm-svn: 13904
2004-05-30 03:33:49 +00:00
24c18879f0
Remove unused #include.
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llvm-svn: 13899
2004-05-29 23:26:13 +00:00
42112b4a09
Add comments.
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llvm-svn: 13898
2004-05-29 23:10:20 +00:00
2398b17a57
Trim whitespace.
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llvm-svn: 13897
2004-05-29 22:49:51 +00:00
7fa398d850
Give InsertCodeForPhis() a new documentation comment.
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llvm-svn: 13896
2004-05-29 22:20:59 +00:00
90dc744ac0
Give PhiCp nodes better names in many cases.
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Simplify InsertPhiElimInstructions(), and give it a better doxygen comment.
llvm-svn: 13880
2004-05-28 19:34:00 +00:00
26925ff857
Make debugging output with -print-machineinstrs more useful: always print out
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the transformed LLVM code which is the input to the instruction selector.
llvm-svn: 13879
2004-05-28 19:33:59 +00:00
c53c2a3a62
Fix the big regression that has been killing the nightly tester these last
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few days. Apparently the old symbol table used to auto rename collisions in
the type symbol table and the new one does not. It doesn't really make sense
for the new one to do so, so we just make the client do it.
llvm-svn: 13877
2004-05-28 05:47:27 +00:00
c7e2ff2980
Minor changes. Switch to a SymbolTable remove that does not take linear time
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llvm-svn: 13874
2004-05-28 05:30:51 +00:00
1c6f9b4304
Make comment lines stick out less.
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llvm-svn: 13858
2004-05-27 21:41:48 +00:00
83d067a103
Fix PR344: the incorrect remove was being used.
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llvm-svn: 13790
2004-05-26 17:20:52 +00:00
230deea60f
Add a (not very meaningful) default constructor for AllocInfo objects.
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llvm-svn: 13773
2004-05-25 20:43:47 +00:00
e7e9671cad
Convert to SymbolTable's new iteration interface.
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llvm-svn: 13754
2004-05-25 08:53:40 +00:00
14428ac740
Remove use of Type::TypeTy from an assert. It will go away soon.
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llvm-svn: 13748
2004-05-25 08:50:52 +00:00
6e4edd65ab
Add support for accurate garbage collection to the LLVM code generators
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llvm-svn: 13696
2004-05-23 21:23:35 +00:00
3ef067ff33
Add some notes to myself, no functional changes
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llvm-svn: 13695
2004-05-23 21:23:12 +00:00
66911019e7
minor wording change
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llvm-svn: 13694
2004-05-23 21:22:55 +00:00
d4889be5ca
Fix a typo in a comment.
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llvm-svn: 13643
2004-05-23 05:10:06 +00:00
83c139d575
Fix to make the CBE always emit comparisons inline. Hopefully this will
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fix the really bad code we're getting on PPC.
llvm-svn: 13609
2004-05-20 20:25:50 +00:00
7b7a14d718
Fix a bug in outputting branches to constant PCs. Since the PC is supplied as
...
a full 64-bit address, it must be adjusted to fit in the branch instruction's
immediate field. (This is only used in the reoptimizer, for now.)
llvm-svn: 13608
2004-05-20 07:43:40 +00:00
e8949b3083
Minor simplification: eliminate a dyn_cast.
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Fix a typo in a debug message.
llvm-svn: 13607
2004-05-19 21:30:01 +00:00
de5ccc18e3
Don't keep track of references to LLVM BasicBlocks while emitting; use
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MachineBasicBlocks instead.
llvm-svn: 13568
2004-05-14 06:54:58 +00:00
2b3a81cd33
Support MachineBasicBlock operands on RawFrm instructions.
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Get rid of separate numbering for LLVM BasicBlocks; use the automatically
generated MachineBasicBlock numbering.
llvm-svn: 13567
2004-05-14 06:54:57 +00:00
35e73e1ca4
Generate branch machine instructions with MachineBasicBlock operands instead of
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LLVM BasicBlock operands.
llvm-svn: 13566
2004-05-14 06:54:56 +00:00
8e7aea026a
Two more improvements for null pointer handling: storing a null pointer
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and passing a null pointer into a function.
For this testcase:
void %test(int** %X) {
store int* null, int** %X
call void %test(int** null)
ret void
}
we now generate this:
test:
sub %ESP, 12
mov %EAX, DWORD PTR [%ESP + 16]
mov DWORD PTR [%EAX], 0
mov DWORD PTR [%ESP], 0
call test
add %ESP, 12
ret
instead of this:
test:
sub %ESP, 12
mov %EAX, DWORD PTR [%ESP + 16]
mov %ECX, 0
mov DWORD PTR [%EAX], %ECX
mov %EAX, 0
mov DWORD PTR [%ESP], %EAX
call test
add %ESP, 12
ret
llvm-svn: 13558
2004-05-13 15:26:48 +00:00
593d22d666
Second half of my fixed-sized-alloca patch. This folds the LEA to compute
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the alloca address into common operations like loads/stores.
In a simple testcase like this (which is just designed to excersize the
alloca A, nothing more):
int %test(int %X, bool %C) {
%A = alloca int
store int %X, int* %A
store int* %A, int** %G
br bool %C, label %T, label %F
T:
call int %test(int 1, bool false)
%V = load int* %A
ret int %V
F:
call int %test(int 123, bool true)
%V2 = load int* %A
ret int %V2
}
We now generate:
test:
sub %ESP, 12
mov %EAX, DWORD PTR [%ESP + 16]
mov %CL, BYTE PTR [%ESP + 20]
*** mov DWORD PTR [%ESP + 8], %EAX
mov %EAX, OFFSET G
lea %EDX, DWORD PTR [%ESP + 8]
mov DWORD PTR [%EAX], %EDX
test %CL, %CL
je .LBB2 # PC rel: F
.LBB1: # T
mov DWORD PTR [%ESP], 1
mov DWORD PTR [%ESP + 4], 0
call test
*** mov %EAX, DWORD PTR [%ESP + 8]
add %ESP, 12
ret
.LBB2: # F
mov DWORD PTR [%ESP], 123
mov DWORD PTR [%ESP + 4], 1
call test
*** mov %EAX, DWORD PTR [%ESP + 8]
add %ESP, 12
ret
Instead of:
test:
sub %ESP, 20
mov %EAX, DWORD PTR [%ESP + 24]
mov %CL, BYTE PTR [%ESP + 28]
*** lea %EDX, DWORD PTR [%ESP + 16]
*** mov DWORD PTR [%EDX], %EAX
mov %EAX, OFFSET G
mov DWORD PTR [%EAX], %EDX
test %CL, %CL
*** mov DWORD PTR [%ESP + 12], %EDX
je .LBB2 # PC rel: F
.LBB1: # T
mov DWORD PTR [%ESP], 1
mov %EAX, 0
mov DWORD PTR [%ESP + 4], %EAX
call test
*** mov %EAX, DWORD PTR [%ESP + 12]
*** mov %EAX, DWORD PTR [%EAX]
add %ESP, 20
ret
.LBB2: # F
mov DWORD PTR [%ESP], 123
mov %EAX, 1
mov DWORD PTR [%ESP + 4], %EAX
call test
*** mov %EAX, DWORD PTR [%ESP + 12]
*** mov %EAX, DWORD PTR [%EAX]
add %ESP, 20
ret
llvm-svn: 13557
2004-05-13 15:12:43 +00:00
2bb3325965
Substantially improve code generation for address exposed locals (aka fixed
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sized allocas in the entry block). Instead of generating code like this:
entry:
reg1024 = ESP+1234
... (much later)
*reg1024 = 17
Generate code that looks like this:
entry:
(no code generated)
... (much later)
t = ESP+1234
*t = 17
The advantage being that we DRAMATICALLY reduce the register pressure for these
silly temporaries (they were all being spilled to the stack, resulting in very
silly code). This is actually a manual implementation of rematerialization :)
I have a patch to fold the alloca address computation into loads & stores, which
will make this much better still, but just getting this right took way too much time
and I'm sleepy.
llvm-svn: 13554
2004-05-13 07:40:27 +00:00
e2d382e1a4
Pass boolean constants into function calls more efficiently, generating:
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mov DWORD PTR [%ESP + 4], 1
instead of:
mov %EAX, 1
mov DWORD PTR [%ESP + 4], %EAX
llvm-svn: 13494
2004-05-12 16:35:04 +00:00
72fb3256f8
Fix a fairly serious pessimizaion that was preventing us from efficiently
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compiling things like 'add long %X, 1'. The problem is that we were switching
the order of the operands for longs even though we can't fold them yet.
llvm-svn: 13451
2004-05-10 15:15:55 +00:00
a367dd745b
Fix some comments, avoid sign extending booleans when zero extend works fine
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llvm-svn: 13440
2004-05-09 23:16:33 +00:00
1542a98e7b
Generate more efficient code for casting booleans to integers (no sign extension required)
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llvm-svn: 13439
2004-05-09 22:28:45 +00:00
f719a52088
syntactically loopify natural loops so that the GCC loop optimizer can find them. This should *dramatically* improve the performance of CBE compiled code on targets that depend on GCC's loop optimizations (like PPC)
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llvm-svn: 13438
2004-05-09 20:41:32 +00:00
87d036caf2
Do not emit prototypes for setjmp/longjmp, as they are handled specially
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llvm-svn: 13437
2004-05-09 16:03:29 +00:00
9c29991970
Make the floating point constant pools local to each function, split the
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FindUsedTypes manipulation stuff out to be a seperate pass, and make the
main CWriter be a function pass now!
llvm-svn: 13435
2004-05-09 06:20:51 +00:00
14d328e2a5
Get this looking more like a function pass.
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llvm-svn: 13433
2004-05-09 04:30:20 +00:00
2484a6336f
Print all PHI copies for successor blocks before the terminator, whether it be a conditional branch or switch.
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llvm-svn: 13430
2004-05-09 03:42:48 +00:00
39bd20d6eb
Changed CPUResource to allow access to maxnum users.
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llvm-svn: 13425
2004-05-08 16:12:50 +00:00
1096ba9422
Add support for widening integral casts.
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Flesh out the SetCC support... which currently ends in a little bit
of unfinished code (which is probably completely hilarious) for
generating the condition value splitting the basic block up into 4
blocks, like this (clearly a better API is needed for this!):
BB
cond. branch
/ / R1=1 R2=0
\ /
\ /
R=phi(R1,R2)
Other minor edits.
llvm-svn: 13423
2004-05-08 06:36:14 +00:00
91bf7cb79b
Add a bunch more branches
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llvm-svn: 13422
2004-05-08 06:08:29 +00:00
7a66e5fff9
Flesh out GEP support
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llvm-svn: 13421
2004-05-08 05:27:20 +00:00
d18b330605
Add ADD with immediate
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llvm-svn: 13420
2004-05-08 05:26:55 +00:00
b56f1c9c10
Add forms of CMP, SUBCC, and a few branches, and some comments.
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llvm-svn: 13419
2004-05-08 04:21:32 +00:00
f3a479f04a
Add stub support for GEPs.
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Add support for branches (based loosely on X86/InstSelectSimple).
Add support for not visiting phi nodes in the first pass.
Add support for loading bools.
Flesh out support for stores.
llvm-svn: 13418
2004-05-08 04:21:17 +00:00
584308b71a
Add support for copying bool constants to registers.
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Disable the code that copies long constants to registers - it looks fishy.
Implement some simple casts: integral, smaller than longs, and equal-width
or narrowing only.
llvm-svn: 13413
2004-05-07 21:39:30 +00:00
Chris Lattner