Chris Lattner
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cf72e52df3
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Expose base opcode
llvm-svn: 4742
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2002-11-18 06:56:24 +00:00 |
Chris Lattner
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0018e8d5fc
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Start to add more information to instr.def
llvm-svn: 4741
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2002-11-18 05:37:11 +00:00 |
Chris Lattner
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9289d7d693
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Reorganize printing interface a bit
llvm-svn: 4728
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2002-11-17 22:53:13 +00:00 |
Chris Lattner
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87b84a6913
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Set the destination register field based on the target specific flags
llvm-svn: 4442
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2002-10-30 01:15:31 +00:00 |
Chris Lattner
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27d247978b
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Rename X86InstructionInfo to X86InstrInfo
llvm-svn: 4413
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2002-10-29 21:05:24 +00:00 |
Chris Lattner
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f57420ee17
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Minor renaming
llvm-svn: 4410
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2002-10-29 20:48:56 +00:00 |
Chris Lattner
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16cbd41c21
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Implement MachineInstrInfo interface
llvm-svn: 4394
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2002-10-29 17:43:19 +00:00 |
Chris Lattner
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d92fb0058b
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Initial checkin of X86 backend.
We can instruction select exactly one instruction 'ret void'. Wow.
llvm-svn: 4284
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2002-10-25 22:55:53 +00:00 |