Commit Graph

143031 Commits

Author SHA1 Message Date
Douglas Gregor 1288408984 Remove an uninteresting note
llvm-svn: 174441
2013-02-05 21:13:55 +00:00
Daniel Dunbar f51f0319bb [tests] Add support for REQUIRES and XFAIL lines in libc++ tests.
- We parse up to the first non-empty non-comment (C++ style) line, otherwise
   the format and semantics match what is used for LLVM/Clang tests.

 - For now, the only interesting thing to test against is a user supplied
   target_triple test parameter.

llvm-svn: 174440
2013-02-05 21:03:25 +00:00
Michael J. Spencer d7e7003e8b [objdump,readobj] Document the purpose and goals of each tool.
llvm-svn: 174439
2013-02-05 20:27:22 +00:00
Benjamin Kramer 944e0abf04 InstCombine: Fix and simplify the inttoptr side too.
llvm-svn: 174438
2013-02-05 20:22:40 +00:00
Enrico Granata cb9870dad8 Being explicit about which std c++ library these test cases need to use
llvm-svn: 174437
2013-02-05 20:05:31 +00:00
Anna Zaks fe9c7c87c9 [analyzer] Teach the analyzer to use a symbol for p when evaluating
(void*)p.

Addresses the false positives similar to the test case.

llvm-svn: 174436
2013-02-05 19:52:28 +00:00
Anna Zaks 064185a8ce [analyzer] add comment
llvm-svn: 174435
2013-02-05 19:52:26 +00:00
Anna Zaks b28cf9965c [analyzer] Fix typo, better doxygen as per Jordan's feedback.
llvm-svn: 174434
2013-02-05 19:52:24 +00:00
Michael Gottesman a750006ad6 Added missing newline to end of test case.
llvm-svn: 174433
2013-02-05 19:39:44 +00:00
Michael Gottesman 415ddd7e13 Removed explicit inline as per the LLVM style guide.
llvm-svn: 174432
2013-02-05 19:32:18 +00:00
Owen Anderson de89ecf1fc Reapply r174343, with a fix for a scary DAG combine bug where it failed to differentiate between the alignment of the
base point of a load, and the overall alignment of the load.  This caused infinite loops in DAG combine with the
original application of this patch.

ORIGINAL COMMIT LOG:
When the target-independent DAGCombiner inferred a higher alignment for a load,
it would replace the load with one with the higher alignment.  However, it did
not place the new load in the worklist, which prevented later DAG combines in
the same phase (for example, target-specific combines) from ever seeing it.

This patch corrects that oversight, and updates some tests whose output changed
due to slightly different DAGCombine outputs.

llvm-svn: 174431
2013-02-05 19:24:39 +00:00
Benjamin Kramer e477875873 InstCombine: Harden code to work with vectors of pointers and simplify it a bit.
Found by running instcombine on a fabricated test case for the constant folder.

llvm-svn: 174430
2013-02-05 19:21:56 +00:00
Jyotsna Verma 6031625b03 Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle
zext( set[ne,eq,gt,ugt] (...) ) type of dag patterns.

llvm-svn: 174429
2013-02-05 19:20:45 +00:00
Michael J. Spencer 7a0e212f6f [ELF][x86-64] Handle PLT32 relocations to IFUNC.
llvm-svn: 174428
2013-02-05 19:15:03 +00:00
Michael J. Spencer 7fec00b20e [ELF][Layout] Provide a proper way to get the TLS segment size.
llvm-svn: 174427
2013-02-05 19:14:43 +00:00
Michael J. Spencer 359b6ff6bb [ELF] Implement GOTPCREL for defined atoms.
llvm-svn: 174426
2013-02-05 19:14:28 +00:00
Michael J. Spencer e6ab9f80a7 [ELF] Replace local dynamic tls access with direct access.
llvm-svn: 174425
2013-02-05 19:14:07 +00:00
Benjamin Kramer a5a9ec5755 ConstantFolding: Fix a crash when encoutering a truncating inttoptr.
This was introduced in r173293.

llvm-svn: 174424
2013-02-05 19:04:36 +00:00
Arnold Schwaighofer 3be40b56c5 Loop Vectorizer: Refactor code to compute vectorized memory instruction cost
Introduce a helper class that computes the cost of memory access instructions.
No functionality change intended.

llvm-svn: 174422
2013-02-05 18:46:41 +00:00
Greg Clayton 61f39ce8b8 <rdar://problem/12866706>
Removed asserts and replaced them with conditional code and appropriate errors that prompt for a bug to be filed.

llvm-svn: 174420
2013-02-05 18:40:36 +00:00
Jyotsna Verma d53b25b47e Hexagon: Add testcase for post-increment store instructions.
llvm-svn: 174419
2013-02-05 18:23:51 +00:00
Chad Rosier 92a54f6d4c [SjLj Prepare] When demoting an invoke instructions to the stack, if the normal
edge is critical, then split it so we can insert the store.
rdar://13126179

llvm-svn: 174418
2013-02-05 18:23:10 +00:00
Jakob Stoklund Olesen 4acf7dd866 Remove liveout lists from MachineRegisterInfo.
All targets are now adding return value registers as implicit uses on
return instructions, and there is no longer a need for the live out
lists.

llvm-svn: 174417
2013-02-05 18:21:56 +00:00
Jakob Stoklund Olesen c338679c9d Remove special-casing of return blocks for liveness.
Now that return value registers are return instruction uses, there is no
need for special treatment of return blocks.

llvm-svn: 174416
2013-02-05 18:21:52 +00:00
Jakob Stoklund Olesen dbc8c51acb Move MRI liveouts to AArch64 return instructions.
llvm-svn: 174415
2013-02-05 18:21:49 +00:00
Jakob Stoklund Olesen 4af19d0014 Move MRI liveouts to XCore return instructions.
llvm-svn: 174414
2013-02-05 18:21:46 +00:00
Jakob Stoklund Olesen ef8bf3cd1f Move MRI liveouts to Sparc return instructions.
llvm-svn: 174413
2013-02-05 18:16:58 +00:00
Jyotsna Verma 50ca6dd8a7 Hexagon: Use multiclass for absolute addressing mode stores.
llvm-svn: 174412
2013-02-05 18:15:34 +00:00
Jakob Stoklund Olesen b52a3ec10b Move MRI liveouts to MSP430 return instructions.
llvm-svn: 174411
2013-02-05 18:12:06 +00:00
Jakob Stoklund Olesen a206050ccb Move MRI liveouts to Mips return instructions.
llvm-svn: 174410
2013-02-05 18:12:03 +00:00
Jakob Stoklund Olesen 8660a8c0fc Move MRI liveouts to PowerPC return instructions.
llvm-svn: 174409
2013-02-05 18:12:00 +00:00
Jakob Stoklund Olesen 242546c99d Move MRI liveouts to MBlaze return instructions.
llvm-svn: 174408
2013-02-05 18:08:45 +00:00
Jakob Stoklund Olesen 0af477c3b1 Move MRI liveouts to Hexagon return instructions.
llvm-svn: 174407
2013-02-05 18:08:43 +00:00
Jakob Stoklund Olesen f90fb6e1ff Move MRI liveouts to ARM return instructions.
llvm-svn: 174406
2013-02-05 18:08:40 +00:00
Jakob Stoklund Olesen eb1084ee54 Add a test case for PR14750.
This was fixed by r174402.

llvm-svn: 174405
2013-02-05 18:04:15 +00:00
Daniel Dunbar 8495871807 [tests] Add a 'use_system_lib' parameter.
- This controls whether to execute against the locally built library or
   not. The default is currently True which maps to what was already being done
   by default.

 - I'd appreciate it if someone can implement the proper handling of this flag
   on linux, I no longer remember the details of its .so handling.

llvm-svn: 174404
2013-02-05 18:03:49 +00:00
Tobias Grosser c14582f276 CodeGen: clang-format goodness
The changed files are not yet clang-format clean, but we are getting close.

llvm-svn: 174403
2013-02-05 18:01:29 +00:00
Jakob Stoklund Olesen dc69f6fbca Move MRI liveouts to X86 return instructions.
llvm-svn: 174402
2013-02-05 17:59:48 +00:00
Derek Schuff 90aa1d8abe [MC] Bundle alignment: Invalidate relaxed fragments
Currently, when a fragment is relaxed, its size is modified, but its
offset is not (it gets laid out as a side effect of checking whether
it needs relaxation), then all subsequent fragments are invalidated
because their offsets need to change. When bundling is enabled,
relaxed fragments need to get laid out again, because the increase in
size may push it over a bundle boundary. So instead of only
invalidating subsequent fragments, also invalidate the fragment that
gets relaxed, which causes it to get laid out again.

This patch also fixes some trailing whitespace and fixes the
bundling-related debug output of MCFragments.

llvm-svn: 174401
2013-02-05 17:55:27 +00:00
Jakob Stoklund Olesen fdc37670f6 Don't use MRI liveouts in R600.
Something very strange is going on with the output registers in this
target. Its ISelLowering code is inserting dangling CopyToReg nodes,
hoping that those physregs won't get clobbered before the RETURN.

This patch adds the output registers as implicit uses on RETURN
instructions in the custom emission pass. I'd much prefer to have those
CopyToReg nodes glued to the RETURNs, but I don't see how.

llvm-svn: 174400
2013-02-05 17:53:52 +00:00
Jakob Stoklund Olesen bf034dbd32 Avoid using MRI::liveout_iterator for computing VRSAVEs.
The liveout lists are about to be removed from MRI, this is the only
place they were used after register allocation.

Get the live out V registers directly from the return instructions
instead.

llvm-svn: 174399
2013-02-05 17:40:36 +00:00
Jordan Rose 1f25dcb167 [analyzer] Add a doc describing the internals of RegionStore.
This is a text file with Markdown-ish formatting because we haven't decided
where analyzer internal documents should go, but it's probably better to
have this in source control than sitting on my local drive forever.

llvm-svn: 174398
2013-02-05 17:31:34 +00:00
Bob Wilson a786b2c3d1 Set the deployment target for Apple llvmCore builds. <rdar://problem/12712431>
llvm-svn: 174397
2013-02-05 17:29:03 +00:00
Eli Bendersky 20e3dcc80b Format comments & clean whitespace
llvm-svn: 174396
2013-02-05 17:10:07 +00:00
Tom Stellard df063e617f R600: Fold remaining CONST_COPY after expand pseudo inst
Patch by: Vincent Lejeune

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 174395
2013-02-05 17:09:16 +00:00
Tom Stellard 41afe6a6fe R600: improve inputs/interpolation handling
Use one intrinsic for all sorts of interpolation.
Use two separate unexpanded instructions to represent INTERP_XY and _ZW -
this will allow to eliminate one part if it's not used.
Track liveness of special interpolation regs instead of reserving them -
this will allow to reuse those regs, lowering reg pressure.

Patch By: Vadim Girlin

v2[Vincent Lejeune]: Rebased against current llvm master

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 174394
2013-02-05 17:09:14 +00:00
Tom Stellard 7d41161a2d R600: Add tests for instruction predicates
llvm-svn: 174393
2013-02-05 17:09:13 +00:00
Tom Stellard 2e5e7a5bef R600: Emit function name in the AsmPrinter
Emitting the function name allows us to check for it in the FileCheck
tests so we can make sure FileCheck is checking the output of the
correct function.

llvm-svn: 174392
2013-02-05 17:09:11 +00:00
Tom Stellard 836cdd97fe R600/SI: Add patterns for fcos and fsin.
Fixes 37 piglit tests and allows e.g. FlightGear to run with radeonsi.

Patch by: Michel Dänzer

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 174391
2013-02-05 17:09:10 +00:00
Eli Bendersky 530a3bc5fa Fix comments
llvm-svn: 174390
2013-02-05 16:53:11 +00:00