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2374 Commits

Author SHA1 Message Date
Jeff Cohen 95ae171d5b Fix VC++ warning. 
llvm-svn: 25975
 2006-02-04 16:20:31 +00:00
Evan Cheng f9adce90bf Get rid of some memory leaks identified by Valgrind 
llvm-svn: 25960
 2006-02-04 06:49:00 +00:00
Jeff Cohen 57a004abfe Fix VC++ warning. 
llvm-svn: 25957
 2006-02-04 03:27:39 +00:00
Chris Lattner 3b48431333 Add initial support for immediates. This allows us to compile this: 
int %rlwnm(int %A, int %B) {
  %C = call int asm "rlwnm $0, $1, $2, $3, $4", "=r,r,r,n,n"(int %A, int %B, int 4, int 17)
  ret int %C
}

into:

_rlwnm:
        or r2, r3, r3
        or r3, r4, r4
        rlwnm r2, r2, r3, 4, 17    ;; note the immediates :)
        or r3, r2, r2
        blr

llvm-svn: 25955
 2006-02-04 02:26:14 +00:00
Chris Lattner 65ad53feb3 Initial early support for non-register operands, like immediates 
llvm-svn: 25952
 2006-02-04 02:16:44 +00:00
Chris Lattner c93403a7fb Handle another case exposed on X86. 
llvm-svn: 25949
 2006-02-03 23:50:46 +00:00
Chris Lattner 71d20c4e18 Fix a nasty problem on two-address machines in the following situation: 
store EAX -> [ss#0]
[ss#0] += 1
...
use(EAX)

In this case, it is not valid to rewrite this as:


store EAX -> [ss#0]
EAX += 1
store EAX -> [ss#0]  ;;; this would also delete the store above
...
use(EAX)

... because EAX is not a dead at that point.  Keep track of which registers
we are allowed to clobber, and which ones we aren't, and don't clobber the
ones we're not supposed to.  :)

This should resolve the issues on X86 last night.

llvm-svn: 25948
 2006-02-03 23:28:46 +00:00
Chris Lattner 507a3a7bd1 significantly simplify the VirtRegMap code by pulling the SpillSlotsAvailable 
and PhysRegsAvailable maps out into a new AvailableSpills struct.  No
functionality change.

This paves the way for a bugfix, coming up next.

llvm-svn: 25947
 2006-02-03 23:13:58 +00:00
Nate Begeman dc7bba9ffe Add a framework for eliminating instructions that produces undemanded bits. 
llvm-svn: 25945
 2006-02-03 22:24:05 +00:00
Chris Lattner f68fd20286 remove some #ifdef'd out code, which should properly be in the dag combiner anyway. 
llvm-svn: 25941
 2006-02-03 20:13:59 +00:00
Chris Lattner 6091407783 remove dead fn 
llvm-svn: 25935
 2006-02-03 06:51:34 +00:00
Nate Begeman 22e251abf1 Add common code for reassociating ops in the dag combiner 
llvm-svn: 25934
 2006-02-03 06:46:56 +00:00
Jeff Cohen 3276ff7ac6 Fix VC++ compilation error caused by using a std::map iterator variable to receive 
a std::multimap iterator value.  For some reason, GCC doesn't have a problem with this.

llvm-svn: 25927
 2006-02-03 03:48:54 +00:00
Chris Lattner e18ef0d4a6 Remove move copies and dead stuff by not clobbering the result reg of a noop copy. 
llvm-svn: 25926
 2006-02-03 03:16:14 +00:00
Chris Lattner 774d4a190b Simplify some code 
llvm-svn: 25924
 2006-02-03 03:06:49 +00:00
Chris Lattner 1ef239afb4 Add code that checks for noop copies, which triggers when either: 
1. a target doesn't know how to fold load/stores into copies, or
2. the spiller rewrites the input to a copy to the same register as the dest
   instead of to the reloaded reg.

This will be moved/improved in the near future, but allows elimination of
some ancient x86 hacks.  This eliminates 92 copies from SMG2000 on X86 and
163 copies from 252.eon.

llvm-svn: 25922
 2006-02-03 02:02:59 +00:00
Evan Cheng 02b5b9cdd6 Added case HANDLENODE to getOperationName(). 
llvm-svn: 25920
 2006-02-03 01:33:01 +00:00
Chris Lattner b7f24de4c8 Physregs may hold multiple stack slot values at the same time. Keep track 
of this, and use it to our advantage (bwahahah).  This allows us to eliminate another
60 instructions from smg2000 on PPC (probably significantly more on X86).  A common
old-new diff looks like this:

        stw r2, 3304(r1)
-       lwz r2, 3192(r1)
        stw r2, 3300(r1)
-       lwz r2, 3192(r1)
        stw r2, 3296(r1)
-       lwz r2, 3192(r1)
        stw r2, 3200(r1)
-       lwz r2, 3192(r1)
        stw r2, 3196(r1)
-       lwz r2, 3192(r1)
+       or r2, r2, r2
        stw r2, 3188(r1)

and

-       lwz r31, 604(r1)
-       lwz r13, 604(r1)
-       lwz r14, 604(r1)
-       lwz r15, 604(r1)
-       lwz r16, 604(r1)
-       lwz r30, 604(r1)
+       or r31, r30, r30
+       or r13, r30, r30
+       or r14, r30, r30
+       or r15, r30, r30
+       or r16, r30, r30
+       or r30, r30, r30

Removal of the R = R copies is coming next...

llvm-svn: 25919
 2006-02-03 00:36:31 +00:00
Chris Lattner f3aef1b004 Fix a deficiency in the spiller that Evan noticed. In particular, consider 
this code:

  store [stack slot #0],  R10
    = add R14, [stack slot #0]

The spiller didn't know that the store made the value of [stackslot#0] available
in R10 *IF* the store came from a copy instruction with the store folded into it.

This patch teaches VirtRegMap to look at these stores and recognize the values
they make available.  In one case Evan provided, this code:

        divsd %XMM0, %XMM1
        movsd %XMM1, QWORD PTR [%ESP + 40]
1)      movsd QWORD PTR [%ESP + 48], %XMM1
2)      movsd %XMM1, QWORD PTR [%ESP + 48]
        addsd %XMM1, %XMM0
3)      movsd QWORD PTR [%ESP + 48], %XMM1
        movsd QWORD PTR [%ESP + 4], %XMM0

turns into:

        divsd %XMM0, %XMM1
        movsd %XMM1, QWORD PTR [%ESP + 40]
        addsd %XMM1, %XMM0
3)      movsd QWORD PTR [%ESP + 48], %XMM1
        movsd QWORD PTR [%ESP + 4], %XMM0

In this case, instruction #2 was removed because of the value made
available by #1, and inst #1 was later deleted because it is now
never used before the stack slot is redefined by #3.

This occurs here and there in a lot of code with high spilling, on PPC
most of the removed loads/stores are LSU-reject-causing loads, which is
nice.

On X86, things are much better (because it spills more), where we nuke
about 1% of the instructions from SMG2000 and several hundred from eon.

More improvements to come...

llvm-svn: 25917
 2006-02-02 23:29:36 +00:00
Chris Lattner bb53acd03c Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) 
llvm-svn: 25913
 2006-02-02 20:12:32 +00:00
Chris Lattner 49beaf40fc Turn any_extend nodes into zero_extend nodes when it allows us to remove an 
and instruction.  This allows us to compile stuff like this:

bool %X(int %X) {
        %Y = add int %X, 14
        %Z = setne int %Y, 12345
        ret bool %Z
}

to this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        ret

instead of this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

This occurs quite a bit with the X86 backend.  For example, 25 times in
lambda, 30 times in 177.mesa, 14 times in galgel,  70 times in fma3d,
25 times in vpr, several hundred times in gcc, ~45 times in crafty,
~60 times in parser, ~140 times in eon, 110 times in perlbmk, 55 on gap,
16 times on bzip2, 14 times on twolf, and 1-2 times in many other SPEC2K
programs.

llvm-svn: 25901
 2006-02-02 07:17:31 +00:00
Chris Lattner 49ce35542f add two dag combines: 
(C1-X) == C2 --> X == C1-C2
(X+C1) == C2 --> X == C2-C1

This allows us to compile this:

bool %X(int %X) {
        %Y = add int %X, 14
        %Z = setne int %Y, 12345
        ret bool %Z
}

into this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

not this:

_X:
        movl $14, %eax
        addl 4(%esp), %eax
        cmpl $12345, %eax
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

Testcase here: Regression/CodeGen/X86/compare-add.ll

nukage of the and coming up next.

llvm-svn: 25898
 2006-02-02 06:36:13 +00:00
Chris Lattner 0bd74558ae make -debug output less newliney 
llvm-svn: 25895
 2006-02-02 00:38:08 +00:00
Chris Lattner 7f5880b1c7 Implement matching constraints. We can now say things like this: 
%C = call int asm "xyz $0, $1, $2, $3", "=r,r,r,0"(int %A, int %B, int 4)

and get:

xyz r2, r3, r4, r2

note that the r2's are pinned together.  Yaay for 2-address instructions.

2342 ----------------------------------------------------------------------

llvm-svn: 25893
 2006-02-02 00:25:23 +00:00
Chris Lattner aa23fa9f43 Implement smart printing of inline asm strings, handling variants and 
substituted operands.  For this testcase:

int %test(int %A, int %B) {
  %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
  ret int %C
}

we now emit:

_test:
        or r2, r3, r3
        or r3, r4, r4
        xyz r2, r2, r3  ;; look here
        or r3, r2, r2
        blr

... note the substituted operands. :)

llvm-svn: 25886
 2006-02-01 22:41:11 +00:00
Nate Begeman 01bd9d9911 *** empty log message *** 
llvm-svn: 25879
 2006-02-01 19:05:15 +00:00
Chris Lattner 1558fc64f9 Implement simple register assignment for inline asms. This allows us to compile: 
int %test(int %A, int %B) {
  %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
  ret int %C
}

into:

 (0x8906130, LLVM BB @0x8902220):
        %r2 = OR4 %r3, %r3
        %r3 = OR4 %r4, %r4
        INLINEASM <es:xyz $0, $1, $2>, %r2<def>, %r2, %r3
        %r3 = OR4 %r2, %r2
        BLR

which asmprints as:

_test:
        or r2, r3, r3
        or r3, r4, r4
        xyz $0, $1, $2      ;; need to print the operands now :)
        or r3, r2, r2
        blr

llvm-svn: 25878
 2006-02-01 18:59:47 +00:00
Nate Begeman 7e7f439f85 Fix some of the stuff in the PPC README file, and clean up legalization 
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.

llvm-svn: 25875
 2006-02-01 07:19:44 +00:00
Chris Lattner 3a5ed55187 adjust to changes in InlineAsm interface. Fix a few minor bugs. 
llvm-svn: 25865
 2006-02-01 01:28:23 +00:00
Evan Cheng 32be2dc0af Allow the specification of explicit alignments for constant pool entries. 
llvm-svn: 25855
 2006-01-31 22:23:14 +00:00
Evan Cheng 2443ab932d Allow custom lowering of fabs. I forgot to check in this change which 
caused several test failures.

llvm-svn: 25852
 2006-01-31 18:14:25 +00:00
Chris Lattner e9721b2984 Only insert an AND when converting from BR_COND to BRCC if needed. 
llvm-svn: 25832
 2006-01-31 05:04:52 +00:00
Chris Lattner 2e56e89452 Handle physreg input/outputs. We now compile this: 
int %test_cpuid(int %op) {
        %B = alloca int
        %C = alloca int
        %D = alloca int
        %A = call int asm "cpuid", "=eax,==ebx,==ecx,==edx,eax"(int* %B, int* %C, int* %D, int %op)
        %Bv = load int* %B
        %Cv = load int* %C
        %Dv = load int* %D
        %x = add int %A, %Bv
        %y = add int %x, %Cv
        %z = add int %y, %Dv
        ret int %z
}

to this:

_test_cpuid:
        sub %ESP, 16
        mov DWORD PTR [%ESP], %EBX
        mov %EAX, DWORD PTR [%ESP + 20]
        cpuid
        mov DWORD PTR [%ESP + 8], %ECX
        mov DWORD PTR [%ESP + 12], %EBX
        mov DWORD PTR [%ESP + 4], %EDX
        mov %ECX, DWORD PTR [%ESP + 12]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 8]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 4]
        add %EAX, %ECX
        mov %EBX, DWORD PTR [%ESP]
        add %ESP, 16
        ret

... note the proper register allocation.  :)

it is unclear to me why the loads aren't folded into the adds.

llvm-svn: 25827
 2006-01-31 02:03:41 +00:00
Chris Lattner 57ecb561c6 Print the most trivial inline asms. 
llvm-svn: 25822
 2006-01-30 23:00:08 +00:00
Chris Lattner f263a23735 Fix a bug in my legalizer reworking that caused the X86 backend to not get 
a chance to custom legalize setcc, which broke a bunch of C++ Codes.
Testcase here: CodeGen/X86/2006-01-30-LongSetcc.ll

llvm-svn: 25821
 2006-01-30 22:43:50 +00:00
Chris Lattner d6f5ae4455 don't insert an and node if it isn't needed here, this can prevent folding 
of lowered target nodes.

llvm-svn: 25804
 2006-01-30 04:22:28 +00:00
Chris Lattner f0b24d2dc0 Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. 
llvm-svn: 25803
 2006-01-30 04:09:27 +00:00
Chris Lattner 3b40e64aa3 pass the address of MaskedValueIsZero into isMaskedValueZeroForTargetNode, 
to permit recursion

llvm-svn: 25799
 2006-01-30 03:49:37 +00:00
Chris Lattner 4d1ea71a31 Fix RET of promoted values on targets that custom expand RET to a target node. 
llvm-svn: 25794
 2006-01-29 21:02:23 +00:00
Chris Lattner 2c748afd6c cleanups to the ValueTypeActions interface 
llvm-svn: 25785
 2006-01-29 08:42:06 +00:00
Chris Lattner ccb4476c87 Remove some special case hacks for CALLSEQ_*, using UpdateNodeOperands 
instead.

llvm-svn: 25780
 2006-01-29 07:58:15 +00:00
Chris Lattner 2f292789dc Allow custom expansion of ConstantVec nodes. PPC will use this in the future. 
llvm-svn: 25774
 2006-01-29 06:34:16 +00:00
Chris Lattner 758b0ac54b Legalize ConstantFP into TargetConstantFP when the target allows. Implement 
custom expansion of ConstantFP nodes.

llvm-svn: 25772
 2006-01-29 06:26:56 +00:00
Chris Lattner 678da98835 eliminate uses of SelectionDAG::getBR2Way_CC 
llvm-svn: 25767
 2006-01-29 06:00:45 +00:00
Chris Lattner d02b05473c Use the new "UpdateNodeOperands" method to simplify LegalizeDAG and make it 
faster.  This cuts about 120 lines of code out of the legalizer (mostly code
checking to see if operands have changed).

It also fixes an ugly performance issue, where the legalizer cloned the entire
graph after any change.  Now the "UpdateNodeOperands" method gives it a chance
to reuse nodes if the operands of a node change but not its opcode or valuetypes.

This speeds up instruction selection time on kimwitu++ by about 8.2% with a
release build.

llvm-svn: 25746
 2006-01-28 10:58:55 +00:00
Chris Lattner 580b12ad34 add another method variant 
llvm-svn: 25744
 2006-01-28 10:09:25 +00:00
Chris Lattner f34156e8cb add some methods for updating nodes 
llvm-svn: 25742
 2006-01-28 09:32:45 +00:00
Chris Lattner eb63751499 minor tweaks 
llvm-svn: 25740
 2006-01-28 08:31:04 +00:00
Chris Lattner 689bdcc9cf move a bunch of code, no other change. 
llvm-svn: 25739
 2006-01-28 08:25:58 +00:00
Chris Lattner fcfda5a174 remove a couple more now-extraneous legalizeop's 
llvm-svn: 25738
 2006-01-28 08:22:56 +00:00
Chris Lattner 364b89a784 fix a bug 
llvm-svn: 25737
 2006-01-28 07:42:08 +00:00
Chris Lattner 9dcce6da8e Several major changes: 
1. Pull out the expand cases for BSWAP and CT* into a separate function,
   reducing the size of LegalizeOp.
2. Fix a bug where expand(bswap i64) was wrong when i64 is legal.
3. Changed LegalizeOp/PromoteOp so that the legalizer never needs to be
   iterative.  It now operates in a single pass over the nodes.
4. Simplify a LOT of code, with a net reduction of ~280 lines.

llvm-svn: 25736
 2006-01-28 07:39:30 +00:00
Chris Lattner fd4a7f76a9 Eliminate the need for ExpandOp to set 'needsanotheriteration', as it already 
relegalizes the stuff it returns.

Add the ability to custom expand ADD/SUB, so that targets don't need to deal
with ADD_PARTS/SUB_PARTS if they don't want.

Fix some obscure potential bugs and simplify code.

llvm-svn: 25732
 2006-01-28 05:07:51 +00:00
Chris Lattner 10f677508f Instead of making callers of ExpandLibCall legalize the result, make 
ExpandLibCall do it itself.

llvm-svn: 25731
 2006-01-28 04:28:26 +00:00
Chris Lattner a593acfe66 Eliminate the need to do another iteration of the legalizer after inserting 
a libcall.

llvm-svn: 25730
 2006-01-28 04:23:12 +00:00
Chris Lattner 98ed05c81d remove method I just added 
llvm-svn: 25728
 2006-01-28 03:43:09 +00:00
Chris Lattner 43b867dd3b add a new callback 
llvm-svn: 25727
 2006-01-28 03:37:03 +00:00
Nate Begeman 595ec734fc Implement Promote for VAARG, and allow it to be custom promoted for people 
who don't want the default behavior (Alpha).

llvm-svn: 25726
 2006-01-28 03:14:31 +00:00
Nate Begeman af397cec0b Add a missing case to the dag combiner. 
llvm-svn: 25723
 2006-01-28 01:06:30 +00:00
Chris Lattner fb16a62fba Remove the ISD::CALL and ISD::TAILCALL nodes 
llvm-svn: 25721
 2006-01-28 00:18:58 +00:00
Nate Begeman 8c47c3a3b1 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for 
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.

llvm-svn: 25696
 2006-01-27 21:09:22 +00:00
Jim Laskey 0cda006a69 Using bit size of integers instead of ambiguous "long" et all. 
llvm-svn: 25694
 2006-01-27 20:31:25 +00:00
Jim Laskey 4a84e97421 Sorry - really folowing convention. 
llvm-svn: 25691
 2006-01-27 18:32:41 +00:00
Jim Laskey 116bb15473 Following convention. 
llvm-svn: 25689
 2006-01-27 18:28:31 +00:00
Andrew Lenharth fc3eca9023 fix build 
llvm-svn: 25687
 2006-01-27 18:16:17 +00:00
Chris Lattner ecd7e61a1f Fix build error that is apparently only a warning with some compilers. 
llvm-svn: 25686
 2006-01-27 17:31:30 +00:00
Jim Laskey 2b6efa9d41 Forgot the version number. 
llvm-svn: 25685
 2006-01-27 15:46:54 +00:00
Jim Laskey f98fc8441c Improve visibility/correctness of operand indices in "llvm.db" objects. 
Handle 64 in DIEs.

llvm-svn: 25684
 2006-01-27 15:20:54 +00:00
Chris Lattner 061d9e2cf0 Stub out a method 
llvm-svn: 25676
 2006-01-27 02:10:10 +00:00
Chris Lattner 4df279cfda Teach the scheduler to emit the appropriate INLINEASM MachineInstr for an 
ISD::INLINEASM node.

llvm-svn: 25668
 2006-01-26 23:28:04 +00:00
Chris Lattner 476e67be14 initial selectiondag support for new INLINEASM node. Note that inline asms 
with outputs or inputs are not supported yet. :)

llvm-svn: 25664
 2006-01-26 22:24:51 +00:00
Jim Laskey 0689dfad23 Use global information to fill out Dwarf compile units. 
llvm-svn: 25662
 2006-01-26 21:22:49 +00:00
Jim Laskey 0bbdc55333 Set up MachineDebugInfo to scan for debug information form "llvm.db"g globals. 
Global Variable information is now pulled from "llvm.dbg.globals"

llvm-svn: 25655
 2006-01-26 20:21:46 +00:00
Evan Cheng c4c339c3d0 Clean up some code; improve efficiency; and fixed a potential bug involving 
chain successors.

llvm-svn: 25630
 2006-01-26 00:30:29 +00:00
Reid Spencer 5edde66863 Don't break the optimized build (by incorrect placement of #endif) 
llvm-svn: 25613
 2006-01-25 21:49:13 +00:00
Evan Cheng 1880f8db02 No need to keep track of top and bottom nodes in a group since the vector is 
already in order. Thanks Jim for pointing it out.

llvm-svn: 25608
 2006-01-25 18:54:24 +00:00
Nate Begeman e74795cd70 First part of bug 680: 
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.

llvm-svn: 25606
 2006-01-25 18:21:52 +00:00
Jeff Cohen c3cafb8a67 Make it even more portable. 
llvm-svn: 25605
 2006-01-25 17:18:50 +00:00
Jeff Cohen fb20616aa6 Fix VC++ compilation error. 
llvm-svn: 25604
 2006-01-25 17:17:49 +00:00
Evan Cheng ab49556cf4 Bottom up register usage reducing list scheduler. 
llvm-svn: 25601
 2006-01-25 09:14:32 +00:00
Evan Cheng fbc88a624a Keep track of bottom / top element of a set of flagged nodes. 
llvm-svn: 25600
 2006-01-25 09:13:41 +00:00
Evan Cheng a6eff8a432 If scheduler choice is the default (-sched=default), use target scheduling 
preference to determine which scheduler to use. SchedulingForLatency ==
Breadth first; SchedulingForRegPressure == bottom up register reduction list
scheduler.

llvm-svn: 25599
 2006-01-25 09:12:57 +00:00
Jeff Cohen a292744ecc Portably cast a pointer to an integer. 
llvm-svn: 25594
 2006-01-25 02:40:10 +00:00
Andrew Lenharth 1dbc389ad2 fix build on 64 bit hosts 
llvm-svn: 25591
 2006-01-24 21:26:43 +00:00
Chris Lattner f9a1e3aadc Fix an infinite loop I caused by making sure to legalize the flag operand 
of CALLSEQ_* nodes

llvm-svn: 25582
 2006-01-24 05:48:21 +00:00
Jeff Cohen 12f8441c03 Fix VC++ compilation error. 
llvm-svn: 25577
 2006-01-24 04:43:17 +00:00
Jeff Cohen b56a80061a Remove unused variables. 
llvm-svn: 25576
 2006-01-24 04:42:53 +00:00
Chris Lattner 00fcdfef0d rename method 
llvm-svn: 25572
 2006-01-24 04:16:34 +00:00
Jim Laskey 3e65f28ffe Crude Dwarf global variable debugging. 
llvm-svn: 25569
 2006-01-24 00:49:18 +00:00
Chris Lattner e3a79268a2 Print file-scope inline asm blocks at the start of the output file. 
llvm-svn: 25565
 2006-01-23 23:47:53 +00:00
Andrew Lenharth 683352382e another couple selects 
llvm-svn: 25551
 2006-01-23 21:51:14 +00:00
Andrew Lenharth c28563874c another selectto 
llvm-svn: 25548
 2006-01-23 20:59:12 +00:00
Jim Laskey b8566fa10a Typo. 
llvm-svn: 25545
 2006-01-23 13:34:04 +00:00
Evan Cheng 31272347d4 Skeleton of the list schedule. 
llvm-svn: 25544
 2006-01-23 08:26:10 +00:00
Evan Cheng 421cfe8006 Minor clean up. 
llvm-svn: 25543
 2006-01-23 08:25:34 +00:00
Chris Lattner 763dfd7723 Fix Regression/CodeGen/SparcV8/2006-01-22-BitConvertLegalize.ll by making 
sure that the result of expanding a BIT_CONVERT node is itself legalized.

llvm-svn: 25538
 2006-01-23 07:30:46 +00:00
Evan Cheng 87063b9986 Remove a couple of unnecessary #include's 
llvm-svn: 25535
 2006-01-23 07:21:01 +00:00
Evan Cheng c1e1d9724d Factor out more instruction scheduler code to the base class. 
llvm-svn: 25532
 2006-01-23 07:01:07 +00:00
Chris Lattner deda32a786 Fix bugs lowering stackrestore, fixing 2004-08-12-InlinerAndAllocas.c on 
PPC.

llvm-svn: 25522
 2006-01-23 05:22:07 +00:00
Chris Lattner de02d7727f Add explicit #includes of <iostream> 
llvm-svn: 25515
 2006-01-22 23:41:00 +00:00
Chris Lattner e23928c67f Fix a bug in a recent refactor that caused a bunch of programs to miscompile 
or the compiler to crash.

llvm-svn: 25503
 2006-01-21 19:12:11 +00:00
Chris Lattner 44cab00045 Fix CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll 
llvm-svn: 25496
 2006-01-21 04:27:00 +00:00
Evan Cheng 739a6a456e Do some code refactoring on Jim's scheduler in preparation of the new list 
scheduler.

llvm-svn: 25493
 2006-01-21 02:32:06 +00:00
Jim Laskey 3d8f3a55b7 Simplify search for abbreviations. 
llvm-svn: 25491
 2006-01-21 01:13:18 +00:00
Jim Laskey 45900baadb Correct some simple errors. 
llvm-svn: 25490
 2006-01-21 00:59:54 +00:00
Jim Laskey b17434dc1d Right size integer values before emitting. 
llvm-svn: 25489
 2006-01-20 21:02:36 +00:00
Jim Laskey 7a3e9aa282 Reworked how Dwarf debug info entries and abbreviations are handled. Added 
pubnames and debuy str sections.

llvm-svn: 25487
 2006-01-20 20:34:06 +00:00
Chris Lattner 15afe462a8 remove some unintentionally committed code 
llvm-svn: 25483
 2006-01-20 18:40:10 +00:00
Chris Lattner 222ceabbee If the target doesn't support f32 natively, insert the FP_EXTEND in target-indep 
code, so that the LowerReturn code doesn't have to handle it.

llvm-svn: 25482
 2006-01-20 18:38:32 +00:00
Evan Cheng 13e8c9d6de Another typo 
llvm-svn: 25440
 2006-01-19 04:54:52 +00:00
Andrew Lenharth 7599b6e4af was ignoring the legalized chain in this case, fixed SPASS on alpha 
llvm-svn: 25428
 2006-01-18 23:19:08 +00:00
Nate Begeman 569c439567 Get rid of code in the DAGCombiner that is duplicated in SelectionDAG.cpp 
Now all constant folding in the code generator is in one place.

llvm-svn: 25426
 2006-01-18 22:35:16 +00:00
Chris Lattner e2ee190821 Temporary work around for a libcall insertion bug: If a target doesn't 
support FSIN/FCOS nodes, do not lower sin/cos to them.

llvm-svn: 25425
 2006-01-18 21:50:14 +00:00
Chris Lattner 5fee908be5 Fix a backwards conditional that caused an inf loop in some cases. This 
fixes: test/Regression/CodeGen/Generic/2005-01-18-SetUO-InfLoop.ll

llvm-svn: 25419
 2006-01-18 19:13:41 +00:00
Jim Laskey 194a5268cb Added minimum Dwarf aranges. Cleaned up some section headers. Line number 
support now works in gdb.

llvm-svn: 25417
 2006-01-18 16:54:26 +00:00
Jim Laskey cc9dfecf81 Add frame work for additional dwarf sections. Comments will improve as code 
is added.

llvm-svn: 25410
 2006-01-17 20:41:40 +00:00
Robert Bocchino 03e95af9f7 Support for the insertelement operation. 
llvm-svn: 25405
 2006-01-17 20:06:42 +00:00
Evan Cheng 6f86a7db07 Bug fix: missing LegalizeOp() on newly created nodes. 
llvm-svn: 25401
 2006-01-17 19:47:13 +00:00
Jim Laskey b9966029fe Adding basic support for Dwarf line number debug information. 
I promise to keep future commits smaller.

llvm-svn: 25396
 2006-01-17 17:31:53 +00:00
Reid Spencer b4f9a6f110 For PR411: 
This patch is an incremental step towards supporting a flat symbol table.
It de-overloads the intrinsic functions by providing type-specific intrinsics
and arranging for automatically upgrading from the old overloaded name to
the new non-overloaded name. Specifically:
  llvm.isunordered -> llvm.isunordered.f32, llvm.isunordered.f64
  llvm.sqrt -> llvm.sqrt.f32, llvm.sqrt.f64
  llvm.ctpop -> llvm.ctpop.i8, llvm.ctpop.i16, llvm.ctpop.i32, llvm.ctpop.i64
  llvm.ctlz -> llvm.ctlz.i8, llvm.ctlz.i16, llvm.ctlz.i32, llvm.ctlz.i64
  llvm.cttz -> llvm.cttz.i8, llvm.cttz.i16, llvm.cttz.i32, llvm.cttz.i64
New code should not use the overloaded intrinsic names. Warnings will be
emitted if they are used.

llvm-svn: 25366
 2006-01-16 21:12:35 +00:00
Nate Begeman 1e1eb5ee6c Constant fold ctpop/ctlz/cttz, and a couple other small cleanups 
llvm-svn: 25357
 2006-01-16 08:07:10 +00:00
Nate Begeman 2642a35f4c Expand case for 64b Legalize, even though no one should end up using this 
(itanium supports bswap natively, alpha should custom lower it using the
VAX floating point swapload, ha ha).

llvm-svn: 25356
 2006-01-16 07:59:13 +00:00
Nate Begeman 7d831fa5b9 Add BSWAP stuff to intrinsic lowering for CBE & friends. 
llvm-svn: 25355
 2006-01-16 07:57:00 +00:00
Chris Lattner fcdb420baf Disable two transformations that contribute to bus errors on SparcV8. 
llvm-svn: 25339
 2006-01-15 18:58:59 +00:00
Chris Lattner 59b82f9848 Allow the target to specify 'expand' if they just require the amount to 
be subtracted from the stack pointer.

llvm-svn: 25331
 2006-01-15 08:54:32 +00:00
Chris Lattner 2d59142613 Fix custom lowering of dynamic_stackalloc 
llvm-svn: 25329
 2006-01-15 08:43:08 +00:00
Chris Lattner 9597b33d58 add a missing node name 
llvm-svn: 25327
 2006-01-15 08:39:35 +00:00
Chris Lattner 02011c9a4f Token chain results are not always the first or last result. Consider copyfromreg nodes, where they are the middle result (the flag result is last) 
llvm-svn: 25325
 2006-01-14 22:41:46 +00:00
Nate Begeman 542c3c17a9 Remove some duplicated code 
llvm-svn: 25313
 2006-01-14 03:18:27 +00:00
Nate Begeman 2fba8a3aaa bswap implementation 
llvm-svn: 25312
 2006-01-14 03:14:10 +00:00
Chris Lattner ed9b3e1c0a If a target specified a stack pointer with setStackPointerRegisterToSaveRestore, 
lower STACKSAVE/STACKRESTORE into a copy from/to that register.

llvm-svn: 25276
 2006-01-13 17:48:44 +00:00
Chris Lattner b32664583b Compile llvm.stacksave/restore into STACKSAVE/STACKRESTORE nodes, and allow 
targets to custom expand them as they desire.

llvm-svn: 25273
 2006-01-13 02:50:02 +00:00
Chris Lattner a5110e854d add stacksave/stackrestore nodes 
llvm-svn: 25270
 2006-01-13 02:39:42 +00:00
Chris Lattner 6c9c250dcd Add "support" for stacksave/stackrestore to the dag isel 
llvm-svn: 25268
 2006-01-13 02:24:42 +00:00
Chris Lattner 3b2b0aff0c Add "support" for the llvm.stacksave/stackrestore intrinsics, this is 
used by the C backend.

llvm-svn: 25267
 2006-01-13 02:22:08 +00:00
Chris Lattner 3470b5dee6 Add a simple missing fold to produce this: 
subfic r3, r2, 33

instead of this:

        subfic r2, r2, 32
        addi r3, r2, 1

llvm-svn: 25255
 2006-01-12 20:22:43 +00:00
Chris Lattner 3760e901cf If using __main, emit global ctor/dtor list like any other global 
llvm-svn: 25251
 2006-01-12 19:17:23 +00:00
Chris Lattner b1ee616de9 Don't create rotate instructions in unsupported types, because we don't have 
promote/expand code yet.  This fixes the 177.mesa failure on PPC.

llvm-svn: 25250
 2006-01-12 18:57:33 +00:00
Evan Cheng 7f4ec8274f Allow custom lowering of DYNAMIC_STACKALLOC. 
llvm-svn: 25224
 2006-01-11 22:14:47 +00:00
Evan Cheng 982493300e ignore register #0 
llvm-svn: 25223
 2006-01-11 22:13:48 +00:00
Nate Begeman 1b8121b227 Add bswap, rotl, and rotr nodes 
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them

llvm-svn: 25222
 2006-01-11 21:21:00 +00:00
Chris Lattner fb5f46541c silence a warning 
llvm-svn: 25184
 2006-01-10 19:43:26 +00:00
Robert Bocchino 2c966e7617 Added selection DAG support for the extractelement operation. 
llvm-svn: 25179
 2006-01-10 19:04:57 +00:00
Chris Lattner b05fce676f Minor cleanup, no functionality change for current targets 
llvm-svn: 25173
 2006-01-10 05:41:59 +00:00
Chris Lattner 90ba544826 Fix an exponential function in libcall insertion to not be exponential. :) 
llvm-svn: 25165
 2006-01-09 23:21:49 +00:00
Evan Cheng 870e4f8e38 * Allow custom lowering of ADD_PARTS, SUB_PARTS, SHL_PARTS, SRA_PARTS, 
and SRL_PARTS.
* Fix a bug that caused *_PARTS to be custom lowered twice.

llvm-svn: 25157
 2006-01-09 18:31:59 +00:00
Evan Cheng 53a1f57fc5 New getNode() variants. 
llvm-svn: 25156
 2006-01-09 18:29:18 +00:00
Chris Lattner fae8afb77f Unbreak the build :( 
llvm-svn: 25124
 2006-01-06 05:47:48 +00:00
Evan Cheng 85c973cda9 Revert the previous check-in. Leave shl x, 1 along for target to deal with. 
llvm-svn: 25121
 2006-01-06 01:56:02 +00:00
Evan Cheng b03f9b32d2 fold (shl x, 1) -> (add x, x) 
llvm-svn: 25120
 2006-01-06 01:06:31 +00:00
Evan Cheng f35b1c837f Support for custom lowering of ISD::RET. 
llvm-svn: 25116
 2006-01-06 00:41:43 +00:00
Jim Laskey 762e9ec06c Added initial support for DEBUG_LABEL allowing debug specific labels to be 
inserted in the code.

llvm-svn: 25104
 2006-01-05 01:25:28 +00:00
Jim Laskey 219d559824 Applied some recommend changes from sabre. The dominate one beginning "let the 
pass manager do it's thing."  Fixes crash when compiling -g files and suppresses
dwarf statements if no debug info is present.

llvm-svn: 25100
 2006-01-04 22:28:25 +00:00
Jim Laskey 0da76a676a Add unique id to debug location for debug label use (work in progress.) 
llvm-svn: 25096
 2006-01-04 15:04:11 +00:00
Jim Laskey 2741e8304c Add check for debug presence. 
llvm-svn: 25095
 2006-01-04 14:30:12 +00:00
Jim Laskey b0609d91c3 Tie dwarf generation to darwin assembler. 
llvm-svn: 25093
 2006-01-04 13:52:30 +00:00
Jim Laskey 57a5e0b45a Moving MachineDebugInfo to module level location. 
llvm-svn: 25090
 2006-01-04 13:43:56 +00:00
Jim Laskey 6f9ff633a6 Change how MachineDebugInfo is fetched. 
llvm-svn: 25089
 2006-01-04 13:42:59 +00:00
Jim Laskey 44317393f8 Extending MachineDebugInfo. 
llvm-svn: 25086
 2006-01-04 13:36:38 +00:00
Chris Lattner 227e936650 Add support for targets (like Alpha) that have terminator instructions which 
use virtual registers.  We now allow the first instruction in a block of
terminators to use virtual registers, and update phi elimination to correctly
update livevar when eliminating phi's.  This fixes a problem on a testcase
Andrew sent me.

llvm-svn: 25083
 2006-01-04 07:12:21 +00:00
Chris Lattner 0511055276 Add an assertion, update DefInst even though no one uses it (dangling pointers 
don't help anyone)

llvm-svn: 25081
 2006-01-04 06:47:48 +00:00
Chris Lattner be45b5e948 Add a LiveVariables::VarInfo::dump method 
llvm-svn: 25080
 2006-01-04 05:40:30 +00:00
Chris Lattner b723c33614 Change a variable from being an iterator to a raw MachineInstr*, to make 
GDB use tolerable

llvm-svn: 25064
 2006-01-03 07:41:37 +00:00
Nate Begeman 164db3a7eb Make sure to pass the offset into the new node, so that we don't silently 
drop it on the floor.

llvm-svn: 25044
 2005-12-30 00:10:38 +00:00
Duraid Madina fb6a914ca7 purity++ 
llvm-svn: 25041
 2005-12-29 05:59:19 +00:00
Duraid Madina 26b037e762 add these so I can be less naughty 
llvm-svn: 25034
 2005-12-28 06:29:02 +00:00
Duraid Madina e47d9d0e92 HB is *the* code janitor. 
llvm-svn: 25031
 2005-12-28 04:55:42 +00:00
Duraid Madina 7c3dcb6892 mixed-STL programs are big and nasty :( 
llvm-svn: 25030
 2005-12-28 02:44:35 +00:00
Andrew Lenharth 30db2ec59f allow custom lowering to return null for legal results 
llvm-svn: 25007
 2005-12-25 01:07:37 +00:00
Andrew Lenharth 7259426d88 Support Custom lowering of a few more operations. 
Alpha needs to custom lower *DIV and *REM

llvm-svn: 25006
 2005-12-24 23:42:32 +00:00
Jim Laskey bdba3e2a46 Remove redundant debug locations. 
llvm-svn: 24995
 2005-12-23 20:08:28 +00:00
Chris Lattner c7037abc5b unbreak the build :-/ 
llvm-svn: 24992
 2005-12-23 16:12:20 +00:00
Evan Cheng 31d15fa093 Allow custom lowering of LOAD, EXTLOAD, ZEXTLOAD, STORE, and TRUNCSTORE. Not 
currently used.

llvm-svn: 24988
 2005-12-23 07:29:34 +00:00
Chris Lattner 26943b9691 Simplify store(bitconv(x)) to store(x). This allows us to compile this: 
void bar(double Y, double *X) {
  *X = Y;
}

to this:

bar:
        save -96, %o6, %o6
        st %i1, [%i2+4]
        st %i0, [%i2]
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

bar:
        save -104, %o6, %o6
        st %i1, [%i6+-4]
        st %i0, [%i6+-8]
        ldd [%i6+-8], %f0
        std  %f0, [%i2]
        restore %g0, %g0, %g0
        retl
        nop

on sparcv8.

llvm-svn: 24983
 2005-12-23 05:48:07 +00:00
Chris Lattner 54560f6887 fold (conv (load x)) -> (load (conv*)x). 
This allows us to compile this:
void foo(double);
void bar(double *X) { foo(*X); }

To this:

bar:
        save -96, %o6, %o6
        ld [%i0+4], %o1
        ld [%i0], %o0
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

bar:
        save -104, %o6, %o6
        ldd [%i0], %f0
        std %f0, [%i6+-8]
        ld [%i6+-4], %o1
        ld [%i6+-8], %o0
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

on SparcV8.

llvm-svn: 24982
 2005-12-23 05:44:41 +00:00
Chris Lattner efbbedbf4a Fold bitconv(bitconv(x)) -> x. We now compile this: 
void foo(double);
void bar(double X) { foo(X); }

to this:

bar:
        save -96, %o6, %o6
        or %g0, %i0, %o0
        or %g0, %i1, %o1
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

bar:
        save -112, %o6, %o6
        st %i1, [%i6+-4]
        st %i0, [%i6+-8]
        ldd [%i6+-8], %f0
        std %f0, [%i6+-16]
        ld [%i6+-12], %o1
        ld [%i6+-16], %o0
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

on V8.

llvm-svn: 24981
 2005-12-23 05:37:50 +00:00
Chris Lattner a187460552 constant fold bits_convert in getNode and in the dag combiner for fp<->int 
conversions.  This allows V8 to compiles this:

void %test() {
        call float %test2( float 1.000000e+00, float 2.000000e+00, double 3.000000e+00, double* null )
        ret void
}

into:

test:
        save -96, %o6, %o6
        sethi 0, %o3
        sethi 1049088, %o2
        sethi 1048576, %o1
        sethi 1040384, %o0
        or %g0, %o3, %o4
        call test2
        nop
        restore %g0, %g0, %g0
        retl
        nop

instead of:

test:
        save -112, %o6, %o6
        sethi 0, %o4
        sethi 1049088, %l0
        st %o4, [%i6+-12]
        st %l0, [%i6+-16]
        ld [%i6+-12], %o3
        ld [%i6+-16], %o2
        sethi 1048576, %o1
        sethi 1040384, %o0
        call test2
        nop
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24980
 2005-12-23 05:30:37 +00:00
Chris Lattner 884eb3adc3 Fix a pasto 
llvm-svn: 24973
 2005-12-23 00:52:30 +00:00
Chris Lattner 9eae8d5d03 fix a thinko in the bit_convert handling code 
llvm-svn: 24972
 2005-12-23 00:50:25 +00:00
Chris Lattner 36e663d6e1 add very simple support for the BIT_CONVERT node 
llvm-svn: 24970
 2005-12-23 00:16:34 +00:00
Chris Lattner 177d7af5d5 remove dead code 
llvm-svn: 24965
 2005-12-22 21:16:08 +00:00
Chris Lattner 1408c05a8b The 81st column doesn't like code in it. 
llvm-svn: 24943
 2005-12-22 05:23:45 +00:00
Reid Spencer 2335fc2f44 Add an eol at the end to shut gcc sup. 
llvm-svn: 24926
 2005-12-22 01:41:00 +00:00
Evan Cheng 9cdc16c6d3 * Fix a GlobalAddress lowering bug. 
* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.

llvm-svn: 24921
 2005-12-21 23:05:39 +00:00
Jim Laskey 9e296bee9a Disengage DEBUG_LOC from non-PPC targets. 
llvm-svn: 24919
 2005-12-21 20:51:37 +00:00
Evan Cheng c1583dbd63 * Added support for X86 RET with an additional operand to specify number of 
bytes to pop off stack.
* Added support for X86 SETCC.

llvm-svn: 24917
 2005-12-21 20:21:51 +00:00
Jim Laskey 7b52a923b8 Start of Dwarf framework. 
llvm-svn: 24914
 2005-12-21 19:48:16 +00:00
Chris Lattner 0fab459362 make sure to relegalize all cases 
llvm-svn: 24911
 2005-12-21 19:40:42 +00:00
Chris Lattner 44c07ed61a enable the gep isel opt 
llvm-svn: 24910
 2005-12-21 19:36:36 +00:00
Chris Lattner ac12f68424 fix a bug I introduced that broke recursive expansion of nodes (e.g. scalarizing vectors) 
llvm-svn: 24905
 2005-12-21 18:02:52 +00:00
Chris Lattner 803a575616 Lower ConstantAggregateZero into zeros 
llvm-svn: 24890
 2005-12-21 02:43:26 +00:00
Chris Lattner 434ffe49a9 Don't emit a null terminator, nor anything after it, to the ctor/dtor list 
llvm-svn: 24887
 2005-12-21 01:17:37 +00:00
Evan Cheng 6af02635a7 Added a hook to print out names of target specific DAG nodes. 
llvm-svn: 24877
 2005-12-20 06:22:03 +00:00
Chris Lattner 2af3ee4bdd Fix a nasty latent bug in the legalizer that was triggered by my patch 
last night, breaking crafty and twolf.  Make sure that the newly found
legal nodes are themselves not re-legalized until the next iteration.

Also, since this functionality exists now, we can reduce number of legalizer
iterations by depending on this behavior instead of having to misuse 'do
another iteration' to get the same effect.

llvm-svn: 24875
 2005-12-20 00:53:54 +00:00
Evan Cheng 6fc31046aa X86 conditional branch support. 
llvm-svn: 24870
 2005-12-19 23:12:38 +00:00
Evan Cheng 9fd9541367 Print out opcode number if it's an unknown target node. 
llvm-svn: 24869
 2005-12-19 23:11:49 +00:00
Chris Lattner 50b2d302d5 Fix a case where the DAG Combiner would accidentally CSE flag-producing nodes, 
creating graphs that cannot be scheduled.

llvm-svn: 24866
 2005-12-19 22:21:21 +00:00
Jim Laskey 9b9688aeb8 Amend comment. 
llvm-svn: 24861
 2005-12-19 16:32:26 +00:00
Jim Laskey ce23987e6b Create a strong dependency for loads following stores. This will leave a 
latency period between the two.

llvm-svn: 24860
 2005-12-19 16:30:13 +00:00
Chris Lattner c06da626b4 Make sure to relegalize new nodes 
llvm-svn: 24843
 2005-12-18 23:54:29 +00:00
Jeff Cohen c7cb351aac Keep VC++ happy. 
llvm-svn: 24835
 2005-12-18 22:20:05 +00:00
Chris Lattner ebcfa0c210 More corrections for flagged copyto/from reg 
llvm-svn: 24828
 2005-12-18 15:36:21 +00:00
Chris Lattner e3c67e97c7 legalize copytoreg and copyfromreg nodes that have flag operands correctly. 
llvm-svn: 24826
 2005-12-18 15:27:43 +00:00
Jim Laskey c97b7d0be9 Fix a bug Sabre was having where the DAG root was a group. The group dominator 
needed to be added to the ordering list, not the first member of the group.

llvm-svn: 24816
 2005-12-18 04:40:52 +00:00
Jim Laskey e220821deb Groups were not emitted if the dominator node and the node in the ordering list 
were not the same node.  Ultimately the test was bogus.

llvm-svn: 24815
 2005-12-18 03:59:21 +00:00
Chris Lattner cf12118965 Simplify code 
llvm-svn: 24806
 2005-12-18 01:03:46 +00:00
Chris Lattner bf0bd99e03 allow custom expansion of BR_CC 
llvm-svn: 24804
 2005-12-17 23:46:46 +00:00
Evan Cheng 225a4d0d6d X86 lowers SELECT to a cmp / test followed by a conditional move. 
llvm-svn: 24754
 2005-12-17 01:21:05 +00:00
Jim Laskey 7c462768ed Added source file/line correspondence for dwarf (PowerPC only at this point.) 
llvm-svn: 24748
 2005-12-16 22:45:29 +00:00
Chris Lattner 83e4407379 Don't create SEXTLOAD/ZEXTLOAD instructions that the target doesn't support 
if after legalize.  This fixes IA64 failures.

llvm-svn: 24725
 2005-12-15 19:02:38 +00:00
Chris Lattner d39c60fcc8 When folding loads into ops, immediately replace uses of the op with the 
load.  This reduces number of worklist iterations and avoid missing optimizations
depending on folding of things into sext_inreg nodes (which aren't supported by
all targets).
Tested by Regression/CodeGen/X86/extend.ll:test2

llvm-svn: 24712
 2005-12-14 19:25:30 +00:00
Chris Lattner 7dac1083da Fix the (zext (zextload)) case to trigger, similarly for sign extends. 
Allow (zext (truncate)) to apply after legalize if the target supports
AND (which all do).

This compiles
short %foo() {
        %tmp.0 = load ubyte* %X         ; <ubyte> [#uses=1]
        %tmp.3 = cast ubyte %tmp.0 to short             ; <short> [#uses=1]
        ret short %tmp.3
}

to:
_foo:
        movzbl _X, %eax
        ret

instead of:

_foo:
        movzbl _X, %eax
        movzbl %al, %eax
        ret

thanks to Evan for pointing this out.

llvm-svn: 24709
 2005-12-14 19:05:06 +00:00
Chris Lattner f753d1a574 Fix a miscompilation in crafty due to a recent patch 
llvm-svn: 24706
 2005-12-14 07:58:38 +00:00
Evan Cheng bce7c47306 Fold (zext (load x) to (zextload x). 
llvm-svn: 24702
 2005-12-14 02:19:23 +00:00
Chris Lattner 5d4e61dd87 Don't lump the filename and working dir together 
llvm-svn: 24697
 2005-12-13 17:40:33 +00:00
Chris Lattner f0e9aef954 Add a couple more fields, move ctor init list to .cpp file, add support 
for emitting the ctor/dtor list for common targets.

llvm-svn: 24694
 2005-12-13 06:32:10 +00:00
Nate Begeman 956aef45c9 Lowering constant pool entries on ppc exposed a bug in the recently added 
ConstantVec legalizing code, which would return constantpool nodes that
were not of the target's pointer type.

llvm-svn: 24691
 2005-12-13 03:03:23 +00:00
Chris Lattner 9e8b633ec1 Accept and ignore prefetches for now 
llvm-svn: 24678
 2005-12-12 22:51:16 +00:00
Chris Lattner b42ce7ca63 Fix CodeGen/Generic/2005-12-12-ExpandSextInreg.ll 
llvm-svn: 24677
 2005-12-12 22:27:43 +00:00
Chris Lattner f1a54c0d14 Minor tweak to get isel opt 
llvm-svn: 24663
 2005-12-11 09:05:13 +00:00
Nate Begeman 4e56db674c Add support for TargetConstantPool nodes to the dag isel emitter, and use 
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.

llvm-svn: 24657
 2005-12-10 02:36:00 +00:00
Evan Cheng dadc1057ac Added new getNode and getTargetNode variants for X86 stores. 
llvm-svn: 24653
 2005-12-10 00:37:58 +00:00
Chris Lattner a6f835f5a0 Avoid emitting two tabs when switching to a named section 
llvm-svn: 24646
 2005-12-09 19:28:49 +00:00
Chris Lattner 268d457b69 Teach legalize how to promote sext_inreg to fix a problem Andrew pointed 
out to me.

llvm-svn: 24644
 2005-12-09 17:32:47 +00:00
Chris Lattner be73d6eece improve code insertion in two ways: 
1. Only forward subst offsets into loads and stores, not into arbitrary
   things, where it will likely become a load.
2. If the source is a cast from pointer, forward subst the cast as well,
   allowing us to fold the cast away (improving cases when the cast is
   from an alloca or global).

This hasn't been fully tested, but does appear to further reduce register
pressure and improve code.  Lets let the testers grind on it a bit. :)

llvm-svn: 24640
 2005-12-08 08:00:12 +00:00
Nate Begeman ae89d862f5 Fix a crash where ConstantVec nodes were being generated with the wrong 
type when the target did not support them.  Also teach Legalize how to
expand ConstantVecs.

This allows us to generate

_test:
        lwz r2, 12(r3)
        lwz r4, 8(r3)
        lwz r5, 4(r3)
        lwz r6, 0(r3)
        addi r2, r2, 4
        addi r4, r4, 3
        addi r5, r5, 2
        addi r6, r6, 1
        stw r2, 12(r3)
        stw r4, 8(r3)
        stw r5, 4(r3)
        stw r6, 0(r3)
        blr

For:

void %test(%v4i *%P) {
        %T = load %v4i* %P
        %S = add %v4i %T, <int 1, int 2, int 3, int 4>
        store %v4i %S, %v4i * %P
        ret void
}

On PowerPC.

llvm-svn: 24633
 2005-12-07 19:48:11 +00:00
Chris Lattner 57c882edf8 Only transform (sext (truncate x)) -> (sextinreg x) if before legalize or 
if the target supports the resultant sextinreg

llvm-svn: 24632
 2005-12-07 18:02:05 +00:00
Chris Lattner cbd3d01a43 Teach the dag combiner to turn a truncate/sign_extend pair into a sextinreg 
when the types match up.  This allows the X86 backend to compile:

sbyte %toggle_value(sbyte* %tmp.1) {
        %tmp.2 = load sbyte* %tmp.1
        ret sbyte %tmp.2
}

to this:

_toggle_value:
        mov %EAX, DWORD PTR [%ESP + 4]
        movsx %EAX, BYTE PTR [%EAX]
        ret

instead of this:

_toggle_value:
        mov %EAX, DWORD PTR [%ESP + 4]
        movsx %EAX, BYTE PTR [%EAX]
        movsx %EAX, %AL
        ret

noticed in Shootout/objinst.

-Chris

llvm-svn: 24630
 2005-12-07 07:11:03 +00:00
Nate Begeman 41b1cdc771 Teach the SelectionDAG ISel how to turn ConstantPacked values into 
constant nodes with vector types.  Also teach the asm printer how to print
ConstantPacked constant pool entries.  This allows us to generate altivec
code such as the following, which adds a vector constantto a packed float.

LCPI1_0:  <4 x float> < float 0.0e+0, float 0.0e+0, float 0.0e+0, float 1.0e+0 >
        .space  4
        .space  4
        .space  4
        .long   1065353216      ; float 1
        .text
        .align  4
        .globl  _foo
_foo:
        lis r2, ha16(LCPI1_0)
        la r2, lo16(LCPI1_0)(r2)
        li r4, 0
        lvx v0, r4, r2
        lvx v1, r4, r3
        vaddfp v0, v1, v0
        stvx v0, r4, r3
        blr

For the llvm code:

void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = add <4 x float> %tmp1, < float 0.0, float 0.0, float 0.0, float 1.0 >
  store <4 x float> %tmp2, <4 x float> *%a
  ret void
}

llvm-svn: 24616
 2005-12-06 06:18:55 +00:00
Chris Lattner 3539778883 Fix the #1 code quality problem that I have seen on X86 (and it also affects 
PPC and other targets).  In a particular, consider code like this:

struct Vector3 { double x, y, z; };
struct Matrix3 { Vector3 a, b, c; };
double dot(Vector3 &a, Vector3 &b) {
   return a.x * b.x  +  a.y * b.y  +  a.z * b.z;
}
Vector3 mul(Vector3 &a, Matrix3 &b) {
   Vector3 r;
   r.x = dot( a, b.a );
   r.y = dot( a, b.b );
   r.z = dot( a, b.c );
   return r;
}
void transform(Matrix3 &m, Vector3 *x, int n) {
   for (int i = 0; i < n; i++)
      x[i] = mul( x[i], m );
}

we compile transform to a loop with all of the GEP instructions for indexing
into 'm' pulled out of the loop (9 of them).  Because isel occurs a bb at a time
we are unable to fold the constant index into the loads in the loop, leading to
PPC code that looks like this:

LBB3_1: ; no_exit.preheader
        li r2, 0
        addi r6, r3, 64        ;; 9 values live across the loop body!
        addi r7, r3, 56
        addi r8, r3, 48
        addi r9, r3, 40
        addi r10, r3, 32
        addi r11, r3, 24
        addi r12, r3, 16
        addi r30, r3, 8
LBB3_2: ; no_exit
        lfd f0, 0(r30)
        lfd f1, 8(r4)
        fmul f0, f1, f0
        lfd f2, 0(r3)        ;; no constant indices folded into the loads!
        lfd f3, 0(r4)
        lfd f4, 0(r10)
        lfd f5, 0(r6)
        lfd f6, 0(r7)
        lfd f7, 0(r8)
        lfd f8, 0(r9)
        lfd f9, 0(r11)
        lfd f10, 0(r12)
        lfd f11, 16(r4)
        fmadd f0, f3, f2, f0
        fmul f2, f1, f4
        fmadd f0, f11, f10, f0
        fmadd f2, f3, f9, f2
        fmul f1, f1, f6
        stfd f0, 0(r4)
        fmadd f0, f11, f8, f2
        fmadd f1, f3, f7, f1
        stfd f0, 8(r4)
        fmadd f0, f11, f5, f1
        addi r29, r4, 24
        stfd f0, 16(r4)
        addi r2, r2, 1
        cmpw cr0, r2, r5
        or r4, r29, r29
        bne cr0, LBB3_2 ; no_exit

uh, yuck.  With this patch, we now sink the constant offsets into the loop, producing
this code:

LBB3_1: ; no_exit.preheader
        li r2, 0
LBB3_2: ; no_exit
        lfd f0, 8(r3)
        lfd f1, 8(r4)
        fmul f0, f1, f0
        lfd f2, 0(r3)
        lfd f3, 0(r4)
        lfd f4, 32(r3)       ;; much nicer.
        lfd f5, 64(r3)
        lfd f6, 56(r3)
        lfd f7, 48(r3)
        lfd f8, 40(r3)
        lfd f9, 24(r3)
        lfd f10, 16(r3)
        lfd f11, 16(r4)
        fmadd f0, f3, f2, f0
        fmul f2, f1, f4
        fmadd f0, f11, f10, f0
        fmadd f2, f3, f9, f2
        fmul f1, f1, f6
        stfd f0, 0(r4)
        fmadd f0, f11, f8, f2
        fmadd f1, f3, f7, f1
        stfd f0, 8(r4)
        fmadd f0, f11, f5, f1
        addi r6, r4, 24
        stfd f0, 16(r4)
        addi r2, r2, 1
        cmpw cr0, r2, r5
        or r4, r6, r6
        bne cr0, LBB3_2 ; no_exit

This is much nicer as it reduces register pressure in the loop a lot.  On X86,
this takes the function from having 9 spilled registers to 2.  This should help
some spec programs on X86 (gzip?)

This is currently only enabled with -enable-gep-isel-opt to allow perf testing
tonight.

llvm-svn: 24606
 2005-12-05 07:10:48 +00:00
Chris Lattner 8782b782cd dbg.stoppoint returns a value, don't forget to init it 
llvm-svn: 24583
 2005-12-03 18:50:48 +00:00
Andrew Lenharth f9b27d7011 bah, must generate all results 
llvm-svn: 24574
 2005-12-02 06:08:08 +00:00
Andrew Lenharth 73420b3795 cycle counter fix 
llvm-svn: 24573
 2005-12-02 04:56:24 +00:00
Chris Lattner 0142afd6c1 Don't remove two operand, two result nodes from the binary ops map. These 
should come from the arbitrary ops map.

This fixes Regression/CodeGen/PowerPC/2005-12-01-Crash.ll

llvm-svn: 24571
 2005-12-01 23:14:50 +00:00
Chris Lattner 05b0b4575b Promote line and column number information for our friendly 64-bit targets. 
llvm-svn: 24568
 2005-12-01 18:21:35 +00:00
Chris Lattner 9d0d715e83 This is a bugfix for SelectNodeTo. In certain situations, we could be 
selecting a node and use a mix of getTargetNode() and SelectNodeTo.  Because
SelectNodeTo didn't check the CSE maps for a preexisting node and didn't insert
its result into the CSE maps, we would sometimes miss a CSE opportunity.

This is extremely rare, but worth fixing for completeness.

llvm-svn: 24565
 2005-12-01 18:00:57 +00:00
Nate Begeman 006bb04f3a Support multiple ValueTypes per RegisterClass, needed for upcoming vector 
work.  This change has no effect on generated code.

llvm-svn: 24563
 2005-12-01 04:51:06 +00:00
Chris Lattner be5dd5da19 Make SelectNodeTo return N 
llvm-svn: 24548
 2005-11-30 22:45:14 +00:00
Chris Lattner c174048430 CALLSEQ_START/END nodes don't get memoized, do not add them in when 
replaceAllUses'ing.

llvm-svn: 24539
 2005-11-30 18:20:52 +00:00
Andrew Lenharth 6ee8566cae At long last, you can say that f32 isn't supported for setcc 
llvm-svn: 24537
 2005-11-30 17:12:26 +00:00
Nate Begeman 1064d6ec43 First chunk of actually generating vector code for packed types. These 
changes allow us to generate the following code:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vaddfp v0, v0, v0
        stvx v0, r2, r3
        blr

for this llvm:

void %foo(<4 x float>* %a) {
entry:
        %tmp1 = load <4 x float>* %a
        %tmp2 = add <4 x float> %tmp1, %tmp1
        store <4 x float> %tmp2, <4 x float>* %a
        ret void
}

llvm-svn: 24534
 2005-11-30 08:22:07 +00:00
Andrew Lenharth 8d17c70171 add support for custom lowering SINT_TO_FP 
llvm-svn: 24531
 2005-11-30 06:43:03 +00:00
Reid Spencer 3fd1b4c9bf Fix a problem with llvm-ranlib that (on some platforms) caused the archive 
file to become corrupted due to interactions between mmap'd memory segments
and file descriptors closing. The problem is completely avoiding by using
a third temporary file.

Patch provided by Evan Jones

llvm-svn: 24527
 2005-11-30 05:21:10 +00:00
Evan Cheng 11d61613af Fixed a bug introduced by my last commit: TargetGlobalValues should key on 
GlobalValue * and index pair. Update getGlobalAddress() for symmetry.

llvm-svn: 24524
 2005-11-30 02:49:21 +00:00
Evan Cheng 0e0de2f3f0 Added an index field to GlobalAddressSDNode so it can represent X+12, etc. 
llvm-svn: 24523
 2005-11-30 02:04:11 +00:00
Chris Lattner 435b402e1f Add support for a new STRING and LOCATION node for line number support, patch 
contributed by Daniel Berlin, with a few cleanups here and there by me.

llvm-svn: 24515
 2005-11-29 06:21:05 +00:00
Nate Begeman 89b049af90 Add the majority of the vector machien value types we expect to support, 
and make a few changes to the legalization machinery to support more than
16 types.

llvm-svn: 24511
 2005-11-29 05:45:29 +00:00
Nate Begeman d37c13154a Check in code to scalarize arbitrarily wide packed types for some simple 
vector operations (load, add, sub, mul).

This allows us to codegen:
void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = add <4 x float> %tmp1, %tmp1
  store <4 x float> %tmp2, <4 x float> *%a
  ret void
}

on ppc as:
_foo:
        lfs f0, 12(r3)
        lfs f1, 8(r3)
        lfs f2, 4(r3)
        lfs f3, 0(r3)
        fadds f0, f0, f0
        fadds f1, f1, f1
        fadds f2, f2, f2
        fadds f3, f3, f3
        stfs f0, 12(r3)
        stfs f1, 8(r3)
        stfs f2, 4(r3)
        stfs f3, 0(r3)
        blr

llvm-svn: 24484
 2005-11-22 18:16:00 +00:00
Nate Begeman 07890bbec4 Rather than attempting to legalize 1 x float, make sure the SD ISel never 
generates it.  Make MVT::Vector expand-only, and remove the code in
Legalize that attempts to legalize it.

The plan for supporting N x Type is to continually epxand it in ExpandOp
until it gets down to 2 x Type, where it will be scalarized into a pair of
scalars.

llvm-svn: 24482
 2005-11-22 01:29:36 +00:00
Duraid Madina f28b3bd8b4 I think I know what you meant here, but just to be safe I'll let you 
do it. :)

    <_sabre_> excuses excuses

llvm-svn: 24471
 2005-11-21 14:09:40 +00:00