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2252 Commits

Author SHA1 Message Date
Chris Lattner 4e59a14909 Add support to the instruction patterns for AT&T style output, which will 
hopefully lead to the death of the 'GasBugWorkaroundEmitter'.  This also
includes changes to wrap the whole file to 80 columns! Woot! :)

Note that the AT&T style output has not been tested at all.

llvm-svn: 16638
 2004-10-03 20:35:00 +00:00
Chris Lattner 42c43b2cb3 Add initial support for variants 
llvm-svn: 16635
 2004-10-03 19:34:18 +00:00
Brian Gaeke dd9bb500ad Make EmitMappingInfo into an "external location" option, so that it can be set 
or cleared externally.

llvm-svn: 16623
 2004-09-30 20:20:01 +00:00
Brian Gaeke a1640d2427 I think this will handle double args. 
llvm-svn: 16618
 2004-09-30 19:44:32 +00:00
Brian Gaeke 7efd5fcb3a Mark the instructions that have delay slots with the hasDelaySlot flag. 
Add some comments.

llvm-svn: 16611
 2004-09-30 04:04:48 +00:00
Brian Gaeke 1f48ef2a9a Use TargetMachine::hasDelaySlot() instead of our old switch statement 
to find instrs that have delay slots.

llvm-svn: 16610
 2004-09-30 04:04:47 +00:00
Misha Brukman 4592f86ef1 Change the #ifdefs to allow compilation with a V8 compiler, but the JIT still 
won't work if not compiled in V9 mode, currently by GCC only, because Sun's
system compiler does not tell us if it's a V8 or V9 system.

llvm-svn: 16602
 2004-09-29 23:01:17 +00:00
Brian Gaeke fb1fd0cb5f Update list of shootout programs that should be working. 
llvm-svn: 16595
 2004-09-29 20:45:06 +00:00
Brian Gaeke ede068a8d3 Tell the target description that calls clobber registers O0...O5. 
llvm-svn: 16594
 2004-09-29 20:45:05 +00:00
Brian Gaeke 3a340dd7cd FITOD is spelled "fitod", not "fitos". Ouch. 
llvm-svn: 16591
 2004-09-29 19:59:07 +00:00
Brian Gaeke 47095da661 Don't use .quad to output double constants. The assembler must have a bug or 
something, because the wrong bit patterns get output.

llvm-svn: 16590
 2004-09-29 19:59:06 +00:00
Brian Gaeke 81f5e08573 Recognize FpMOVD as a move. 
llvm-svn: 16586
 2004-09-29 16:45:47 +00:00
Nate Begeman 2f1d0ae95e Generate better code by being far less clever when it comes to the select instruction. Don't create overlapping register lifetimes 
llvm-svn: 16580
 2004-09-29 05:00:31 +00:00
Brian Gaeke c44da15813 add results 
llvm-svn: 16579
 2004-09-29 03:48:55 +00:00
Nate Begeman 7b6df6def2 improve Type::BoolTy codegen by eliminating unnecessary clears and sign extends 
llvm-svn: 16578
 2004-09-29 03:45:33 +00:00
Brian Gaeke 4023d4e191 Simplify copyConstantToRegister() for longs, using a pair of recursive calls. 
Copy constant-pool entries' addresses into registers before loading out of them,
to avoid errors from the assembler.
Handle loading call args past the 6th one off the stack.
Add IMPLICIT_DEF pseudo-instrs for double and long arguments passed in register
pairs.
Use FpMOVD to copy doubles around instead of the horrible store-load thing we
were doing before.
Handle 'ret double' and 'ret long'.
Fix a bug in handling 'and/or/xor long'.

llvm-svn: 16577
 2004-09-29 03:34:41 +00:00
Brian Gaeke eae5b17dba Fix bug recognizing moves: isMoveInstr should only treat ORs with %g0 as 
moves, not all ORs.

llvm-svn: 16576
 2004-09-29 03:28:15 +00:00
Brian Gaeke 069bb989e4 Use FpMOVD pseudo-instruction to move doubles around. 
llvm-svn: 16575
 2004-09-29 03:27:30 +00:00
Brian Gaeke da371d9cf3 Add new FpMOVD pseudo-instruction, used to move doubles around. 
llvm-svn: 16574
 2004-09-29 03:27:29 +00:00
Brian Gaeke 7f11dd4825 Fix double and long alignment. 
Call the FPMover pass after register allocation.

llvm-svn: 16573
 2004-09-29 03:26:27 +00:00
Brian Gaeke ead8e39832 Put quotes around argument to .section directive. 
llvm-svn: 16572
 2004-09-29 03:25:40 +00:00
Brian Gaeke 457180c597 Add createSparcV8FPMoverPass(). 
llvm-svn: 16571
 2004-09-29 03:25:39 +00:00
Brian Gaeke ce0ba4857b Pass which converts FpMOVD (double move pseudoinstructions) to pairs 
of FMOVS instrs.

llvm-svn: 16570
 2004-09-29 03:24:34 +00:00
Nate Begeman 26566f0b68 To go along with sabre's improved InstCombining, improve recognition of 
integers that we can use as immediate values in instructions.

Example from yacr2:
-       lis r10, -1
-       ori r10, r10, 65535
-       add r28, r28, r10
+       addi r28, r28, -1
        addi r7, r7, 1
        addi r9, r9, 1
        b .LBB_main_9   ; loopentry.1.i214

llvm-svn: 16566
 2004-09-29 02:35:05 +00:00
Nate Begeman c762ab723b Add support for the isLoad and isStore flags, needed by the instruction scheduler 
llvm-svn: 16555
 2004-09-28 21:29:00 +00:00
Chris Lattner 6652223bd6 Capture delay slot info 
llvm-svn: 16551
 2004-09-28 18:34:14 +00:00
Alkis Evlogimenos 6280a7b716 Since we use alloca now make sure we include the proper headers for it. 
llvm-svn: 16536
 2004-09-28 02:53:15 +00:00
Alkis Evlogimenos edbb20cf7f Use alloca instead of a C99 style array. This should fix the 
compilation problem in windows.

llvm-svn: 16535
 2004-09-28 02:47:38 +00:00
Alkis Evlogimenos 3ce42ec7ee Pull assignment out of for loop conditional in order for this to 
compile under windows. Patch contributed by Paolo Invernizzi!

llvm-svn: 16534
 2004-09-28 02:40:37 +00:00
Misha Brukman d409d38151 SparcV8 int regs are not only 32-bits in width, but they are 32-bit aligned! 
llvm-svn: 16526
 2004-09-27 18:22:18 +00:00
Nate Begeman 8656a156cf Correct some BuildMI arguments for the upcoming simple scheduler 
llvm-svn: 16519
 2004-09-27 05:08:17 +00:00
Misha Brukman a68d76ebfa Fix the copy-pasto that Brian noticed: V8 int regs are 32-bits wide, not 64. 
llvm-svn: 16518
 2004-09-26 21:07:43 +00:00
Nate Begeman 49cf74b26c Fix the last of the major PPC GEP folding deficiencies. This will allow 
the ISel to use indexed and non-zero immediate offsets for GEPs that have
more than one use.  This is common for instruction sequences such as a load
followed by a modify and store to the same address.

llvm-svn: 16493
 2004-09-23 05:31:33 +00:00
Misha Brukman 379a05b52a Use the V8/V9 shared register file description 
llvm-svn: 16485
 2004-09-22 21:48:50 +00:00
Misha Brukman 3c08658d56 Combine the F2 and F3 instruction classes into one file for simplicity 
llvm-svn: 16484
 2004-09-22 21:38:42 +00:00
Misha Brukman efce1ef9c3 Fix file header path 
llvm-svn: 16483
 2004-09-22 21:29:12 +00:00
Misha Brukman 009aaf9968 Prettify formatting of the file, adjust paths to making V8 a subdir of Sparc 
llvm-svn: 16482
 2004-09-22 20:09:29 +00:00
Misha Brukman d55f854a5d V8 is now a subdirectory of Sparc; adjust paths accordingly 
llvm-svn: 16481
 2004-09-22 20:08:52 +00:00
Nate Begeman 033b816171 add optimized code sequences for setcc x, 0 
llvm-svn: 16478
 2004-09-22 04:40:25 +00:00
Alkis Evlogimenos 89dd63733a The real x87 floating point registers should not be allocatable. They 
are only used by the stackifier when transforming FPn register
allocations to the real stack file x87 registers.

llvm-svn: 16472
 2004-09-21 21:22:11 +00:00
Misha Brukman 6b17bf7193 s/ISel/PPC64ISel/ to have unique class names for debugging via gdb because the 
C++ front-end in gcc does not mangle classes in anonymous namespaces correctly.

llvm-svn: 16471
 2004-09-21 18:22:33 +00:00
Misha Brukman 87201ce8f9 s/ISel/PPC32ISel/ to have unique class names for debugging via gdb because the 
C++ front-end in gcc does not mangle classes in anonymous namespaces correctly.

llvm-svn: 16470
 2004-09-21 18:22:19 +00:00
Misha Brukman 43bd39e04e s/ISel/X86ISel/ to have unique class names for debugging via gdb because the C++ 
front-end in gcc does not mangle classes in anonymous namespaces correctly.

llvm-svn: 16469
 2004-09-21 18:21:21 +00:00
Chris Lattner 0f28cce60c Make sure to set the operand list 
llvm-svn: 16466
 2004-09-21 17:30:54 +00:00
Chris Lattner 4f2cf030e8 'Pass' should now not be derived from by clients. Instead, they should derive 
from ModulePass.  Instead of implementing Pass::run, then should implement
ModulePass::runOnModule.

llvm-svn: 16436
 2004-09-20 04:48:05 +00:00
Reid Spencer 6614946443 Convert code to compile with vc7.1. 
Patch contributed by Paolo Invernizzi. Thanks Paolo!

llvm-svn: 16368
 2004-09-15 17:06:42 +00:00
Misha Brukman 4bf01357e1 Fit long lines into 80 cols via creative space elimination 
llvm-svn: 16353
 2004-09-15 01:40:18 +00:00
Misha Brukman 2d01db846b Targets are independent of each other, so compile them in parallel 
llvm-svn: 16351
 2004-09-15 01:34:25 +00:00
Chris Lattner e8e81a2941 Revamp the Register class, and allow the use of the RegisterGroup class to 
specify aliases directly in register definitions.

Patch contributed by Jason Eckhardt!

llvm-svn: 16330
 2004-09-14 04:17:02 +00:00
Chris Lattner 247c29e4b0 Changes to make this work with Jason's patch. I checked this by hand, but 
would appreciate if others would also look at this to make sure I didn't
botch something obvious

llvm-svn: 16312
 2004-09-13 21:32:03 +00:00