Commit Graph

296625 Commits

Author SHA1 Message Date
Krzysztof Parzyszek 4e06beb820 [SystemZ] Add testcase for r339778
llvm-svn: 339780
2018-08-15 15:43:13 +00:00
Nemanja Ivanovic 5b9a4f8ee5 [PowerPC] Enhance the selection(ISD::VSELECT) of vector type
To make ISD::VSELECT available(legal) so long as there are altivec instruction,
otherwise it's default behavior is expanding.
Use xxsel to match vselect if vsx is open, or use vsel.

In order to do not write many patterns in td file, promote (for vector it's
bitcast) all other type into v4i32 and only pattern match vselect of v4i32 into
vsel or xxsel.

Patch by wuzish
Differential revision: https://reviews.llvm.org/D49531

llvm-svn: 339779
2018-08-15 15:30:36 +00:00
Krzysztof Parzyszek 2a119b9a98 [SystemZ] Replace subreg_r with subreg_h
Change
  subreg_r32  -> subreg_h32
  subreg_r64  -> subreg_h64
  subreg_hr32 -> subreg_hh32

The subregisters subreg_r32 and subreg_r64 were added to emphasize the
fact that modifying these subregisters may clobber the entire register.
This is not necessarily the case for subreg_h32, et al.

However, the ability to compose subreg_h64 with subreg_r32, and with
subreg_h32 and subreg_l32 at the same time makes the compositions be
treated as non-overlapping (leading to problems when tracking subreg
liveness). See D50468 for more details.

Differential Revision: https://reviews.llvm.org/D50725

llvm-svn: 339778
2018-08-15 15:21:23 +00:00
Marcello Maggioni e98aaf1d91 [GVN] Fix typo in IsValueFullyAvailableInBlock. NFC.
DenseMap insert() method return a pair<iterator, bool>
not pair<iterator, char>
Noticed it and thought I might just fix it ...

llvm-svn: 339777
2018-08-15 15:06:53 +00:00
Jonas Paulsson d5a9c2d551 [SystemZ] New CL option to enable subreg liveness
This option is needed to enable subreg liveness tracking during register
allocation.

Review: Ulrich Weigand
https://reviews.llvm.org/D50779

llvm-svn: 339776
2018-08-15 15:04:49 +00:00
George Rimar 21149aa2fa [LLD][ELF] - Stop using binary input in merge-invalid-size.s test. NFCI.
This rewrites the test using yaml.

llvm-svn: 339775
2018-08-15 14:59:38 +00:00
George Rimar eecc92d7d3 [LLD][ELF] - Convert binary input to yaml in sht-group.s test. NFC.
This removes test that used binary input and adds a yaml based test instead.

llvm-svn: 339774
2018-08-15 14:10:15 +00:00
Chijun Sima e8263f33d9 [SimplifyCFG] Remove pointer from SmallPtrSet before deletion
Summary:
Previously, `eraseFromParent()` calls `delete` which invalidates the value of the pointer. Copying the value of the pointer later is undefined behavior in C++11 and implementation-defined (which may cause a segfault on implementations having strict pointer safety) in C++14.

This patch removes the BasicBlock pointer from related SmallPtrSet before `delete` invalidates it in the SimplifyCFG pass.

Reviewers: kuhar, dmgreen, davide, trentxintong

Reviewed By: kuhar, dmgreen

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D50717

llvm-svn: 339773
2018-08-15 13:56:21 +00:00
George Rimar 942e8ed19d [yaml2obj] - Teach yaml2obj to produce SHT_GROUP section with a custom Info field.
This allows to set custom Info field value for SHT_GROUP sections.

It is useful to allow this because we would be able to replace at least one binary
object committed in LLD and replace it with the yaml2obj based test.

Differential revision: https://reviews.llvm.org/D50776

llvm-svn: 339772
2018-08-15 13:55:22 +00:00
Joachim Protze e1a04b4659 [OMPT] Remove OMPT idle callback
The idle callback was removed from the spec as of TR7.
This removes it from the implementation.

Patch provided by Simon Convent

Reviewers: hbae, protze.joachim

Differential Revision: https://reviews.llvm.org/D48362

llvm-svn: 339771
2018-08-15 13:54:28 +00:00
Sam Parker fabf7fe5f8 [ARM] TypeSize lower bound for ARMCodeGenPrepare
We only try to promote types with are smaller than 16-bits, but we
also need to check that the type is not less than 8-bits.

Differential Revision: https://reviews.llvm.org/D50769

llvm-svn: 339770
2018-08-15 13:29:50 +00:00
Nemanja Ivanovic 8b4bd09e22 [PowerPC] Don't run BV DAG Combine before legalization if it assumes legal types
When trying to combine a DAG that builds a vector out of sign-extensions of
vector extracts, the code assumes legal input types. Due to that, we have to
disable this combine prior to legalization.
In some cases, the DAG will look slightly different after legalization so
account for that in the matching code.

This is a fix for https://bugs.llvm.org/show_bug.cgi?id=38087

Differential Revision: https://reviews.llvm.org/D49080

llvm-svn: 339769
2018-08-15 12:58:13 +00:00
Andrea Di Biagio a03f2a77f8 [llvm-mca] Fix PR38575: Avoid an invalid implicit truncation of a processor resource mask (an uint64_t value) to unsigned.
This patch fixes a regression introduced at revision 338702.

A processor resource mask was incorrectly implicitly truncated to an unsigned
quantity. Later on, the truncated mask was used to initialize an element of a
vector of processor resource descriptors.
On targets with more than 32 processor resources, some elements of the vector
are left uninitialized. As a consequence, this bug might have eventually caused
a crash due to null dereference in the Scheduler.

This patch fixes PR38575, and adds a test for it.

llvm-svn: 339768
2018-08-15 12:53:38 +00:00
Simon Pilgrim f3b5943ffc Remove lambda default argument to fix gcc pedantic warning.
llvm-svn: 339767
2018-08-15 12:32:09 +00:00
Momchil Velikov 9e5e045b60 Use .cpp extension for certain tests instead of .cc
The tests `CodeGen/aapcs[64]-align.cc` are not run since files with a `.cc`
suffix aren't recognisze as tests. This patch renames the above two files to
`.cpp`.

Differential Revision: https://reviews.llvm.org/D46013

Comitting as obvious.

llvm-svn: 339766
2018-08-15 12:22:08 +00:00
George Rimar 2835606889 [LLD][ELF] - Handle SHT_GROUP more carefully. NFCI.
This patch solves 2 problems:
1) It adds a test to check the line below:
https://github.com/llvm-mirror/lld/blob/master/ELF/InputFiles.cpp#L334
Test case contains SHT_GROUP section with a broken (0xFF) flag.

2) The patch fixes the case when we silently accepted such broken groups
in the case when there were no other objects with the same group signature.

llvm-svn: 339765
2018-08-15 12:20:38 +00:00
George Rimar 5290af8ad9 [yaml2obj] - Teach tool to produce SHT_GROUP section with a custom type.
Currently, it is possible to use yaml2obj for producing SHT_GROUP sections
of type GRP_COMDAT. For LLD test case I need to produce an object with
a broken (different from GRP_COMDAT) type.

The patch teaches tool to do such things.

Differential revision: https://reviews.llvm.org/D50761

llvm-svn: 339764
2018-08-15 11:43:00 +00:00
Simon Pilgrim 4b2317ebfb [TargetLowering] Minor cleanup of TargetLowering::BuildSDIV. NFCI.
Pull out some types to match layout in TargetLowering::BuildUDIV. Early step towards adding non-uniform vector support.

llvm-svn: 339763
2018-08-15 11:11:05 +00:00
David Green 6cb6478739 [UnJ] Rename hasInvariantIterationCount to hasIterationCountInvariantInParent NFC
This hopefully describes the API of the function more precisely.

llvm-svn: 339762
2018-08-15 10:59:41 +00:00
Simon Pilgrim 51cee894da [X86][SSE] Add sdiv by nonuniform constant vector tests
Tests cover each TargetLowering::BuildSDIV path separately plus combos

llvm-svn: 339761
2018-08-15 10:59:29 +00:00
Aleksandr Urakov eb3735e425 [X86] Add sibling-call test cases
This commit adds new sibling-call test cases, so it will be possible to see
how these test cases will be changed after applying D45653.
See D45653 for details.

llvm-svn: 339760
2018-08-15 10:54:06 +00:00
David Green db63228a5c Fix ASTMatchersTraversalTest testcase compile on older compilers
Some versions of gcc, especially when invoked through ccache (-E), can have
trouble with raw string literals inside macros. This moves the string out of
the macro.

llvm-svn: 339759
2018-08-15 10:39:43 +00:00
Simon Pilgrim a4ba43d3d3 [TargetLowering] Minor refactor to TargetLowering::BuildUDIV to merge scalar/vector magic value collection. NFCI.
Use the same ISD::matchUnaryPredicate pattern that was used in D50392.

llvm-svn: 339758
2018-08-15 10:11:13 +00:00
Simon Pilgrim e8a906ba47 [DagCombiner] Don't bother adding to the work list if TLI.BuildSDIVPow2 failed. NFCI.
Matches the code in BuildSDIV/BuildUDIV

llvm-svn: 339757
2018-08-15 10:02:54 +00:00
Simon Pilgrim a272fa9b0c [TargetLowering] Add support for non-uniform vectors to BuildExactSDIV
This patch refactors the existing BuildExactSDIV implementation to support non-uniform constant vector denominators.

Differential Revision: https://reviews.llvm.org/D50392

llvm-svn: 339756
2018-08-15 09:35:12 +00:00
Sam Parker 6548cd3905 [ARM] Allow signed icmps in ARMCodeGenPrepare
Treat signed icmps as 'sinks', allowing them to be in the use-def
tree, enabling more promotions to be performed. As a sink, any
promoted incoming values need to be truncated before being used by
the signed icmp.

Differential Revision: https://reviews.llvm.org/D50067

llvm-svn: 339755
2018-08-15 08:23:03 +00:00
Sam Parker 7def86bbdb [ARM] Allow pointer values in ARMCodeGenPrepare
Add pointers to the list of allowed types, but don't try to promote
them. Also fixed a bug with the promotion of undef values, so a new
value is now created instead of mutating in place. We also now only
promote if there's an instruction in the use-def chains other than
the icmp, sinks and sources.

Differential Revision: https://reviews.llvm.org/D50054

llvm-svn: 339754
2018-08-15 07:52:35 +00:00
Max Kazantsev 5a10d127b9 [AliasSetTracker] Do not treat experimental_guard intrinsic as memory writing instruction
The `experimental_guard` intrinsic has memory write semantics to model the thread-exiting
logic, but does not do any actual writes to memory. Currently, `AliasSetTracker` treats it as a
normal memory write. As result, a loop-invariant load cannot be hoisted out of loop because
the guard may possibly alias with it.

This patch makes `AliasSetTracker` so that it doesn't treat guards as memory writes.

Differential Revision: https://reviews.llvm.org/D50497
Reviewed By: reames

llvm-svn: 339753
2018-08-15 06:21:02 +00:00
Max Kazantsev 530b8d1c3d [NFC] Refactoring of LoopSafetyInfo, step 1
Turn structure into class, encapsulate methods, add clarifying comments.

Differential Revision: https://reviews.llvm.org/D50693
Reviewed By: reames

llvm-svn: 339752
2018-08-15 05:55:43 +00:00
Max Kazantsev df58dd8418 [NFC] Add sanitizing assertion to ICF tracker
llvm-svn: 339751
2018-08-15 05:50:38 +00:00
Max Kazantsev 68290f838a [NFC][LICM] Make hoist method void
Method hoist always returns true. This patch makes it void.

Differential Revision: https://reviews.llvm.org/D50696
Reviewed By: hiraditya

llvm-svn: 339750
2018-08-15 02:49:12 +00:00
Craig Topper 633fe98e27 [X86] Change legacy SSE scalar fp to integer intrinsics to use specific ISD opcodes instead of keeping as intrinsics. Unify SSE and AVX512 isel patterns.
AVX512 added new versions of these intrinsics that take a rounding mode. If the rounding mode is 4 the new intrinsics are equivalent to the old intrinsics.

The AVX512 intrinsics were being lowered to ISD opcodes, but the legacy SSE intrinsics were left as intrinsics. This resulted in the AVX512 instructions needing separate patterns for the ISD opcodes and the legacy SSE intrinsics.

Now we convert SSE intrinsics and AVX512 intrinsics with rounding mode 4 to the same ISD opcode so we can share the isel patterns.

llvm-svn: 339749
2018-08-15 01:23:00 +00:00
Chandler Carruth 139b35192a [SDAG] Update the AVR backend for the SelectionDAG API changes in
r339740, fixing the build for this target.

llvm-svn: 339748
2018-08-15 01:22:50 +00:00
Richard Smith 33d8b95ef6 Silence "unused variable" warning.
llvm-svn: 339747
2018-08-15 01:06:30 +00:00
Evgeniy Stepanov a265a13bbe [hwasan] Add a basic API.
Summary:
Add user tag manipulation functions:
  __hwasan_tag_memory
  __hwasan_tag_pointer
  __hwasan_print_shadow (very simple and ugly, for now)

Reviewers: vitalybuka, kcc

Subscribers: kubamracek, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D50746

llvm-svn: 339746
2018-08-15 00:39:35 +00:00
Artem Dergachev 3ccf14eb8e [analyzer] Add support for constructors of arguments.
Once CFG-side support for argument construction contexts landed in r338436,
the analyzer could make use of them to evaluate argument constructors properly.

When evaluated as calls, constructors of arguments now use the variable region
of the parameter as their target. The corresponding stack frame does not yet
exist when the parameter is constructed, and this stack frame is created
eagerly.

Construction of functions whose body is unavailable and of virtual functions
is not yet supported. Part of the reason is the analyzer doesn't consistently
use canonical declarations o identify the function in these cases, and every
re-declaration or potential override comes with its own set of parameter
declarations. Also it is less important because if the function is not
inlined, there's usually no benefit in inlining the argument constructor.

Differential Revision: https://reviews.llvm.org/D49443

llvm-svn: 339745
2018-08-15 00:33:55 +00:00
Derek Schuff 4ec8bca13e [WebAssembly] SIMD Splats
Implement and test SIMD splat ops.

Patch by Thomas Lively

Differential Revision: https://reviews.llvm.org/D50741

llvm-svn: 339744
2018-08-15 00:30:27 +00:00
Louis Dionne 7c6baa2184 [libcxx] Fix XFAILs for aligned allocation tests on older OSX versions
Summary:
Since r338934, Clang emits an error when aligned allocation functions are
used in conjunction with a system libc++ dylib that does not support those
functions. This causes some tests to fail when testing against older libc++
dylibs. This commit marks those tests as UNSUPPORTED, and also documents the
various reasons for the tests being unsupported.

Reviewers: vsapsai, EricWF

Subscribers: christof, dexonsmith, cfe-commits, mclow.lists, EricWF

Differential Revision: https://reviews.llvm.org/D50341

llvm-svn: 339743
2018-08-15 00:30:03 +00:00
Louis Dionne feb0427c91 [libc++] Disable failing C11 feature tests for <cfloat> and <float.h>
Summary:
Those tests are breaking the test bots. A Bugzilla has been filed to
make sure those tests are re-enabled: https://bugs.llvm.org/show_bug.cgi?id=38572

Reviewers: mclow.lists, EricWF

Subscribers: krytarowski, christof, dexonsmith, cfe-commits

Differential Revision: https://reviews.llvm.org/D50748

llvm-svn: 339742
2018-08-15 00:18:01 +00:00
Louis Dionne 894ffdd82f [libc++] Detect C11 features on non-Clang compilers
Summary:
The macros were inside `#if defined(_LIBCPP_COMPILER_CLANG)`, which means
we would never detect C11 features on non-Clang compilers. According to
Marshall Clow, this is not the intended behavior.

Reviewers: mclow.lists, EricWF

Subscribers: krytarowski, christof, dexonsmith, cfe-commits

Differential Revision: https://reviews.llvm.org/D50748

llvm-svn: 339741
2018-08-15 00:16:41 +00:00
Chandler Carruth 66654b72c9 [SDAG] Remove the reliance on MI's allocation strategy for
`MachineMemOperand` pointers attached to `MachineSDNodes` and instead
have the `SelectionDAG` fully manage the memory for this array.

Prior to this change, the memory management was deeply confusing here --
The way the MI was built relied on the `SelectionDAG` allocating memory
for these arrays of pointers using the `MachineFunction`'s allocator so
that the raw pointer to the array could be blindly copied into an
eventual `MachineInstr`. This creates a hard coupling between how
`MachineInstr`s allocate their array of `MachineMemOperand` pointers and
how the `MachineSDNode` does.

This change is motivated in large part by a change I am making to how
`MachineFunction` allocates these pointers, but it seems like a layering
improvement as well.

This would run the risk of increasing allocations overall, but I've
implemented an optimization that should avoid that by storing a single
`MachineMemOperand` pointer directly instead of allocating anything.
This is expected to be a net win because the vast majority of uses of
these only need a single pointer.

As a side-effect, this makes the API for updating a `MachineSDNode` and
a `MachineInstr` reasonably different which seems nice to avoid
unexpected coupling of these two layers. We can map between them, but we
shouldn't be *surprised* at where that occurs. =]

Differential Revision: https://reviews.llvm.org/D50680

llvm-svn: 339740
2018-08-14 23:30:32 +00:00
Alex Lorenz 44fdf2dad6 [clangd] update the new test to check for diagnostic's category as well
llvm-svn: 339739
2018-08-14 22:27:03 +00:00
Alex Lorenz 37146431d2 [clangd] add an extension field to LSP to transfer the diagnostic's category
This patch adds a 'category' extension field to the LSP diagnostic that's sent
by Clangd. This extension is always on by default.

Differential Revision: https://reviews.llvm.org/D50571

llvm-svn: 339738
2018-08-14 22:21:40 +00:00
Alex Lorenz 3738dba69b [clangd] add missing test from r339454
I forgot to checkin the test for the fixits into SVN.

llvm-svn: 339737
2018-08-14 22:20:35 +00:00
Heejin Ahn 283e1c11bd [WebAssembly] Delete a specific push number from test expectations
Summary:
This shouldn't have been a specific number but rather a regex. This was
a part of rL339474 which got reverted.

Reviewers: aardappel

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D50728

llvm-svn: 339736
2018-08-14 22:14:51 +00:00
Cameron McInally 00b0658aae [FPEnv] Scalarize StrictFP vector operations
Add a helper function to scalarize constrained FP operations as needed.

Differential Revision: https://reviews.llvm.org/D50720

llvm-svn: 339735
2018-08-14 22:13:11 +00:00
Eli Friedman 0d12e90bf5 [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly.
Intentionally excluding nodes from the DAGCombine worklist is likely to
lead to weird optimizations and infinite loops, so it's generally a bad
idea.

To avoid the infinite loops, fix DAGCombine to use the
isDesirableToCommuteWithShift target hook before performing the
transforms in question, and implement the target hook in the ARM backend
disable the transforms in question.

Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a
reduced testcase for that bug. But we should have sufficient test
coverage for PerformSHLSimplify given that we're not playing weird
tricks with the worklist. I can try to bugpoint it if necessary,
though.)

Differential Revision: https://reviews.llvm.org/D50667

llvm-svn: 339734
2018-08-14 22:10:25 +00:00
Matt Morehouse 0f22fac274 [SanitizerCoverage] Add associated metadata to PC guards.
Summary:
Without this metadata LLD strips unused PC table entries
but won't strip unused guards.  This metadata also seems
to influence the linker to change the ordering in the PC
guard section to match that of the PC table section.

The libFuzzer runtime library depends on the ordering
of the PC table and PC guard sections being the same.  This
is not generally guaranteed, so we may need to redesign
PC tables/guards/counters in the future.

Reviewers: eugenis

Reviewed By: eugenis

Subscribers: kcc, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D50483

llvm-svn: 339733
2018-08-14 22:04:34 +00:00
Vlad Tsyrklevich cd4056c881 SafeStack: Disable Darwin support
SafeStack support for Darwin has not been functional and was disabled in
r339719/r339720. Disable Darwin for the safestack debuginfo test.

llvm-svn: 339732
2018-08-14 21:38:50 +00:00
Stephen Kelly cb5b433798 Remove obsolete comment
This related to the code as first checked in in r266292 ([ASTImporter]
Implement some expression-related AST node import., 2016-04-14).

llvm-svn: 339731
2018-08-14 21:34:29 +00:00