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18 Commits

Author SHA1 Message Date
Hrvoje Varga 6f09cdfd48 [mips][microMIPS] Implement APPEND, BPOSGE32C, MODSUB, MULSA.W.PH and MULSAQ_S.W.PH instructions 
Differential Revision: http://reviews.llvm.org/D14117

llvm-svn: 269408
 2016-05-13 11:32:53 +00:00
Zlatko Buljan 252cca555f [mips][microMIPS][DSP] Implement PACKRL.PH, PICK.PH, PICK.QB, SHILO, SHILOV and WRDSP instructions 
Differential Revision: http://reviews.llvm.org/D14429

llvm-svn: 255991
 2015-12-18 08:59:37 +00:00
Zlatko Buljan 54b1eb4c73 [mips][microMIPS] Implement DPA.W.PH, DPAQ_S.W.PH, DPAQ_SA.L.W, DPAQX_S.W.PH, DPAQX_SA.W.PH, DPAU.H.QBL, DPAU.H.QBR and DPAX.W.PH instructions 
Differential Revision: http://reviews.llvm.org/D13376

llvm-svn: 250382
 2015-10-15 08:59:45 +00:00
Zoran Jovanovic 2e386d3d07 [mips][micromips] Initial support for micrmomips DSP instructions and addu.qb implementation 
Differential Revision: http://reviews.llvm.org/D12798

llvm-svn: 250058
 2015-10-12 16:07:25 +00:00
Eric Christopher 22405e4bbf Make it possible for the Subtarget to change between function 
passes in the mips back end. This, unfortunately, required a
bit of churn in the various predicates to use a pointer rather
than a reference.

llvm-svn: 212744
 2014-07-10 17:26:51 +00:00
Akira Hatanaka 59bfaf774b [mips] DSP-ASE move from HI/LO register instructions. 
llvm-svn: 179739
 2013-04-18 00:52:44 +00:00
Akira Hatanaka b1527b7505 [mips] Remove asm string parameter from pseudo instructions. Add InstrItinClass 
parameter.

llvm-svn: 170661
 2012-12-20 04:20:09 +00:00
Akira Hatanaka d66f489640 MIPS DSP: other miscellaneous instructions. 
llvm-svn: 164845
 2012-09-28 20:50:31 +00:00
Akira Hatanaka 334dad6aea MIPS DSP: ADDUH.QB instruction sub-class. 
llvm-svn: 164840
 2012-09-28 20:16:04 +00:00
Akira Hatanaka a9183eda74 MIPS DSP: ABSQ_S.PH instruction sub-class. 
llvm-svn: 164787
 2012-09-27 19:09:21 +00:00
Akira Hatanaka 892b1046c6 MIPS DSP: SHLL.QB instruction sub-class. 
llvm-svn: 164786
 2012-09-27 19:05:08 +00:00
Akira Hatanaka 314b43b781 MIPS DSP: rddsp (instruction which reads DSPControl register fields to a GPR). 
llvm-svn: 164756
 2012-09-27 04:08:42 +00:00
Akira Hatanaka b664ae67ce MIPS DSP: CMPU.EQ.QB instruction sub-class. 
llvm-svn: 164755
 2012-09-27 03:58:34 +00:00
Akira Hatanaka d09642beb3 MIPS DSP: ADDU.QB instruction sub-class. 
llvm-svn: 164754
 2012-09-27 03:13:59 +00:00
Akira Hatanaka e4bd054f98 MIPS DSP: Branch on Greater Than or Equal To Value 32 in DSPControl Pos Field instruction. 
llvm-svn: 164751
 2012-09-27 02:15:57 +00:00
Akira Hatanaka 9061a46443 MIPS DSP: all the remaining instructions which read or write accumulators. 
llvm-svn: 164750
 2012-09-27 02:11:20 +00:00
Akira Hatanaka 1babeaa44c MIPS DSP: add support for extract-word instructions. 
llvm-svn: 164749
 2012-09-27 02:05:42 +00:00
Akira Hatanaka 329df55de1 MIPS DSP: Add predicates and instruction template. 
llvm-svn: 164434
 2012-09-22 00:06:06 +00:00