Commit Graph

358573 Commits

Author SHA1 Message Date
Xing GUO 7686b29584 [DWARFYAML][debug_info] Teach yaml2obj emit correct DWARF64 unit header.
This patch helps teach yaml2obj emit correct DWARF64 unit header of the .debug_info section.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D82621
2020-06-26 19:25:26 +08:00
Guillaume Chatelet b66e33a689 [Alignment][NFC] Migrate TTI::getGatherScatterOpCost to Align
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Differential Revision: https://reviews.llvm.org/D82577
2020-06-26 11:08:27 +00:00
Guillaume Chatelet fdc7c7fb87 [Alignment][NFC] Migrate TTI::getInterleavedMemoryOpCost to Align
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Differential Revision: https://reviews.llvm.org/D82573
2020-06-26 11:00:53 +00:00
Raphael Isemann 048d11de43 [lldb][NFC] Make TestDollarInVariable a non-inline test 2020-06-26 12:56:22 +02:00
Jay Foad 1b9e3cdf3c [AMDGPU] Use std::pair to return two values. NFC. 2020-06-26 11:47:12 +01:00
Cullen Rhodes d45cf9105b [AArch64][SVE2] Guard while intrinsics on scalar bfloat feature macro
Summary:
`svwhilerw_bf16` and `svwhilewr_bf16` intrinsics use the scalar
`bfloat16_t`
type which is predicated on `__ARM_FEATURE_BF16_SCALAR_ARITHMETIC`. This
patch changes the feature guard from `__ARM_FEATURE_SVE_BF16` to the
scalar bfloat feature macro.

The verify tests for `+bf16` are also removed in this patch. The purpose
of these checks was to match the SVE2 ACLE tests that look for an
implicit declaration warning if the feature isn't set. They worked when
the intrinsics were guarded on `__ARM_FEATURE_SVE_BF16` as the
`bfloat16_t`
was guarded on a different macro, but with both the type and intrinsic
guarded on the same macro an earlier error is triggered in the ACLE
regarding the type and we don't get a warning as we do for SVE2.

Reviewers: sdesmalen, fpetrogalli, kmclaughlin, rengolin, efriedma

Reviewed By: sdesmalen, fpetrogalli

Differential Revision: https://reviews.llvm.org/D82578
2020-06-26 10:25:42 +00:00
Guillaume Chatelet 7e1f79c3de [Alignment][NFC] Migrate TTI::getMaskedMemoryOpCost to Align
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Differential Revision: https://reviews.llvm.org/D82569
2020-06-26 10:14:16 +00:00
Kerry McLaughlin edcfef8fee [AArch64][SVE] Add bfloat16 support to store intrinsics
Summary:
Bfloat16 support added for the following intrinsics:
 - ST1
 - STNT1

Reviewers: sdesmalen, c-rhodes, fpetrogalli, efriedma, stuij, david-arm

Reviewed By: fpetrogalli

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, danielkiss, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D82448
2020-06-26 11:05:56 +01:00
Simon Pilgrim 1b10c618e9 LoopVectorize.h - reduce AliasAnalysis.h include to forward declaration. NFC.
Replace legacy AliasAnalysis typedef with AAResults where necessary.
2020-06-26 10:49:00 +01:00
Pavel Labath 5ed8765e2f [lldb/Unwind] Use eh_frame plan directly when it doesn't need to be augmented
Summary:
This fixes a bug in the logic for choosing the unwind plan. Based on the
comment in UnwindAssembly-x86, the intention was that a plan which
describes the function epilogue correctly does not need to be augmented
(and it should be used directly). However, the way this was implemented
(by returning false) meant that the higher level code
(FuncUnwinders::GetEHFrameAugmentedUnwindPlan) interpreted this as a
failure to produce _any_ plan and proceeded with other fallback options.
The fallback usually chosed for "asynchronous" plans was the
"instruction emulation" plan, which tended to fall over on certain
functions with multiple epilogues (that's a separate bug).

This patch simply changes the function to return true, which signals the
caller that the unmodified plan is ready to be used.

The attached test case demonstrates the case where we would previously
fall back to the instruction emulation plan, and unwind incorrectly --
the test asserts that the "augmented" eh_frame plan is used, and that
the unwind is correct.

Reviewers: jasonmolenda, jankratochvil

Subscribers: davide, echristo, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D82378
2020-06-26 11:46:47 +02:00
Pavel Labath ce275d3030 [lldb] Rewrite Scalar::Promote
This function was implementing c-like promotion rules by switching on
the both types. C promotion rules are complicated, but they are not
*that* complicated -- they basically boil down to:
- wider types trump narrower ones
- unsigned trump signed
- floating point trumps integral

With a couple of helper functions, we can rewrite the function in terms
of these rules and greatly reduce the size and complexity of this
function.
2020-06-26 11:46:47 +02:00
Kerry McLaughlin 0ccfe1b267 [AArch64][SVE] Predicate bfloat16 load patterns with HasBF16
Reviewers: sdesmalen, c-rhodes, efriedma, fpetrogalli

Reviewed By: fpetrogalli

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82464
2020-06-26 10:38:24 +01:00
Cullen Rhodes c65d4eb5d3 [AArch64][SVE] Guard perm and select bfloat16 intrinsic patterns
Summary:
Permutation and selection bfloat16 intrinsic patterns should be guarded
on the feature flag `+bf16`. Missed in D82182 and D80850.

Reviewers: sdesmalen, fpetrogalli, kmclaughlin, efriedma

Reviewed By: fpetrogalli

Differential Revision: https://reviews.llvm.org/D82492
2020-06-26 09:35:36 +00:00
David Green d428f88152 [ARM] VCVTT fpround instruction selection
Similar to the recent patch for fpext, this adds vcvtb and vcvtt with
insert into vector instruction selection patterns for fptruncs. This
helps clear up a lot of register shuffling that we would otherwise do.

Differential Revision: https://reviews.llvm.org/D81637
2020-06-26 10:24:06 +01:00
Simon Pilgrim 712b0a2026 Constants.h - remove unnecessary forward declarations. NFC.
We have to include DerivedTypes.h
2020-06-26 09:58:22 +01:00
Simon Pilgrim 8ebab67785 MemoryLocation.h - reduce Instruction.h include to forward declaration. NFC. 2020-06-26 09:58:21 +01:00
Simon Pilgrim da426ead73 LiveRangeEdit.h - reduce AliasAnalysis.h include to forward declaration. NFC.
Move include to LiveRangeEdit.cpp and replace legacy AliasAnalysis typedef with AAResults where necessary.
2020-06-26 09:58:21 +01:00
Simon Pilgrim 8b52037c7f Fix some clang-tidy namespace closing comments warnings. NFC. 2020-06-26 09:58:21 +01:00
Simon Pilgrim 70f290d95c VNCoercion.cpp - remove unused includes. NFC. 2020-06-26 09:58:20 +01:00
Simon Pilgrim dd3580cc29 AggressiveInstCombineInternal.h - reduce unnecessary includes to forward declarations. NFC. 2020-06-26 09:58:20 +01:00
Kadir Cetinkaya 834c71829c
[CodeComplete] Tweak code completion for `typename`.
Summary:
Currently, clangd always completes `typename` as `typename qualifier::name`, I think the current behavior is not useful when the code completion is triggered in `template <>`. So I tweak it to `typename identifier`.

Patch by @lh123 !

Reviewers: sammccall, kadircet

Reviewed By: kadircet

Subscribers: ilya-biryukov, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D82373
2020-06-26 10:32:12 +02:00
Tres Popp 1a30eab413 Prevent unused error when assertions are disabled. 2020-06-26 10:12:04 +02:00
David Green 76e0e1a55d [ARM] VCVTT instruction selection
We current extract and convert from a top lane of a f16 vector using a
VMOVX;VCVTB pair. We can simplify that to use a single VCVTT. The
pattern is mostly copied from a vector extract pattern, but produces a
VCVTTHS f32 directly.

This had to move some code around so that ARMInstrVFP had access to the
required pattern frags that were previously part of ARMInstrNEON.

Differential Revision: https://reviews.llvm.org/D81556
2020-06-26 08:58:55 +01:00
Tobias Gysi 48f1d4fcd2 [mlir] parallel loop canonicalization
Summary:
The patch introduces a canonicalization pattern for parallel loops. The pattern removes single-iteration loop dimensions if the loop bounds and steps are constants.

Reviewers: herhut, ftynse

Reviewed By: herhut

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, stephenneuendorffer, Joonsoo, grosul1, Kayjukh, jurahul, msifontes

Tags: #mlir

Differential Revision: https://reviews.llvm.org/D82191
2020-06-26 09:57:08 +02:00
David Sherwood ae47d158a0 Remove "rm -f" workaround in acle_sve_adda.c 2020-06-26 08:16:40 +01:00
Craig Topper 12665f2812 [X86] Make XSAVEC/XSAVEOPT/XSAVES properly depend on XSAVE in both the frontend and the backend.
These features implicitly enabled XSAVE in the frontend, but not
the backend. Disabling XSAVE in the frontend disabled XSAVEOPT, but
not the other 2. Nothing happened in the backend.
2020-06-26 00:14:58 -07:00
David Sherwood 7a834a0a4e [SVE] Fix scalable vector bug in DataLayout::getIntPtrType
Fixed an issue in DataLayout::getIntPtrType where we were assuming
the input type was always a fixed vector type, which isn't true.

Added a test that exposed the problem to:

  Transforms/InstCombine/vector_gep1.ll

Differential Revision: https://reviews.llvm.org/D82294
2020-06-26 07:58:45 +01:00
Sjoerd Meijer 243a5329d4 [SelectionDAG] Lower @llvm.get.active.lane.mask to setcc
This lowers intrinsic @llvm.get.active.lane.mask to a setcc node, i.e. an icmp
ule, and creates vectors for its 2 arguments on which the comparison is
performed.

Differential Revision: https://reviews.llvm.org/D82292
2020-06-26 07:46:38 +01:00
Sjoerd Meijer 1319d9bb84 [ARM] Don't revert get.active.lane.mask in ARM Tail-Predication pass
Don't revert intrinsic get.active.lane.mask here, this is moved to isel
legalization in D82292.

Differential Revision: https://reviews.llvm.org/D82105
2020-06-26 07:42:39 +01:00
Craig Topper a7db230d75 [X86] Add CMPXCHG16B feature to amdfam10 in the frontend.
We already have this feature on it in the backend.
2020-06-25 22:55:36 -07:00
Siva Chandra Reddy d4adac4832 [libc] Add the remaining long double flavors of nearest integer functions.
Specifically: ceill, floorl and roundl have been added.

Reviewers: asteinhauser

Differential Revision: https://reviews.llvm.org/D82591
2020-06-25 22:45:05 -07:00
Louis Dionne 05c552ad05 [libc++] Fix the runtimes build after making __config_site mandatory
The runtimes build includes libcxx/include/CMakeLists.txt directly instead
of going through the top-level CMake file. This not-very-hygienic inclusion
caused some variables like LIBCXX_BINARY_DIR not to be defined properly,
and the config_site generation logic to fail after landing 53623d4aa7.

This patch works around this issue by defining the missing variables.
However, the proper fix for this would be for the runtimes build to
always go through libc++'s top-level CMakeLists.txt. Doing otherwise
is unsupported.
2020-06-26 01:26:34 -04:00
Igor Kudrin 70165bb7e9 [DebugInfo] Fix emitting offsets to CUs with -dwarf-sections-as-references=Enable.
The size of the field depends on the DWARF format, not the address size
of the target.

Differential Revision: https://reviews.llvm.org/D82311
2020-06-26 12:12:26 +07:00
Louis Dionne 53623d4aa7 [libc++] Always generate a __config_site header
Before this patch, the __config_site header was only generated when at
least one __config_site macro needed to be defined. This lead to two
different code paths in how libc++ is configured, depending on whether
a __config_site header was generated or not. After this patch, the
__config_site is always generated, but it can be empty in case there
are no macros to define in it.

More context on why this change is important
--------------------------------------------
In addition to being confusing, this double-code-path situation lead to
broken code being checked in undetected in 2405bd6898, which introduced
the LIBCXX_HAS_MERGED_TYPEINFO_NAMES_DEFAULT CMake setting. Specifically,
the _LIBCPP_HAS_MERGED_TYPEINFO_NAMES_DEFAULT <__config_site> macro was
supposed NOT to be defined unless LIBCXX_HAS_MERGED_TYPEINFO_NAMES_DEFAULT
was specified explicitly on the CMake command line. Instead, what happened
is that it was defined to 0 if it wasn't specified explicitly and a
<__config_site> header was generated. And defining that macro to 0 had
the important effect of using the non-unique RTTI comparison implementation,
which changes the ABI.

This change in behavior wasn't noticed because the <__config_site> header
is not generated by default. However, the Apple configuration does cause
a <__config_site> header to be generated, which lead to the wrong RTTI
implementation being used, and to https://llvm.org/PR45549. We came close
to an ABI break in the dylib, but were saved due to a downstream-only
change that overrode the decision of the <__config_site> for the purpose
of RTTI comparisons in libc++abi. This is an incredible luck that we should
not rely on ever again.

While the problem itself was fixed with 2464d8135e by setting
LIBCXX_HAS_MERGED_TYPEINFO_NAMES_DEFAULT explicitly in the Apple
CMake cache and then in d0fcdcd28f by making the setting less
brittle, the point still is that we should have had a single code
path from the beginning. Unlike most normal libraries, the macros
that configure libc++ are really complex, there's a lot of them and
they control important properties of the C++ runtime. There must be
a single code path for that, and it must be simple and robust.

Differential Revision: https://reviews.llvm.org/D80927
2020-06-26 00:47:48 -04:00
Yaxun (Sam) Liu 8013ce4490 [HIP] Add missing options for lto
Add -mcpu, -mattr, -mllvm, and -save-temps options for lto when necessary.

Differential Revision: https://reviews.llvm.org/D82506
2020-06-26 00:26:05 -04:00
Michael Liao 471c806a45 [hip] Refine `clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu`
- Require target x86 being enabled as well.
2020-06-25 23:57:08 -04:00
Yaxun (Sam) Liu ed398c3ca4 [NFC] Extract unifyTargetFeatures
Differential Revision: https://reviews.llvm.org/D82579
2020-06-25 23:17:08 -04:00
Amy Kwan e0c02dc980 [PowerPC][Power10] Implement centrifuge, vector gather every nth bit, vector evaluate Builtins in LLVM/Clang
This patch implements builtins for the following prototypes:

unsigned long long __builtin_cfuged (unsigned long long, unsigned long long);
vector unsigned long long vec_cfuge (vector unsigned long long, vector unsigned long long);
unsigned long long vec_gnb (vector unsigned __int128, const unsigned int);
vector unsigned char vec_ternarylogic (vector unsigned char, vector unsigned char, vector unsigned char, const unsigned int);
vector unsigned short vec_ternarylogic (vector unsigned short, vector unsigned short, vector unsigned short, const unsigned int);
vector unsigned int vec_ternarylogic (vector unsigned int, vector unsigned int, vector unsigned int, const unsigned int);
vector unsigned long long vec_ternarylogic (vector unsigned long long, vector unsigned long long, vector unsigned long long, const unsigned int);
vector unsigned __int128 vec_ternarylogic (vector unsigned __int128, vector unsigned __int128, vector unsigned __int128, const unsigned int);

Differential Revision: https://reviews.llvm.org/D80970
2020-06-25 21:34:41 -05:00
Michael Liao 0723b1891f [hip] Re-enable `clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu`
- Require amdgpu target being enabled.
2020-06-25 22:29:27 -04:00
Michael Liao d3f437d351 [hip] Disable test temporarily due to failures on build servers. 2020-06-25 22:04:20 -04:00
Fangrui Song 161ae1f398 [CMake] Add optional lldb dependency to DEBUGINFO_TEST_DEPS
if(TARGET asan) is still brittle as it depends on the order of
compiler-rt and debuginfo-tests in LLVM_ENABLE_PROJECTS.
2020-06-25 18:28:43 -07:00
Arthur Eubanks 0c6bf90b56 [NewPM][BasicAA] Rename basicaa -> basic-aa, add alias
Summary:
BasicAA under the new pass manager is called "basic-aa", which fits more
with the other AA names which almost always contain a dash.

Keep an alias from basicaa -> basic-aa.

Will change all references of "basicaa" to "basic-aa", then remove the
alias.

Makes check-llvm failures under NPM go from 2307 to 1867.

Reviewers: asbirlea, ychen

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82607
2020-06-25 18:08:34 -07:00
Sam McCall 0e1997ed4e [clangd] Fix test compile with GCC (name conflict) 2020-06-26 03:02:28 +02:00
Fangrui Song e477a5f6c8 [CMake] Add optional asan & safestack dependencies to DEBUGINFO_TEST_DEPS 2020-06-25 17:56:35 -07:00
Michael Liao dccfaacf93 [InferAddressSpaces] Handle the pair of `ptrtoint`/`inttoptr`.
Summary:
- `ptrtoint` and `inttoptr` are defined as no-op casts if the integer
  value as the same size as the pointer value. The pair of
  `ptrtoint`/`inttoptr` is in fact a no-op cast sequence between
  different address spaces. Teach `infer-address-spaces` to handle them
  like a `bitcast`.

Reviewers: arsenm, chandlerc

Subscribers: jvesely, wdng, nhaehnle, hiraditya, kerbowa, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D81938
2020-06-25 20:46:56 -04:00
Fangrui Song 40dd5cb110 [debuginfo-tests] Require "lldb" for some dexter tests 2020-06-25 17:35:01 -07:00
Amara Emerson 97a34b5f8d [AArch64][GlobalISel] Fix extended shift addressing mode selection not handling sxth.
The complex pattern for extended shift offsets only allow sxtw as the extend,
not sxth. Our equivalent function to do this was not rejecting SXTH so we
were miscompiling. This was exposed by D81992.
2020-06-25 17:24:32 -07:00
Jonas Devlieghere f441313464 [lldb/ScriptInterpreter] Fix Windows error C2371: 'pid_t': redefinition
pyconfig.h(194): error C2371: 'pid_t': redefinition; different basic types
PosixApi.h(82): note: see declaration of 'pid_t'
2020-06-25 17:15:29 -07:00
Fangrui Song ca8b7ef763 [CMake] Add llvm-config to DEBUGINFO_TEST_DEPS
Fix `fatal: Could not run process ['/path/to/build/./bin/llvm-config', '--build-mode']`
when running check-debuginfo in a fresh build directory.
2020-06-25 16:49:33 -07:00
Mehdi Amini 4abf024336 Remove references to the 4.0 release as a major breaking (NFC)
This is cleaning up comments (mostly in the bitcode handling) about
removing some backward compatibility aspect in the 4.0 release.
Historically, "4.0" was used during the development of the 3.x
versions as "this future major breaking change version". At the time
the major number was used to indicate the compatibility. When we
reached 3.9 we decided to change the numbering, instead of going to
3.10 we went to 4.0 but after changing the meaning of the major
number to not mean anything anymore with respect to bitcode backward
compatibility.

The current policy
(https://llvm.org/docs/DeveloperPolicy.html#ir-backwards-compatibility)
indicates only now:

  The current LLVM version supports loading any bitcode since version 3.0.

Differential Revision: https://reviews.llvm.org/D82514
2020-06-25 23:49:07 +00:00