Commit Graph

13 Commits

Author SHA1 Message Date
Fangrui Song f66b767abe [ELF][AArch64] Allow PT_LOAD to have overlapping p_offset ranges
Ported the D64906 technique to AArch64. It deletes 3 alignments at
PT_LOAD boundaries for the default case: the size of an aarch64 binary
decreases by at most 192kb.

If `sh_addralign(.tdata) < sh_addralign(.tbss)`,
we can potentially make `p_vaddr(PT_TLS)%p_align(PT_TLS) != 0`.

ld.so that are known to have problems if p_vaddr%p_align!=0:

* musl<=1.1.22
* FreeBSD 13.0-CURRENT (and before) rtld-elf arm64

New test aarch64-tls-vaddr-align.s checks that our workaround makes p_vaddr%p_align = 0.

Reviewed By: ruiu

Differential Revision: https://reviews.llvm.org/D64930

llvm-svn: 369344
2019-08-20 08:34:56 +00:00
Fangrui Song c2a5459d52 [ELF][AArch64] Improve some aarch64-*.s tests
* Delete aarch64-tls-static.s: it is covered by aarch64-tlsdesc.c
* Add --no-show-raw-insn to llvm-objdump -d tests
* When linking an executable with %t.so, the path %t.so will be recorded in the DT_NEEDED entry if %t.so doesn't have DT_SONAME. The DT_NEEDED has varying lengths on different systems.
  Add -soname to make tests more robust. This issue will become outstanding if we allow overlapping PT_LOAD (D64930).

llvm-svn: 366532
2019-07-19 06:33:36 +00:00
Fangrui Song bcc0bd7e2a [ELF][test] Reorganize some AArch64 tests
Delete aarch64-got.s because it is covered by aarch64-tls-iele.s
Merge got-aarch64.s into aarch64-fpic-got.s by adding disassembly to the latter
Create aarch64-gnu-ifunc-nonpreemptable to unify aarch64-gnu-ifunc3.s (position-dependent executable) and aarch64-gnu-ifunc-address-pie.s (PIE)
Rename aarch64-got-reloc.s to aarch64-got-weak-undef.s
Add --no-show-raw-insn to llvm-objdump -d RUN lines
Add -pie test to arch64-tls-iele.s
Delete aarch64-tls-pie.s: it is covered by arch64-tls-iele.s and aarch64-tls-le.s
Rename aarch64-copy2.s to aarch64-nopic-plt.s: "copy2" gives false impression that the test is related to copy relocation

llvm-svn: 362294
2019-06-01 11:01:26 +00:00
Fangrui Song ed2ad77ccb [ARM][AArch64] Revert Android Bionic PT_TLS overaligning hack
This reverts D53906.

D53906 increased p_align of PT_TLS on ARM/AArch64 to 32/64 to make the
static TLS layout compatible with Android Bionic's ELF TLS. However,
this may cause glibc ARM/AArch64 programs to crash (see PR41527).

The faulty PT_TLS in the executable satisfies p_vaddr%p_align != 0. The
remainder is normally 0 but may be non-zero with the hack in place. The
problem is that we increase PT_TLS's p_align after OutputSections'
addresses are fixed (assignAddress()). It is possible that
p_vaddr%old_p_align = 0 while p_vaddr%new_p_align != 0.

For a thread local variable defined in the executable, lld computed TLS
offset (local exec) is different from glibc computed TLS offset from
another module (initial exec/generic dynamic). Note: PR41527 said the
bug affects initial exec but actually generic dynamic is affected as
well.

(glibc is correct in that it compute offsets that satisfy
`offset%p_align == p_vaddr%p_align`, which is a basic ELF requirement.
This hack appears to work on FreeBSD rtld, musl<=1.1.22, and Bionic, but
that is just because they (and lld) incorrectly compute offsets that
satisfy `offset%p_align = 0` instead.)

Android developers are fine to revert this patch, carry this patch in
their tree before figuring out a long-term solution (e.g. a dummy .tdata
with sh_addralign=64 sh_size={0,1} in crtbegin*.o files. The overhead is
now insignificant after D62059).

Reviewed By: rprichard, srhines

Differential Revision: https://reviews.llvm.org/D62055

llvm-svn: 361090
2019-05-18 03:16:00 +00:00
Fangrui Song 5387c2cd17 [llvm-objdump] Print newlines before and after "Disassembly of section ...:"
This improves readability and the behavior is consistent with GNU objdump.

The new test test/tools/llvm-objdump/X86/disassemble-section-name.s
checks we print newlines before and after "Disassembly of section ...:"

Differential Revision: https://reviews.llvm.org/D61127

llvm-svn: 359668
2019-05-01 10:40:48 +00:00
Fangrui Song b159906a9a [test] Change llvm-readobj -long-option to --long-option or well-known short options. NFC
Also change some options that have different semantics (cause confusion) in llvm-readelf mode:

-s => -S
-t => --symbols
-sd => --section-data

llvm-svn: 359651
2019-05-01 05:49:01 +00:00
Ryan Prichard d7d2369c09 [ARM][AArch64] Increase TLS alignment to reserve space for Android's TCB
ARM and AArch64 use TLS variant 1, where the first two words after the
thread pointer are reserved for the TCB, followed by the executable's TLS
segment. Both the thread pointer and the TLS segment are aligned to at
least the TLS segment's alignment.

Android/Bionic historically has not supported ELF TLS, and it has
allocated memory after the thread pointer for several Bionic TLS slots
(currently 9 but soon only 8). At least one of these allocations
(TLS_SLOT_STACK_GUARD == 5) is widespread throughout Android/AArch64
binaries and can't be changed.

To reconcile this disagreement about TLS memory layout, set the minimum
alignment for executable TLS segments to 8 words on ARM/AArch64, which
reserves at least 8 words of memory after the TP (2 for the ABI-specified
TCB and 6 for alignment padding). For simplicity, and because lld doesn't
know when it's targeting Android, increase the alignment regardless of
operating system.

Differential Revision: https://reviews.llvm.org/D53906

llvm-svn: 350681
2019-01-09 00:09:59 +00:00
Dimitry Andric c9de3b4d26 Align AArch64 and i386 image base to superpage
Summary:

As for x86_64, the default image base for AArch64 and i386 should be
aligned to a superpage appropriate for the architecture.

On AArch64, this is 2 MiB, on i386 it is 4 MiB.

Reviewers: emaste, grimar, javed.absar, espindola, ruiu, peter.smith, srhines, rprichard

Reviewed By: ruiu, peter.smith

Subscribers: jfb, markj, arichardson, krytarowski, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D50297

llvm-svn: 342746
2018-09-21 16:58:13 +00:00
Fangrui Song eb75b8f8f7 [ELF] Move `# REQUIRES:` line to the top
llvm-svn: 335625
2018-06-26 16:58:19 +00:00
Eugene Leviant ee8dcfbdf7 [ELF] Set max page size to 64K for AArch64
Differential revision: https://reviews.llvm.org/D25079

llvm-svn: 283200
2016-10-04 08:58:55 +00:00
Rui Ueyama 109ff37430 Update for a recent format change.
llvm-svn: 269496
2016-05-13 21:58:46 +00:00
Rafael Espindola 1cdd7d5448 Run dos2unix. NFC.
llvm-svn: 263238
2016-03-11 14:34:44 +00:00
Adhemerval Zanella 74bcf03f87 [lld] [ELF/AArch64] Add support to some GD/LE/IS TLS relocations
This patch adds some TLS relocations and relaxations for AArch64.
Some Global-Dynamic relocation are handled by optimizing them to
Local-Exec (Initial-Exec is not yet supported). They are:

 - R_AARCH64_TLSDESC_ADR_PAGE21
 - R_AARCH64_TLSDESC_LD64_LO12_NC
 - R_AARCH64_TLSDESC_ADD_LO12_NC
 - R_AARCH64_TLSDESC_CALL

Also some Init-Exec is optimized to Local-Exec if possible. They are:

 - R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21
 - R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC

Finally some Local-Exec relocation are handled in relocateOne:

 - R_AARCH64_TLSLE_ADD_TPREL_HI12
 - R_AARCH64_TLSLE_ADD_TPREL_LO12_NC

This work is mainly for compiler bootstrap, where static binaries is
showing good progress (although shared object still lacking support
from both TLS aarch64 backend and some other issues).

llvm-svn: 260677
2016-02-12 13:43:03 +00:00