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4 Commits

Author SHA1 Message Date
Matt Arsenault 555e7ee04c AMDGPU/GlobalISel: Don't use XEXEC class for SGPRs 
We don't use the xexec register classes for arbitrary values
anymore. Avoids a test variance beween GlobalISel and SelectionDAG>
 2020-01-12 22:44:51 -05:00
Matt Arsenault f9a42ed0a7 AMDGPU: Relax 32-bit SGPR register class 
Mostly use SReg_32 instead of SReg_32_XM0 for arbitrary values. This
will allow the register coalescer to do a better job eliminating
copies to m0.

For GlobalISel, as a terrible hack, use SGPR_32 for things that should
use SCC until booleans are solved.

llvm-svn: 375267
 2019-10-18 18:26:37 +00:00
Matt Arsenault 8d372008b1 AMDGPU/GlobalISel: Fix tests without asserts 
The legality check is only done under NDEBUG, so the failure cases are
different in a release build.

llvm-svn: 366680
 2019-07-22 12:43:41 +00:00
Matt Arsenault 08494f6231 AMDGPU/GlobalISel: Selection for fminnum/fmaxnum 
v2f16 case doesn't work yet because the VOP3P complex patterns haven't
been ported yet.

llvm-svn: 366585
 2019-07-19 14:42:40 +00:00