Commit Graph

11677 Commits

Author SHA1 Message Date
Roman Lebedev c62746ac6e
[X86] Fix AMD Znver3 model checks
While `-march=` is correctly detected as `znver3` for the cpu,
apparently the model check is incorrect:
```
$ lscpu
Architecture:            x86_64
  CPU op-mode(s):        32-bit, 64-bit
  Address sizes:         48 bits physical, 48 bits virtual
  Byte Order:            Little Endian
CPU(s):                  32
  On-line CPU(s) list:   0-31
Vendor ID:               AuthenticAMD
  Model name:            AMD Ryzen 9 5950X 16-Core Processor
    CPU family:          25
    Model:               33
    Thread(s) per core:  2
    Core(s) per socket:  16
    Socket(s):           1
    Stepping:            0
    Frequency boost:     disabled
    CPU max MHz:         6017.8462
    CPU min MHz:         2200.0000
    BogoMIPS:            8050.07
    Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf rapl pni pclmulqdq monitor ssse
                         3 fma cx16 sse4_1 sse4_2 movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb cat_l3 cdp_l3 hw_p
                         state ssbd mba ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 erms invpcid cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local clzero irperf xsaveerptr rdpru wbn
                         oinvd arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif v_spec_ctrl umip pku ospke vaes vpclmulqdq rdpid overflow_recov succor smca fsrm
Virtualization features:
  Virtualization:        AMD-V
Caches (sum of all):
  L1d:                   512 KiB (16 instances)
  L1i:                   512 KiB (16 instances)
  L2:                    8 MiB (16 instances)
  L3:                    64 MiB (2 instances)
NUMA:
  NUMA node(s):          1
  NUMA node0 CPU(s):     0-31
Vulnerabilities:
  Itlb multihit:         Not affected
  L1tf:                  Not affected
  Mds:                   Not affected
  Meltdown:              Not affected
  Spec store bypass:     Mitigation; Speculative Store Bypass disabled via prctl
  Spectre v1:            Mitigation; usercopy/swapgs barriers and __user pointer sanitization
  Spectre v2:            Mitigation; Retpolines, IBPB conditional, IBRS_FW, STIBP always-on, RSB filling
  Srbds:                 Not affected
  Tsx async abort:       Not affected
```

Model is 33 (0x21), while the code was expecting it to be `0x00 .. 0x1F`.
https://github.com/torvalds/linux/blob/v5.17-rc8/drivers/hwmon/k10temp.c#L432-L453 agrees.
I'm not sure if other ranges listed here should also be accepted.

I noticed this while implementing CPU model detection
for halide (https://github.com/halide/Halide/pull/6648)

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D121708
2022-03-15 20:28:02 +03:00
Steven Wu e168513aed [ASAN] Fix darwin-interface test
Fix darwin interface test after D121464. asan_rtl_x86_64.S is not
available on Darwin.

Reviewed By: kstoimenov

Differential Revision: https://reviews.llvm.org/D121636
2022-03-15 06:14:07 -07:00
Andrew Browne dbf8c00b09 [DFSan] Remove trampolines to unblock opaque pointers. (Reland with fix)
https://github.com/llvm/llvm-project/issues/54172

Reviewed By: pcc

Differential Revision: https://reviews.llvm.org/D121250
2022-03-14 16:03:25 -07:00
Andrew Browne edc33fa569 Revert "[DFSan] Remove trampolines to unblock opaque pointers."
This reverts commit 84af90336f.
2022-03-14 13:47:41 -07:00
Andrew Browne 84af90336f [DFSan] Remove trampolines to unblock opaque pointers.
https://github.com/llvm/llvm-project/issues/54172

Reviewed By: pcc

Differential Revision: https://reviews.llvm.org/D121250
2022-03-14 13:39:49 -07:00
Fangrui Song a53ea51dec [lsan] ppc64: dynamically pick address range for allocator
For ppc64 PIE, it seems that [0xa00000000000,0xc00000000000) may be occupied
which will lead to a segfault in certain kernel configurations
(clang-ppc64le-rhel). Use the `!kUsingConstantSpaceBeg` code path like Fuchsia.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D121257
2022-03-11 20:16:17 -08:00
Khem Raj 5017de8ba4 [builtins] Do not force thumb mode directive in arm/sync-ops.h
.thumb_func was not switching mode until [1]
so it did not show up but now that .thumb_func (without argument) is
switching mode, its causing build failures on armv6 ( rpi0 ) even when
build is explicitly asking for this file to be built with -marm (ARM
mode), therefore use DEFINE_COMPILERRT_FUNCTION macro to add function
header which considers arch and mode from compiler cmdline to decide if
the function is built using thumb mode or arm mode.

[1] https://reviews.llvm.org/D101975

Note that it also needs https://reviews.llvm.org/D99282

Reviewed By: peter.smith, MaskRay

Differential Revision: https://reviews.llvm.org/D104183
2022-03-11 16:25:49 -08:00
Kirill Stoimenov d477f1bb15 [ASan] Export optimized callbacks.
This is a part of optimized callback reverts. This is needed to export the callbacks from the rt-asan libraries.

Reviewed By: kstoimenov

Differential Revision: https://reviews.llvm.org/D121464
2022-03-11 17:18:40 +00:00
Khem Raj a11d1cc41c [builtins] Use mcr for dmb instruction on armv6
At present compiler-rt cross compiles for armv6 ( -march=armv6 ) but includes
dmb instructions which are only available in armv7+ this causes SIGILL on
clang+compiler-rt compiled components on rpi0w platforms.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D99282
2022-03-10 19:30:00 -08:00
Kirill Stoimenov 120e0434bc [ASan] Added back @PLT to __asan_report_* calls to avoid compile errors.
Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D121409
2022-03-10 21:43:00 +00:00
Kirill Stoimenov 035441ff30 [ASan] Moved optimized callbacks out of asan_static to avoid DSO size increase.
Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D121405
2022-03-10 21:11:32 +00:00
Dmitry Vyukov 66298e1c54 tsan: fix another false positive related to open/close
The false positive fixed by commit f831d6fc80
("tsan: fix false positive during fd close") still happens episodically
on the added more stressful test which does just open/close.

I don't have a coherent explanation as to what exactly happens
but the fix fixes the false positive on this test as well.
The issue may be related to lost writes during asynchronous MADV_DONTNEED.
I've debugged similar unexplainable false positive related to freed and
reused memory and at the time the only possible explanation I found is that
an asynchronous MADV_DONTNEED may lead to lost writes. That's why commit
302ec7b9bc ("tsan: add memory_limit_mb flag") added StopTheWorld around
the memory flush, but unfortunately the commit does not capture these findings.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D121363
2022-03-10 17:02:51 +01:00
Vitaly Buka 43f208e94c [msan] Fix unittest for 9397bdc6
"1.1" is double which can't be represented precicely as a float.
2022-03-10 01:21:30 +00:00
Kevin Athey fc9e07873f Revert "[MSAN] add interceptor for timer_create, timer_settime, timer_gettime"
This reverts commit 0a4dec6cc2.

breaks buildbots
2022-03-09 14:57:05 -08:00
Colin Cross e75f1d3c07 [CompilerRT] Fix build of compiler-rt with musl
Use the correct types for OFF_T, __sanitizer_time_t and
__sanitizer_dirent and forward time_t related functions
 to fix using compiler-rt with 32-bit musl libc.

Also redirect the time_t functions that are affected by
https://musl.libc.org/time64.html to use their 64-bit
ABI names.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D119358
2022-03-09 13:41:30 -08:00
Kevin Athey 0a4dec6cc2 [MSAN] add interceptor for timer_create, timer_settime, timer_gettime
Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D120602
2022-03-09 11:21:16 -08:00
Petr Hosek b0e369501f Revert "[MSAN] add interceptor for timer_create, timer_settime, timer_gettime"
This reverts commit c2aab0d380 due to
a leak in timer.cpp that showed up on several bots.
2022-03-09 10:46:20 -08:00
Xi Ruoyao db7bca2863 [sanitizer][mips] Fix the condition to include sanitizer_atomic_clang_mips.h
The Glibc header [1] define _ABIO32 unconditionally on MIPS.  So we need
to compare _MIPS_SIM and _ABIO32 to know if we are actually building for
MIPS32.  Using sanitizer_atomic_clang_mips.h can cause test failures and
hangs on MIPS64.

[1]: https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/mips/sgidefs.h

Reviewed By: dvyukov, vitalybuka, MaskRay

Differential Revision: https://reviews.llvm.org/D121207
2022-03-09 10:20:05 -08:00
Kevin Athey c2aab0d380 [MSAN] add interceptor for timer_create, timer_settime, timer_gettime
Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D120602
2022-03-08 16:59:43 -08:00
Dmitry Vyukov f831d6fc80 tsan: fix false positive during fd close
FdClose is a subjet to the same atomicity problem as MemoryRangeFreed
(memory state is not "monotoic" wrt race detection).
So we need to lock the thread slot in FdClose the same way we do
in MemoryRangeFreed.
This fixes the modified stress.cpp test.

Reviewed By: vitalybuka, melver

Differential Revision: https://reviews.llvm.org/D121143
2022-03-08 10:40:56 +01:00
Petr Hosek 601022fd96 Revert "[CMake][compiler-rt] Make CRT separately buildable"
This reverts commit ed28461e27 since
it broke the VE bot.
2022-03-07 23:59:29 -08:00
Petr Hosek ed28461e27 [CMake][compiler-rt] Make CRT separately buildable
This is useful when building a complete toolchain to ensure that CRT
is built after builtins but before the rest of the compiler-rt.

Differential Revision: https://reviews.llvm.org/D120682
2022-03-07 23:05:20 -08:00
Kevin Athey 7fbc1f7ebe [MSAN] extend ioctl interceptor to support BLKSSZGET
Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D120693
2022-03-04 15:39:30 -08:00
Stella Laurenzo 38151a08c2 Reapply "[cmake] Prefix gtest and gtest_main with "llvm_"."
This reverts commit 7cdda6b8ce.

Differential Revision: https://reviews.llvm.org/D121020
2022-03-04 13:45:43 -08:00
Ellis Hoag 9c35303981 [InstrProf][NFC] Fix warning by removing typecast
This fixes a warning about comparing mismatched types. Since `mmap()` already returns a `void *` use that as the pointer type for comparison.

Reviewed By: kyulee, zequanwu

Differential Revision: https://reviews.llvm.org/D120945
2022-03-04 10:48:25 -08:00
Stella Laurenzo 7cdda6b8ce Revert "[cmake] Prefix gtest and gtest_main with "llvm_"."
lldb buildbot failure. will investigate and roll forward.

This reverts commit 9f37775472.
2022-03-02 11:13:46 -08:00
Stella Laurenzo 9f37775472 [cmake] Prefix gtest and gtest_main with "llvm_".
The upstream project ships CMake rules for building vanilla gtest/gmock which conflict with the names chosen by LLVM. Since LLVM's build rules here are quite specific to LLVM, prefixing them to avoid collision is the right thing (i.e. there does not appear to be a path to letting someone *replace* LLVM's googletest with one they bring, so co-existence should be the goal).

This allows LLVM to be included with testing enabled within projects that themselves have a dependency on an official gtest release.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D120789
2022-03-02 10:53:32 -08:00
Kai Luo eb3730cf89 [AIX][cmake][NFC] Customize name of output atomic library
Let `archive-aix-libatomic` accept additional argument to customize name of output atomic library.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D120534
2022-02-28 02:31:56 +00:00
Vitaly Buka f978497d67 [sanitizer] Don't collect unused info 2022-02-24 20:20:34 -08:00
Xiaodong Liu 56b5f00186 [sancov][sanitizer-common] Correct sanitizer coverage point
Sanitizer coverage point should be the previous instruction PC of the
caller and the offset to the previous instruction might be different
on each CPU architecture.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D119233
2022-02-24 17:16:45 +08:00
Vitaly Buka c990d56d42 [HWASan] Use hwasan_memalign for aligned new.
Aligned new does not require size to be a multiple of alignment, so
memalign is the correct choice instead of aligned_alloc.

Fixes false reports for unaligned sizes.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D119161
2022-02-23 14:22:03 -08:00
Vitaly Buka 5e1ae3aba2 [NFC][hwasan] Clang-format the file 2022-02-23 14:18:45 -08:00
Fangrui Song 632ea6929d [sanitizer][sancov] Use pc-1 for s390x
The stack trace addresses may be odd (normally addresses should be even), but
seems a good compromise when the instruction length (2,4,6) cannot be detected
easily.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D120432
2022-02-23 13:35:22 -08:00
Martin Liska 78f7a6fbe5 [PATCH] ASAN: Align declaration with definition of a fn
Fixes:
https://bugs.llvm.org/show_bug.cgi?id=51641

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D115447
2022-02-23 11:28:10 -08:00
Xu Mingjie f19f672328 [TSan][NFC] fixup for comment of Shadow
There should be 1-bit unused field between tid field and is_atomic field of Shadow.

Reviewed By: dvyukov, vitalybuka

Differential Revision: https://reviews.llvm.org/D119417
2022-02-23 11:24:24 -08:00
Vitaly Buka 475c43339b Revert "[TSan][NFC] fixup for comment of Shadow"
Wrong author.

This reverts commit 6bff092e3e.
2022-02-23 11:24:24 -08:00
Vitaly Buka 6bff092e3e [TSan][NFC] fixup for comment of Shadow
There should be 1-bit unused field between tid field and is_atomic field of Shadow.

Reviewed By: dvyukov, vitalybuka

Differential Revision: https://reviews.llvm.org/D119417
2022-02-23 11:16:25 -08:00
Fangrui Song fc0bd3c2ce [libFuzzer] Refactor GetNextInstructionPc/GetPreviousInstructionPc
Port the change to compiler-rt/lib/fuzzer/FuzzerTracePC.cpp .
Update RISCV to use PC-2: this is coarse (C extension may be disabled) but
sufficient for pure symbolization purpose.

The commit is separate from D120362 so that bisecting/reverting is easier.
2022-02-22 16:25:57 -08:00
Fangrui Song 3de5322b5f [sanitizer] Refactor GetNextInstructionPc/GetPreviousInstructionPc
x86 uses offset 1 while most RISC architectures use offset 4.
Check x86 first to prevent changes for new RISC architectures.

Reviewed By: #sanitizers, vitalybuka

Differential Revision: https://reviews.llvm.org/D120362
2022-02-22 16:20:40 -08:00
Rainer Orth cb8e9bea95 [sanitizer_common] Use GetStaticTlsBoundary on Solaris 11.4
This is a restricted alternative to D91605
<https://reviews.llvm.org/D91605> which only works on Solaris 11.4 SRU 10+,
but would break the build on Solaris 11.3 and Illumos which lack
`dlpi_tls_modid`.

Apart from that, the patch is trivial.  One caveat is that the
`sanitizer_common` and `asan` tests need to be linked explicitly with `ld
-z relax=transtls` on Solaris/amd64 since the archives with calls to
`__tls_get_addr` are linked in directly.

Tested on `amd64-pc-solaris2.11`, `sparcv9-sun-solaris2.11`, and
`x86_64-pc-linux-gnu`.

Differential Revision: https://reviews.llvm.org/D120048
2022-02-22 20:18:22 +01:00
Gulfem Savrun Yeniceri 4961bb477d [gwp_asan] Add missing <algorithm> include
After https://reviews.llvm.org/D119667, <algorithm> is no longer
transitively included from various headers. This patch adds the
<algorithm> include into gwp_asan.

Differential Revision: https://reviews.llvm.org/D120172
2022-02-19 01:14:14 +00:00
Gulfem Savrun Yeniceri 3d728ef0ba [scudo] Add missing <algorithm> include
After https://reviews.llvm.org/D119667, <algorithm> is no longer
transitively included from various headers. This patch adds the
<algorithm> include into scudo.

Differential Revision: https://reviews.llvm.org/D120171
2022-02-19 01:14:14 +00:00
Vitaly Buka c046cff1cf [msan] strsignal interceptor
Reviewed By: kstoimenov

Differential Revision: https://reviews.llvm.org/D120082
2022-02-17 18:13:35 -08:00
Mitch Phillips 62914bad46 [ASan] Fix TLS teardown.
TLS teardown is currently broken, as we unpoison the shadow a little bit
and to the right of the TLS section, rather than the full TLS section
itself. This currently breaks at -O0, and breaks with some upcoming
globals code that I have.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D120080
2022-02-17 13:34:36 -08:00
Eli Friedman 0389f2edf7 Revert "[compiler-rt] Implement ARM atomic operations for architectures without SMP support"
This reverts commit 910a642c0a.

There are serious correctness issues with the current approach: __sync_*
routines which are not actually atomic should not be enabled by default.

I'll continue discussion on the review.
2022-02-17 02:17:27 -08:00
Eli Friedman d20e01bb06 Revert "[NFC][compiler-rt] Format file lib/builtins/arm/sync-ops.h"
This reverts commit f165c23bf3.

Part of revert sequence for 910a642c0a.
2022-02-17 02:16:25 -08:00
Pavel Kosov f165c23bf3 [NFC][compiler-rt] Format file lib/builtins/arm/sync-ops.h 2022-02-17 10:21:22 +03:00
Pavel Kosov 910a642c0a [compiler-rt] Implement ARM atomic operations for architectures without SMP support
ARMv5 and older architectures don’t  support SMP and do not have atomic instructions. Still they’re in use in IoT world, where one has to stick to libgcc.

Reviewed By: mstorsjo

Differential Revision: https://reviews.llvm.org/D116088
2022-02-17 10:11:25 +03:00
Florian Mayer 014c0333b9 [NFC] Fix order in global_symbols.txt.
I added posix_madvise out of order before.
2022-02-16 13:34:02 -08:00
Florian Mayer d9d12bea82 Fix build_symbolizer.sh.
We now use posix_madvise, so we need to allow this symbol.

Differential Revision: https://reviews.llvm.org/D119970
2022-02-16 13:06:27 -08:00