3 Commits

Author	SHA1	Message	Date
Tony	1bc7bfffdb	[AMDGPU] Optimize waitcnt insertion for flat memory operations ... Change waitcnt insertion to check the memory operand tokens to see if flat memory operations access VMEM in the same way it does to check if accessing LDS. This avoids adding waitcnt for counters for address spaces that are not accessed. In addition, only generate the pessimistic waitcnt 0 if a flat memory operation appears to access both VMEM and LDS. This benefits flat memory operations that explicitly specify the address space as GLOBAL or LOCAL. Differential Revision: https://reviews.llvm.org/D89618	2020-10-20 22:55:12 +00:00
Petar Avramovic	9b4fa85434	GlobalISel/IRTranslator resetTargetOptions based on function attributes ... Update TargetMachine.Options with function attributes before we start to generate MIR instructions. This allows access to correct function attributes via TargetMachine.Options (it used to access attributes of the function that was translated first). This affects some existing tests with "no-nans-fp-math" attribute. Follow-up on D87456. Differential Revision: https://reviews.llvm.org/D87511	2020-09-15 10:26:09 +02:00
Petar Avramovic	0d58d9e8fb	AMDGPU/GlobalISel: Lower G_FREM ... Add custom lower for G_FREM. Differential Revision: https://reviews.llvm.org/D84324	2020-08-10 10:10:46 +02:00