Commit Graph

372237 Commits

Author SHA1 Message Date
Mirko Brkusanin 4cf6dd518e [AMDGPU][GlobalISel] Fix lowerShlSat
RegBankSelect would crash on G_SELECT when type is not s1.

Differential Revision: https://reviews.llvm.org/D91437
2020-11-16 17:43:31 +01:00
Matt Arsenault a6e353b1d0 AMDGPU: Split large offsets when selecting global saddr mode
When the offset doesn't fit in the immediate field, move some to
voffset.
2020-11-16 11:36:01 -05:00
Victor Huang 6bb2ceac90 Fix the compilation assertion due to unreachable BB pruning not deleting the associated BB from the jump tables
This patch is added to remove the unreachable MBBs reference in the jump table.

Differential Revisien: https://reviews.llvm.org/D90498
Reviewed by: amyk, bsaleil
2020-11-16 10:35:31 -06:00
Jay Foad a6ecb2eb3d [AMDGPU] Add comments. NFC. 2020-11-16 16:34:13 +00:00
Christian Sigg 04481f26fa [mlir] Require std.alloc() ops to have canonical layout during LLVM lowering.
The current code allows strided layouts, but the number of elements allocated is ambiguous. It could be either the number of elements in the shape (the current implementation), or the amount of elements required to not index out-of-bounds with the given maps (which would require evaluating the layout map).

If we require the canonical layouts, the two will be the same.

Reviewed By: nicolasvasilache, ftynse

Differential Revision: https://reviews.llvm.org/D91523
2020-11-16 17:29:36 +01:00
Andrzej Warzynski 6c02835d6c [flang][f18] Remove "-fdebug-resolve-names"
This option doesn't enable any unique feature/code-patch. Also, it is
neither tested nor documented.

Differential Revision: https://reviews.llvm.org/D91537
2020-11-16 15:49:55 +00:00
Kazushi (Jam) Marukawa 44a4f93925 [VE] Optimize leaf functions
Optimize leaf functions by not generating save/restore for callee saved
registers.  Update regression tests also.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D91539
2020-11-17 00:38:01 +09:00
David Truby 843525075b [MLIR][OpenMP] Add omp.wsloop operation
This adds a simple definition of a "workshare loop" operation for
the OpenMP MLIR dialect, excluding the "reduction" and "allocate"
clauses and without a custom parser and pretty printer.

The schedule clause also does not yet accept the modifiers that are
permitted in OpenMP 5.0.

Co-authored-by: Kiran Chandramohan <kiran.chandramohan@arm.com>

Reviewed By: ftynse, clementval

Differential Revision: https://reviews.llvm.org/D86071
2020-11-16 15:24:57 +00:00
Simon Moll a598c08ac8 [VE] fastcc and vreg-to-vreg copy
This defines a 'fastcc' for the VE target and implements vreg-to-vreg
copy for parameter passing.  The 'fastcc' extends the standard CC for
SX-Aurora with register passing of vector-typed parameters and return
values.

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D90842
2020-11-16 16:24:22 +01:00
Yonghong Song 4369223ea7 BPF: make __builtin_btf_type_id() return 64bit int
Linux kernel recently added support for kernel modules
  https://lore.kernel.org/bpf/20201110011932.3201430-5-andrii@kernel.org/

In such cases, a type id in the kernel needs to be presented
as (btf id for modules, btf type id for this module).
Change __builtin_btf_type_id() to return 64bit value
so libbpf can do the above encoding.

Differential Revision: https://reviews.llvm.org/D91489
2020-11-16 07:08:41 -08:00
Xiangling Liao 9e407afd9b [AIX][driver] Include crti[_64].o and -bcdtors also for C language link invocations by default
In order to support attribute((constructor)) and attribute((destructor)),
which is used by various LLVM non-C++ runtime components, AIX will include
crti[_64].o and -bcdtors for C language link invocations by default.

Differential Revision: https://reviews.llvm.org/D91361
2020-11-16 10:07:57 -05:00
Raphael Isemann a8350ce79d [lldb] Add support for using variables with C++ keywords names in non-C++ expressions
LLDB is currently always activating C++ when parsing expressions as LLDB itself
is using C++ features when creating the final AST that will be codegen'd
(specifically, references to variables, namespaces and using declarations are
used).

This is causing problems for users that have variables in non-C++ programs (e.g.
plain C or Objective-C) that have names which are keywords in C++. Expressions
referencing those variables fail to parse as LLDB's Clang parser thinks those
identifiers are C++ keywords and not identifiers that may belong to a
declaration.

We can't just disable C++ in the expression parser for those situations as
replacing the functionality of the injected C++ code isn't trivial. So this
patch is just disabling most keywords that are exclusive to C++ in LLDB's Clang
parser when we are in a non-C++ expression. There are a few keywords we can't
disable for now:

* `using` as that's currently used in some situations to inject variables into the expression function.
* `__null` as that's used by LLDB to define `NULL`/`Nil`/`nil`.

Getting rid of these last two keywords is possible but is a large enough change
that this will be handled in follow up patches.

Note that this only changes the keyword status of those tokens but this patch
does not remove any C++ functionality from the expression parser. The type
system still follows C++ rules and so does the rest of the expression parser.

There is another small change that gives the hardcoded macro definitions in LLDB
a higher precedence than the macros imported from the Objective-C modules. The
reason for this is that the Objective-C modules in LLDB are actually parsed in
Objective-C++ mode and they end up providing the C++ definitions of certain
system macros (like `NULL` being defined as `nullptr`). So we have to move the
LLDB definition forward and surround the definition from the module with an
`#ifdef` to make sure that we use the correct LLDB definition that doesn't
reference C++ keywords. Or to give an example, this is how the expression source
code changes:

Before:
```
 #define NULL (nullptr) // injected module definition
 #ifndef NULL
 #define NULL (__null) // hardcoded LLDB definition
 #endif
```

After:
```
 #ifndef NULL
 #define NULL (__null) // hardcoded LLDB definition
 #endif
 #ifndef NULL
 #define NULL (nullptr) // injected module definition
 #endif
```

Fixes rdar://10356912

Reviewed By: shafik

Differential Revision: https://reviews.llvm.org/D82770
2020-11-16 16:04:44 +01:00
LLVM GN Syncbot 07927ac675 [gn build] Port 8dbe44cb29 2020-11-16 14:58:16 +00:00
Florian Hahn 8dbe44cb29 Add pass to add !annotate metadata from @llvm.global.annotations.
This patch adds a new pass to add !annotation metadata for entries in
@llvm.global.anotations, which is generated  using
__attribute__((annotate("_name"))) on functions in Clang.

This has been discussed on llvm-dev as part of
    RFC: Combining Annotation Metadata and Remarks
    http://lists.llvm.org/pipermail/llvm-dev/2020-November/146393.html

Reviewed By: thegameg

Differential Revision: https://reviews.llvm.org/D91195
2020-11-16 14:57:11 +00:00
Hanhan Wang 47fd19f22e [mlir][StandardToSPIRV] Extend support for lowering cmpi to SPIRV.
The logic of vector on boolean was missed. This patch adds the logic and test on
it.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D91403
2020-11-16 06:51:05 -08:00
Francesco Petrogalli 02bdbdc760 [clang][SveEmitter] Fix enum declarations. [NFCI]
Adapt the declarations of `svpattern` and `svprfop` to the most recent
one defined in section "5. Enum declarations" of the SVE ACLE
specifications [1].

The signature of the intrinsics using these enums have been changed
accordingly.

A test has been added to make sure that `svpattern` and `svprfop` are
not typedefs.

[1] https://developer.arm.com/documentation/100987/latest, version
00bet6

Reviewed By: joechrisellis

Differential Revision: https://reviews.llvm.org/D91333
2020-11-16 14:49:45 +00:00
Kazushi (Jam) Marukawa 37e7a80aed [VE] Add lsv/lvs intrinsic instructions
Add lsv/lvs intrinsic instructions and a regression test.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D91526
2020-11-16 23:42:51 +09:00
Aaron Ballman f9e639efda Fix bots that are running with assertions enabled; NFC. 2020-11-16 09:23:10 -05:00
Aaron Ballman f7c881b89e Adding some explicit casts to appease build bots; NFC 2020-11-16 09:13:24 -05:00
Thorsten 7c6412e0cc Convert TypeSpecifierSign from Specifiers.h to a scoped enum; NFC 2020-11-16 09:08:08 -05:00
Thorsten a6ac2b32fb Convert TypeSpecifiersPipe from Specifiers.h to a scoped enum; NFC 2020-11-16 08:28:21 -05:00
Vassil Vassilev 54e655b3f8 Reland "Move the test compiler setup in a common place. NFCI"
Original commit message: "
Move the test compiler setup in a common place. NFCI

This patch reduces the copy paste in the unittest/CodeGen folder by moving the
common compiler setup phase in a header file.

Differential revision: https://reviews.llvm.org/D91061
"

This patch includes a fix for the memory leaks pointed out by @vitalybuka
2020-11-16 13:22:10 +00:00
Dmitry Preobrazhensky 65f3e121fe [AMDGPU][MC] Corrected error position for some operands and modifiers
Partially fixes bug 47518 (https://bugs.llvm.org/show_bug.cgi?id=47518)

Reviewers: rampitec

Differential Revision: https://reviews.llvm.org/D91412
2020-11-16 16:11:23 +03:00
Max Kazantsev 58f9ceaad6 [Test] More tests on range checks 2020-11-16 20:10:10 +07:00
Caroline Concatto 6c4d8f4651 [AArch64] Add check for widening instruction for SVE.
This patch fixes the function isWideningInstruction for scalable vectors.
Now the cost model can check the widening pattern for SVE.

Differential Revision: https://reviews.llvm.org/D91260
2020-11-16 12:30:08 +00:00
Matthew Malcomson 83ac18205e Hwasan reporting check for dladdr failing
In `GetGlobalSizeFromDescriptor` we use `dladdr` to get info on the the
current address.  `dladdr` returns 0 if it failed.
During testing on Linux this returned 0 to indicate failure, and
populated the `info` structure with a NULL pointer which was
dereferenced later.

This patch checks for `dladdr` returning 0, and in that case returns 0
from `GetGlobalSizeFromDescriptor` to indicate failure of identifying
the address.

This occurs when `GetModuleNameAndOffsetForPC` succeeds for some address
not in a dynamically loaded library.  One example is when the found
"module" is '[stack]' having come from parsing /proc/self/maps.

Differential Revision: https://reviews.llvm.org/D91344
2020-11-16 12:25:27 +00:00
Vitaly Buka 6c185acfff Revert "Move the test compiler setup in a common place. NFCI"
There is memory leaks

This reverts commit 23cc838099.
This reverts commit 888d06dfb8.
2020-11-16 04:21:28 -08:00
Vitaly Buka 2ec25bae5a [NFC][tsan] Simplify call_pthread_cancel_with_cleanup 2020-11-16 04:21:27 -08:00
Max Kazantsev b2fd9ff579 [Test] More tests on range check elimination 2020-11-16 19:18:25 +07:00
Michał Górny b9734c6b44 [lldb] [Process/FreeBSDRemote] Optimize regset pointer logic
Create a helper GetOffsetRegSetData() method to get pointer
to the regset data accounting for the necessary offset.  Establish
the offsets in the constructor and store them in the structure.  This
avoids having to add new Get*Offset() methods and combines some common
code.

Differential Revision: https://reviews.llvm.org/D91411
2020-11-16 13:03:02 +01:00
Michał Górny 68ca01eb50 [lldb] [Process/FreeBSDRemote] Modernize and simplify YMM logic
Eliminate the remaining swith-case code for register getters,
and migrate YMM registers to regset-oriented model.  Since these
registers are recombined from XMM and YMM_Hi128 XSAVE blocks, while LLDB
gdb-server protocol transmits YMM registers whole, the offset-based
model will not work here.  Nevertheless, some improvement was possible.

Replace generic 'XSaveRegSet' along with sub-sets for XSAVE components
with 'YMMRegSet' (and more regsets in the future as further components
are implemented).  Create a helper GetYMMSplitReg() method that obtains
pointers to the appropriate XMM and YMM_Hi128 blocks to reduce code
duplication.

Differential Revision: https://reviews.llvm.org/D91293
2020-11-16 13:03:01 +01:00
Michał Górny 6adb55877c [lldb] [Process/FreeBSDRemote] Access debug registers via offsets
Use offset-based method to access x86 debug registers.  This also
involves adding a test for the correctness of these offsets, and making
GetDR() method of NativeRegisterContextWatchpoint_x86 public to avoid
duplicate code.

Differential Revision: https://reviews.llvm.org/D91268
2020-11-16 13:03:01 +01:00
Michał Górny e520487bf4 [lldb] [Process/FreeBSDRemote] Access FPR via RegisterInfo offsets
Use offset-based method to access base x87 FPU registers, using offsets
relative to the position of 'struct FPR', as determined by the location
of first register in it (fctrl).  Change m_fpr to use a fixed-size array
matching FXSAVE size (512 bytes).  Add unit tests for verifying
RegisterInfo offsets and sizes against the FXSAVE layout.

Differential Revision: https://reviews.llvm.org/D91248
2020-11-16 13:03:01 +01:00
Dmitry Preobrazhensky 0bee8c784b [AMDGPU][MC] Corrected error position for swizzle()
Partially fixes bug 47518 (https://bugs.llvm.org/show_bug.cgi?id=47518)

Reviewers: rampitec

Differential Revision: https://reviews.llvm.org/D91408
2020-11-16 14:37:57 +03:00
Dmitry Preobrazhensky 89df8fc0d7 [AMDGPU][MC] Corrected error position for hwreg() and sendmsg()
Partially fixes bug 47518 (https://bugs.llvm.org/show_bug.cgi?id=47518)

Reviewers: rampitec

Differential Revision: https://reviews.llvm.org/D91407
2020-11-16 14:25:07 +03:00
Michał Górny 58abbf821c [lldb] [Process/FreeBSDRemote] Access GPR via reginfo offsets
Read and write registers from m_gpr using offsets from RegisterInfo
rather than explicit switch-case.  This eliminates a lot of redundant
code, and avoids mistakes such as type mismatches seen recently (wrt
segment registers).  The same logic will be extended to other register
sets in the future.

Make m_gpr an uint8_t std::array to ease accesses.  Ideally, we could
avoid including <machine/reg.h> entirely in the future and instead
get the correct GPR size from Utility/RegisterContextFreeBSD_* somehow.

While at it, modify register set logic to use an explicit enum with
llvm::Optional<>, making the code cleaner and at the same time enabling
compiler warnings for unhandled sets.

Since now we're fully relying on 'struct GPR' defined
in Utility/RegisterContextFreeBSD_* being entirely in sync with
the system structure, add unit tests to verify the field offsets
and sizes.

Differential Revision: https://reviews.llvm.org/D91216
2020-11-16 12:19:37 +01:00
Nicolas Vasilache 7625742237 [mlir][Linalg] Add support for tileAndDistribute on tensors.
scf.parallel is currently not a good fit for tiling on tensors.
Instead provide a path to parallelism directly through scf.for.
For now, this transformation ignores the distribution scheme and always does a block-cyclic mapping (where block is the tile size).

Differential revision: https://reviews.llvm.org/D90475
2020-11-16 11:12:50 +00:00
Kazushi (Jam) Marukawa e0c92c6c03 [VE] Add pfchv intrinsic instructions
Add pfchv intrinsic instructions and a regression test.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D91522
2020-11-16 20:10:44 +09:00
Vitaly Buka 7006738131 [sanitizer] Fix StackDepotPrint testing
Make test order agnostic as it can change with platform.
2020-11-16 03:07:29 -08:00
Benjamin Kramer 2e7455f00a [LoopFlatten] Fold variable into assert. NFC. 2020-11-16 11:51:39 +01:00
Florian Hahn ca2e7e5999 [IRGen] Add !annotation metadata for auto-init stores.
This patch updates Clang's IRGen to add !annotation nodes with an
"auto-init" annotation to all stores for auto-initialization.

As discussed in 'RFC: Combining Annotation Metadata and Remarks'
(http://lists.llvm.org/pipermail/llvm-dev/2020-November/146393.html)
this allows using optimization remarks to track down where auto-init
code was inserted (and not removed by optimizations).

There are a few cases in the tests where !annotation gets dropped by
optimizations. Those optimizations will be updated in subsequent
patches.

This patch is based on a patch by Francis Visoiu Mistrih.

Reviewed By: thegameg, paquette

Differential Revision: https://reviews.llvm.org/D91417
2020-11-16 10:37:02 +00:00
Sjoerd Meijer 9aa773381b [LoopFlatten] Widen the IV
Widen the IV to the widest available and legal integer type, which makes this
transformations always safe so that we can skip overflow checks.

Motivation is to let this pass trigger on 64-bit targets too, and this is the
last patch in a serie to achieve this: D90402 moves pass LoopFlatten to just
before IndVarSimplify so that IVs are not already widened, D90421 factors out
widening from IndVarSimplify into Utils/SimplifyIndVar so that we can also use
it in LoopFlatten.

Differential Revision: https://reviews.llvm.org/D90640
2020-11-16 10:20:13 +00:00
David Penry 48b43c9d4f [ARM] Cortex-M7 schedule
This patch adds the SchedMachineModel for Cortex-M7. It
also adds test cases for the scheduling information.

Details of the pipeline and descriptions are in comments
in file ARMScheduleM7.td included in this patch.

Differential Revision: https://reviews.llvm.org/D91355
2020-11-16 10:16:07 +00:00
Mikhail Goncharov 47c17bcd0e [lld] Use %t file in test
Otherwise it fails in some setups when creation of "out.wasm" is not possible.

Differential Revision: https://reviews.llvm.org/D91521
2020-11-16 10:49:38 +01:00
Joachim Protze fdc9dfc8e4 [OpenMP][Tool] Add Archer option to disable data race analysis for sequential part
This introduces the new `ARCHER_OPTIONS` flag `ignore_serial=0|1` to disable
analysis and logging of memory accesses in the sequential part of the OpenMP
application.

In the sequential part of an OpenMP program no data race is possible, unless
there is non-OpenMP concurrency (such as pthreads, MPI, ...). For the latter
reason, this is not active by default.

Besides reducing the runtime overhead for the sequential part of the program,
this reduces the memory overhead for sequential initialization. In combination
with `flush_shadow=1` this can allow analysis of applications, which run close
to the limit of available memory, but only access smaller parts of shared
memory during each OpenMP parallel region.

A problem for this approach is that Archer only gets active, when the OpenMP
runtime gets initialized, which might be after serial initialization of the
application. In such case, it helps to call for example `omp_get_max_threads()`
at the beginning of main.

Differential Revision: https://reviews.llvm.org/D90473
2020-11-16 10:45:21 +01:00
Fraser Cormack fe9dc2e54a [RISCV] Use a macro to simplify getTargetNodeName
Similar to the X86 and AMDGPU targets, this uses a macro to cut down on
repetitive and error-prone code when converting RISCVISD node names to
strings in getTargetNodeName.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D91414
2020-11-16 09:33:47 +00:00
Kazushi (Jam) Marukawa 15a2bacab6 [VE] Change variable capitalization
Change dl to DL in VEFrameLowering.cpp.  And clean some comments.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D91490
2020-11-16 18:25:23 +09:00
Simon Moll 0007d8ed2c [VP][NFC] Rename to HANDLE_VP_TO_OPC
Use the less surprising shorthand OPC instead of OC.
2020-11-16 10:24:18 +01:00
Jan Svoboda 2f3055c543 [clang][cli] Add support for options with two flags for controlling the same field.
This enables automatically parsing and generating CC1 arguments for options where two flags control the same field, e.g. -fexperimental-new-pass-manager and -fno-experimental new pass manager.

Reviewed By: Bigcheese, dexonsmith

Original patch by Daniel Grumberg.

Differential Revision: https://reviews.llvm.org/D83071
2020-11-16 10:21:54 +01:00
Lang Hames f62e5f4569 [MCJIT] Profile the code generated by MCJIT engine using Intel VTune profiler
Patch by Elena Kovanova. Thanks Elena!

Problem:

LLVM already has a feature to profile the JIT-compiled code with VTune. This is
done using Intel JIT Profiling API (https://github.com/intel/ittapi). Function
information is captured by VTune as soon as the function is JIT-compiled. We
tried to use the same approach to report the function information generated by
the MCJIT engine – read parsing the debug information for in-memory ELF module
and report it using JIT API. As the results, we figured out that it did not work
properly for the following cases: inline functions, the functions located in
multiple source files, the functions having several bodies (address ranges).

Solution:

To overcome limitations described above, we have introduced new APIs as a part
of Intel ITT APIs to report the entire in-memory ELF module to be further
processed as regular ELF binaries with debug information.

This patch

1. Switches LLVM to open source version of Intel ITT/JIT APIs
(https://github.com/intel/ittapi) to keep it always up to date.

2. Adds support of profiling the code generated by MCJIT engine using Intel
VTune profiler

Another separate patch will get rid of obsolete Intel ITT APIs stuff, having
LLVM already switched to https://github.com/intel/ittapi.

Differential Revision: https://reviews.llvm.org/D86435
2020-11-16 19:28:14 +11:00