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250 Commits

Author SHA1 Message Date
Nate Begeman 99fa5bc1fa Necessary changes to codegen cttz efficiently on PowerPC 
1. Teach LegalizeDAG how to better legalize CTTZ if the target doesn't have
   CTPOP, but does have CTLZ
2. Teach PPC32 how to do sub x, const -> add x, -const for valid consts
3. Teach PPC32 how to do and (xor a, -1) b -> andc b, a
4. Teach PPC32 that ISD::CTLZ -> PPC::CNTLZW

llvm-svn: 21880
 2005-05-11 23:43:56 +00:00
Chris Lattner 06bbeb646f Fix the last remaining bug preventing us from switching the X86 BE over 
from the simple isel to the pattern isel.  This forces inserted libcalls
to serialize against other function calls, which was breaking
UnitTests/2005-05-12-Int64ToFP.  Hopefully this will fix issues on other
targets as well.

llvm-svn: 21872
 2005-05-11 19:02:11 +00:00
Chris Lattner 724f7eec77 Do not memoize ADJCALLSTACKDOWN nodes, provide a method to hack on them. 
llvm-svn: 21871
 2005-05-11 18:57:39 +00:00
Chris Lattner 490769c5b6 wrap long line 
llvm-svn: 21870
 2005-05-11 18:57:06 +00:00
Chris Lattner 56add05671 Make sure to legalize generated ctpop nodes, convert tabs to spaces 
llvm-svn: 21868
 2005-05-11 18:35:21 +00:00
Duraid Madina a1ebbac9c0 expand count-leading/trailing-zeros; the test 2005-05-11-Popcount-ffs-fls.c 
should now pass (the "LLVM" and "REF" results should be identical)

llvm-svn: 21866
 2005-05-11 08:45:08 +00:00
Chris Lattner 7247324047 Add some notes for expanding clz/ctz 
llvm-svn: 21862
 2005-05-11 05:27:09 +00:00
Chris Lattner 05309bf58e Simplify this code, use the proper shift amount 
llvm-svn: 21861
 2005-05-11 05:21:31 +00:00
Chris Lattner 3740f39883 Legalize this correctly 
llvm-svn: 21859
 2005-05-11 05:09:47 +00:00
Chris Lattner 55e9cde37c implement expansion of ctpop nodes, implementing CodeGen/Generic/llvm-ct-intrinsics.ll 
llvm-svn: 21856
 2005-05-11 04:51:16 +00:00
Chris Lattner 93f4f5f467 Print bit count nodes correctly 
llvm-svn: 21855
 2005-05-11 04:50:30 +00:00
Jeff Cohen 915594d884 Silence some VC++ warnings 
llvm-svn: 21838
 2005-05-10 02:22:38 +00:00
Chris Lattner 2d8b55c476 The semantics of cast X to bool are a comparison against zero, not a truncation! 
llvm-svn: 21833
 2005-05-09 22:17:13 +00:00
Chris Lattner ba45e6c432 legalize readio/writeio into a load/store if requested 
llvm-svn: 21827
 2005-05-09 20:36:57 +00:00
Chris Lattner 5385db5523 legalize READPORT, WRITEPORT, READIO, WRITEIO, at least in the basic cases 
where they are directly supported by the architecture.  Wrap a bunch of
long lines :(

llvm-svn: 21826
 2005-05-09 20:23:03 +00:00
Chris Lattner 20eaeae966 Add support for matching the READPORT, WRITEPORT, READIO, WRITEIO intrinsics 
llvm-svn: 21825
 2005-05-09 20:22:36 +00:00
Chris Lattner 67ab94510d Add support for READPORT, WRITEPORT, READIO, WRITEIO 
llvm-svn: 21824
 2005-05-09 20:22:17 +00:00
Chris Lattner 1ab1691da9 Fold shifts into subsequent SHL's. These shifts often arise due to addrses 
arithmetic lowering.

llvm-svn: 21818
 2005-05-09 17:06:45 +00:00
Chris Lattner 57d294f2ac Don't use the load/store instruction as the source pointer, use the pointer 
being stored/loaded through!

llvm-svn: 21806
 2005-05-09 04:28:51 +00:00
Chris Lattner c14f354895 memoize all nodes, even null Value* nodes. Do not add two token chain outputs 
llvm-svn: 21805
 2005-05-09 04:14:13 +00:00
Chris Lattner f5675a0813 wrap long lines 
llvm-svn: 21804
 2005-05-09 04:08:33 +00:00
Chris Lattner 9440d6e260 Print SrcValue nodes correctly 
llvm-svn: 21803
 2005-05-09 04:08:27 +00:00
Chris Lattner 7876156ba0 When hitting an unsupported intrinsic, actually print it 
Lower debug info to noops.

llvm-svn: 21698
 2005-05-05 17:55:17 +00:00
Andrew Lenharth 2dbbb3ab84 ctpop lowering in legalize 
llvm-svn: 21697
 2005-05-05 15:55:21 +00:00
Andrew Lenharth dd426dd04d Make promoteOp work for CT* 
Proof?

ubyte %bar(ubyte %x) {
entry:
        %tmp.1 = call ubyte %llvm.ctlz( ubyte %x )
        ret ubyte %tmp.1
}

==>

zapnot $16,1,$0
CTLZ $0,$0
subq $0,56,$0
zapnot $0,1,$0
ret $31,($26),1

llvm-svn: 21691
 2005-05-04 19:11:05 +00:00
Andrew Lenharth 5e177826fd Implement count leading zeros (ctlz), count trailing zeros (cttz), and count 
population (ctpop).  Generic lowering is implemented, however only promotion
is implemented for SelectionDAG at the moment.

More coming soon.

llvm-svn: 21676
 2005-05-03 17:19:30 +00:00
Chris Lattner 8002640eab Codegen and legalize sin/cos/llvm.sqrt as FSIN/FCOS/FSQRT calls. This patch 
was contributed by Morten Ofstad, with some minor tweaks and bug fixes added
by me.

llvm-svn: 21636
 2005-04-30 04:43:14 +00:00
Chris Lattner 9d6fa98ec7 Legalize FSQRT, FSIN, FCOS nodes, patch contributed by Morten Ofstad 
llvm-svn: 21606
 2005-04-28 21:44:33 +00:00
Chris Lattner 2f82d2d58a Add FSQRT, FSIN, FCOS nodes, patch contributed by Morten Ofstad 
llvm-svn: 21605
 2005-04-28 21:44:03 +00:00
Andrew Lenharth 4a73c2cfdc Implement Value* tracking for loads and stores in the selection DAG. This enables one to use alias analysis in the backends. 
(TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*.  Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null.

llvm-svn: 21599
 2005-04-27 20:10:01 +00:00
Chris Lattner cfa7ddd6e2 Fold (X > -1) | (Y > -1) --> (X&Y > -1) 
llvm-svn: 21552
 2005-04-26 01:18:33 +00:00
Chris Lattner f806459d90 implement some more logical compares with constants, so that: 
int foo1(int x, int y) {
  int t1 = x >= 0;
  int t2 = y >= 0;
  return t1 & t2;
}
int foo2(int x, int y) {
  int t1 = x == -1;
  int t2 = y == -1;
  return t1 & t2;
}

produces:

_foo1:
        or r2, r4, r3
        srwi r2, r2, 31
        xori r3, r2, 1
        blr
_foo2:
        and r2, r4, r3
        addic r2, r2, 1
        li r2, 0
        addze r3, r2
        blr

instead of:

_foo1:
        srwi r2, r4, 31
        xori r2, r2, 1
        srwi r3, r3, 31
        xori r3, r3, 1
        and r3, r2, r3
        blr
_foo2:
        addic r2, r4, 1
        li r2, 0
        addze r2, r2
        addic r3, r3, 1
        li r3, 0
        addze r3, r3
        and r3, r2, r3
        blr

llvm-svn: 21547
 2005-04-25 21:20:28 +00:00
Chris Lattner d373ff64aa Codegen x < 0 | y < 0 as (x|y) < 0. This allows us to compile this to: 
_foo:
        or r2, r4, r3
        srwi r3, r2, 31
        blr

instead of:

_foo:
        srwi r2, r4, 31
        srwi r3, r3, 31
        or r3, r2, r3
        blr

llvm-svn: 21544
 2005-04-25 21:03:25 +00:00
Misha Brukman 774511633d Convert tabs to spaces 
llvm-svn: 21439
 2005-04-22 04:01:18 +00:00
Misha Brukman 835702a094 Remove trailing whitespace 
llvm-svn: 21420
 2005-04-21 22:36:52 +00:00
Chris Lattner f6302441f0 Improve and elimination. On PPC, for: 
bool %test(int %X) {
        %Y = and int %X, 8
        %Z = setne int %Y, 0
        ret bool %Z
}

we now generate this:

        rlwinm r2, r3, 0, 28, 28
        srwi r3, r2, 3

instead of this:

        rlwinm r2, r3, 0, 28, 28
        srwi r2, r2, 3
        rlwinm r3, r2, 0, 31, 31

I'll leave it to Nate to get it down to one instruction. :)

---------------------------------------------------------------------

llvm-svn: 21391
 2005-04-21 06:28:15 +00:00
Chris Lattner ab1ed77570 Fold (x & 8) != 0 and (x & 8) == 8 into (x & 8) >> 3. 
This turns this PPC code:

        rlwinm r2, r3, 0, 28, 28
        cmpwi cr7, r2, 8
        mfcr r2
        rlwinm r3, r2, 31, 31, 31

into this:

        rlwinm r2, r3, 0, 28, 28
        srwi r2, r2, 3
        rlwinm r3, r2, 0, 31, 31

Next up, nuking the extra and.

llvm-svn: 21390
 2005-04-21 06:12:41 +00:00
Chris Lattner b61ecb5875 Fold setcc of MVT::i1 operands into logical operations 
llvm-svn: 21319
 2005-04-18 04:48:12 +00:00
Chris Lattner 6d40fd01fe Another minor simplification: handle setcc (zero_extend x), c -> setcc(x, c') 
llvm-svn: 21318
 2005-04-18 04:30:45 +00:00
Chris Lattner 868d473009 Another simple xform 
llvm-svn: 21317
 2005-04-18 04:11:19 +00:00
Chris Lattner bd22d83d15 Fold: 
// (X != 0) | (Y != 0) -> (X|Y != 0)
        // (X == 0) & (Y == 0) -> (X|Y == 0)

Compiling this:

int %bar(int %a, int %b) {
        entry:
        %tmp.1 = setne int %a, 0
        %tmp.2 = setne int %b, 0
        %tmp.3 = or bool %tmp.1, %tmp.2
        %retval = cast bool %tmp.3 to int
        ret int %retval
        }

to this:

_bar:
        or r2, r3, r4
        addic r3, r2, -1
        subfe r3, r3, r2
        blr

instead of:

_bar:
        addic r2, r3, -1
        subfe r2, r2, r3
        addic r3, r4, -1
        subfe r3, r3, r4
        or r3, r2, r3
        blr

llvm-svn: 21316
 2005-04-18 03:59:53 +00:00
Chris Lattner d929f8bcd3 Make the AND elimination operation recursive and significantly more powerful, 
eliminating an and for Nate's testcase:

int %bar(int %a, int %b) {
        entry:
        %tmp.1 = setne int %a, 0
        %tmp.2 = setne int %b, 0
        %tmp.3 = or bool %tmp.1, %tmp.2
        %retval = cast bool %tmp.3 to int
        ret int %retval
        }

generating:

_bar:
        addic r2, r3, -1
        subfe r2, r2, r3
        addic r3, r4, -1
        subfe r3, r3, r4
        or r3, r2, r3
        blr

instead of:

_bar:
        addic r2, r3, -1
        subfe r2, r2, r3
        addic r3, r4, -1
        subfe r3, r3, r4
        or r2, r2, r3
        rlwinm r3, r2, 0, 31, 31
        blr

llvm-svn: 21315
 2005-04-18 03:48:41 +00:00
Nate Begeman 80c095f422 Add a couple missing transforms in getSetCC that were triggering assertions 
in the PPC Pattern ISel

llvm-svn: 21297
 2005-04-14 08:56:52 +00:00
Nate Begeman 4ddd81657b Disbale the broken fold of shift + sz[ext] for now 
Move the transform for select (a < 0) ? b : 0 into the dag from ppc isel
Enable the dag to fold and (setcc, 1) -> setcc for targets where setcc
  always produces zero or one.

llvm-svn: 21291
 2005-04-13 21:23:31 +00:00
Chris Lattner 56d177a344 fix an infinite loop 
llvm-svn: 21289
 2005-04-13 20:06:29 +00:00
Chris Lattner e3d17d8225 fix some serious miscompiles on ia64, alpha, and ppc 
llvm-svn: 21288
 2005-04-13 19:53:40 +00:00
Chris Lattner 8c3d409dc7 avoid work when possible, perhaps fix the problem nate and andrew are seeing 
with != 0 comparisons vanishing.

llvm-svn: 21287
 2005-04-13 19:41:05 +00:00
Chris Lattner e69ad5fd12 Implement expansion of unsigned i64 -> FP. 
Note that this probably only works for little endian targets, but is enough
to get siod working :)

llvm-svn: 21280
 2005-04-13 05:09:42 +00:00
Chris Lattner 0efd77eda7 Make expansion of uint->fp cast assert out instead of infinitely recurse. 
llvm-svn: 21275
 2005-04-13 03:42:14 +00:00
Chris Lattner b1f25ac188 add back the optimization that Nate added for shl X, (zext_inreg y) 
llvm-svn: 21273
 2005-04-13 02:58:13 +00:00