Commit Graph

121 Commits

Author SHA1 Message Date
Colin LeMahieu 9a3cd3f58c [Hexagon] Replacing the remaining postincrement stores with versions that have encoding bits.
llvm-svn: 224951
2014-12-29 20:00:43 +00:00
Colin LeMahieu 3d34afb32d [Hexagon] Renaming old multiclass for removal. Adding post-increment store classes and instruction defs.
llvm-svn: 224949
2014-12-29 19:42:14 +00:00
Colin LeMahieu 8233fb002d [Hexagon] Adding auto-incrementing loads with and without byte reversal.
llvm-svn: 224871
2014-12-26 21:09:25 +00:00
Colin LeMahieu 0a721cd4e1 [Hexagon] Adding locked loads.
llvm-svn: 224870
2014-12-26 20:42:27 +00:00
Colin LeMahieu ff370ed90e [Hexagon] Adding deallocframe and circular addressing loads.
llvm-svn: 224869
2014-12-26 20:30:58 +00:00
Colin LeMahieu c83cbbf6a1 [Hexagon] Adding remaining post-increment instruction variants. Removing unused classes.
llvm-svn: 224868
2014-12-26 19:31:46 +00:00
Colin LeMahieu fe9612e09d [Hexagon] Adding post-increment unsigned byte loads.
llvm-svn: 224867
2014-12-26 19:12:11 +00:00
Colin LeMahieu 96976a10a3 [Hexagon] Adding post-increment signed byte loads with tests.
llvm-svn: 224866
2014-12-26 18:57:13 +00:00
Colin LeMahieu 947cd70413 [Hexagon] Adding doubleword load.
llvm-svn: 224787
2014-12-23 20:44:59 +00:00
Colin LeMahieu 026e88d317 [Hexagon] Reapplying 224775 load words.
llvm-svn: 224786
2014-12-23 20:02:16 +00:00
Colin LeMahieu 20be15718b Reverting 224775 until mayLoad flag is addressed.
llvm-svn: 224783
2014-12-23 19:22:59 +00:00
Colin LeMahieu 122aeaafea [Hexagon] Adding word loads.
llvm-svn: 224775
2014-12-23 18:06:56 +00:00
Colin LeMahieu 8e39cad934 [Hexagon] Adding signed halfword loads.
llvm-svn: 224774
2014-12-23 17:25:57 +00:00
Colin LeMahieu 4b1eac4dda [Hexagon] Adding memb instruction. Fixing whitespace in test from 224730.
llvm-svn: 224735
2014-12-22 21:40:43 +00:00
Colin LeMahieu af1e5de141 [Hexagon] Adding classes and load unsigned byte instruction, updating usages.
llvm-svn: 224730
2014-12-22 21:20:03 +00:00
Colin LeMahieu 0f850bde0e [Hexagon] Removing old variants of instructions and updating references.
llvm-svn: 224612
2014-12-19 20:29:29 +00:00
Colin LeMahieu 38ce8cd2e2 [Hexagon] Adding bit extraction and table indexing instructions.
llvm-svn: 224610
2014-12-19 20:01:08 +00:00
Colin LeMahieu 3c7f664d5a [Hexagon] Adding bit insertion instructions.
llvm-svn: 224609
2014-12-19 19:54:38 +00:00
Colin LeMahieu d63ef93b4b [Hexagon] Adding more xtype shift instructions.
llvm-svn: 224608
2014-12-19 19:51:35 +00:00
Colin LeMahieu cc09d1ccc5 [Hexagon] Adding xtype shift instructions.
llvm-svn: 224604
2014-12-19 19:34:50 +00:00
Colin LeMahieu f3db884efb [Hexagon] Adding transfers to and from control registers.
llvm-svn: 224599
2014-12-19 19:06:32 +00:00
Colin LeMahieu 5ccbb1298b [Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.
llvm-svn: 224556
2014-12-19 00:06:53 +00:00
Colin LeMahieu 174476ed96 Reverting 224550, was not ready for commit.
llvm-svn: 224552
2014-12-18 23:36:15 +00:00
Colin LeMahieu 9000481cda [Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.
llvm-svn: 224550
2014-12-18 23:27:51 +00:00
Colin LeMahieu aa1bade7b4 [Hexagon] Updating doubleword shift usages to new versions.
llvm-svn: 224391
2014-12-16 23:36:15 +00:00
Colin LeMahieu f5acc8c625 [Hexagon] Adding tstbit/bitclr/bitset instructions.
llvm-svn: 224374
2014-12-16 21:28:58 +00:00
Colin LeMahieu 615757f2f1 [Hexagon] Adding bit count and twiddling instructions.
llvm-svn: 224367
2014-12-16 20:57:56 +00:00
Colin LeMahieu 6fce46baf6 [Hexagon] Adding asr/lsr/asl reg/imm, asl with saturation, asr with rounding. Doubleword abs/neg/not. Interleave and deinterleave instructions.
llvm-svn: 224365
2014-12-16 20:40:23 +00:00
Colin LeMahieu 1944a8cd04 [Hexagon] Adding absolute value, and negate with saturation
llvm-svn: 224346
2014-12-16 17:44:49 +00:00
Colin LeMahieu 455f24aa77 [Hexagon] Adding saturate and swizzle instructions.
llvm-svn: 224343
2014-12-16 16:27:17 +00:00
Colin LeMahieu d9a00a9c38 [Hexagon] Adding doubleword multiplies with and without accumulation.
llvm-svn: 224293
2014-12-16 00:07:24 +00:00
Colin LeMahieu 18c927620a [Hexagon] Adding halfword to doubleword multiplies.
llvm-svn: 224289
2014-12-15 23:29:37 +00:00
Colin LeMahieu 64ffd52943 [Hexagon] Adding logical-logical accumulation instructions and tests.
llvm-svn: 224288
2014-12-15 23:19:07 +00:00
Colin LeMahieu 71e11a1d0d [Hexagon] Adding a number of additional multiply forms with tests.
llvm-svn: 224282
2014-12-15 22:10:37 +00:00
Colin LeMahieu 4a46429305 [Hexagon] Adding misc multiply encodings and tests.
llvm-svn: 224273
2014-12-15 21:17:03 +00:00
Colin LeMahieu 26f884aedf [Hexagon] Adding doubleworld accumulating multiplies of halfwords.
llvm-svn: 224267
2014-12-15 20:17:46 +00:00
Colin LeMahieu 572c53e258 [Hexagon] Adding accumulating half word multiplies.
llvm-svn: 224266
2014-12-15 20:10:28 +00:00
Colin LeMahieu d1704cdc07 [Hexagon] Adding multiply with rnd/sat/rndsat
llvm-svn: 224265
2014-12-15 20:01:59 +00:00
Colin LeMahieu fe4012a969 [Hexagon] Adding encoding bits for halfword multiplies.
llvm-svn: 224261
2014-12-15 19:22:07 +00:00
Colin LeMahieu 90482a77b1 [Hexagon] Adding double word add/min/minu/max/maxu instructions and tests.
llvm-svn: 224153
2014-12-12 21:29:25 +00:00
Colin LeMahieu 984ef17d66 [Hexagon] Adding J class call instructions.
llvm-svn: 224150
2014-12-12 21:12:27 +00:00
Colin LeMahieu eb52f69f59 [Hexagon] Adding encoding information for sign extend word instruction.
llvm-svn: 224026
2014-12-11 16:43:06 +00:00
Colin LeMahieu 220adb6370 [Hexagon] Adding combine ri/ir instructions.
llvm-svn: 223971
2014-12-10 22:23:07 +00:00
Colin LeMahieu db0b13cef0 [Hexagon] Adding encodings for JR class instructions. Updating complier usages.
llvm-svn: 223967
2014-12-10 21:24:10 +00:00
Colin LeMahieu 8872d20788 [Hexagon] Adding JR class predicated call reg instructions.
llvm-svn: 223933
2014-12-10 18:24:16 +00:00
Colin LeMahieu b030c254c0 [Hexagon] Fixing broken tests.
llvm-svn: 223823
2014-12-09 20:36:53 +00:00
Colin LeMahieu 4af437fee5 [Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.
llvm-svn: 223821
2014-12-09 20:23:30 +00:00
Colin LeMahieu b580d7d8c8 [Hexagon] Adding word combine dot-new form and replacing old combine opcode.
llvm-svn: 223815
2014-12-09 19:23:45 +00:00
Colin LeMahieu 30dcb232b0 [Hexagon] Updating predicate register transfers and adding tstbit to allow select selection. Updating ll tests with predicate transfers that previously had nop encodings.
llvm-svn: 223800
2014-12-09 18:16:49 +00:00
Colin LeMahieu f5b4d655d2 [Hexagon] Adding any8, all8, and/or/xor/andn/orn/not predicate register forms, mask, and vitpack instructions and patterns.
llvm-svn: 223710
2014-12-08 23:07:59 +00:00
Colin LeMahieu df96b071f1 [Hexagon] Fixing broken test.
llvm-svn: 223704
2014-12-08 22:29:06 +00:00
Colin LeMahieu b6c4dd96f9 [Hexagon] Adding xtype doubleword add, sub, and, or, xor and patterns.
llvm-svn: 223702
2014-12-08 22:19:14 +00:00
Colin LeMahieu 9bfe5473da [Hexagon] Adding xtype doubleword comparisons. Removing unused multiclass.
llvm-svn: 223701
2014-12-08 21:56:47 +00:00
Colin LeMahieu 025f860638 [Hexagon] Adding xtype parity, min, minu, max, maxu instructions.
llvm-svn: 223693
2014-12-08 21:19:18 +00:00
Colin LeMahieu 8d1376c60e [Hexagon] Adding xtype halfword add/sub ll/hl/lh/hh/sat/<<16 instructions.
llvm-svn: 223692
2014-12-08 20:33:01 +00:00
Colin LeMahieu cc46cd8eec [Hexagon] Adding add/sub with saturation. Removing unused def. Cleaning up shift patterns.
llvm-svn: 223680
2014-12-08 18:33:49 +00:00
Colin LeMahieu b56e6cd9b9 [Hexagon] Adding combine reg, reg with predicated forms.
llvm-svn: 223667
2014-12-08 17:33:06 +00:00
Colin LeMahieu a55070dbdd [Hexagon] Adding packhl instruction.
llvm-svn: 223664
2014-12-08 17:01:18 +00:00
Colin LeMahieu 2c77a35e6e [Hexagon] Adding sub/and/or reg, imm forms
llvm-svn: 223522
2014-12-05 21:38:29 +00:00
Colin LeMahieu 9665f98c10 [Hexagon] Updating mux_ir/ri/ii/rr with encoding bits
llvm-svn: 223515
2014-12-05 21:09:27 +00:00
Colin LeMahieu 19985e9a8d [Hexagon] Adding tfrih/l instructions.
llvm-svn: 223506
2014-12-05 20:07:19 +00:00
Colin LeMahieu a4ab58101a [Hexagon] Adding add reg, imm form with encoding bits and test.
llvm-svn: 223504
2014-12-05 19:51:23 +00:00
Colin LeMahieu 383c36e3a8 [Hexagon] Adding DoubleRegs decoder. Moving C2_mux and A2_nop. Adding combine imm-imm form.
llvm-svn: 223494
2014-12-05 18:24:06 +00:00
Colin LeMahieu 7f0a430c7d [Hexagon] Adding combine reg-reg forms.
llvm-svn: 223485
2014-12-05 17:38:36 +00:00
Colin LeMahieu 01785bb063 [Hexagon] Marking several instructions as isCodeGenOnly=0 and adding direct disassembly tests for many instructions.
llvm-svn: 223482
2014-12-05 17:27:39 +00:00
Colin LeMahieu 2c08dc33db [Hexagon] Adding lit exception if Hexagon isn't built.
llvm-svn: 223335
2014-12-04 04:28:38 +00:00
Colin LeMahieu 5d6f03bd5a [Hexagon] Marking some instructions as CodeGenOnly=0 and adding disassembly tests.
llvm-svn: 223334
2014-12-04 03:41:21 +00:00
Colin LeMahieu 5241881bbc [Hexagon] Reverting 220584 to address ASAN errors.
llvm-svn: 221210
2014-11-04 00:14:36 +00:00
Colin LeMahieu 838307b31f [Hexagon] Resubmission of 220427
Modified library structure to deal with circular dependency between HexagonInstPrinter and HexagonMCInst.
Adding encoding bits for add opcode.
Adding llvm-mc tests.
Removing unit tests.

http://reviews.llvm.org/D5624

llvm-svn: 220584
2014-10-24 19:00:32 +00:00
NAKAMURA Takumi 504bbf91cd Revert r220427, "[Hexagon] Adding encoding bits for add opcode."
It brought cyclic dependecy between HexagonAsmPrinter and HexagonDesc.

llvm-svn: 220478
2014-10-23 11:31:22 +00:00
Colin LeMahieu 73a51a1a68 [Hexagon] Adding encoding bits for add opcode.
Adding llvm-mc tests.
Removing unit tests.

http://reviews.llvm.org/D5624

llvm-svn: 220427
2014-10-22 20:58:35 +00:00