6c609d626f
Remove dead code. These ARM instruction definitions don't exist.
...
llvm-svn: 127488
2011-03-11 20:38:18 +00:00
c77dea7f55
ARM VDUPLNfq and VDUPLNfd definitions can just be Pat<>s for VDUPLN32q
...
and VDUPLN32d, respectively.
llvm-svn: 127486
2011-03-11 20:31:17 +00:00
24fe5e36ea
ARM VREV64df and VREV64qf can just be patterns. The instruction is the same
...
as for VREV64d32 and VREV64q32, respectively.
llvm-svn: 127485
2011-03-11 20:18:05 +00:00
0b5119315b
This FIXME has been fixed.
...
llvm-svn: 127483
2011-03-11 20:07:37 +00:00
fa56bca781
Properly pseudo-ize ARM MVNCCi.
...
llvm-svn: 127482
2011-03-11 19:55:55 +00:00
730e1c2c9e
Add missing 'return on failure'. Previously we'd crash after emitting
...
the diagnostic.
llvm-svn: 127480
2011-03-11 19:52:52 +00:00
f3f78583f9
Remove optimization emitting a reference insted of label difference, since it can create more relocations. Removed isBaseAddressKnownZero method, because it is no longer used.
...
llvm-svn: 127478
2011-03-11 19:37:02 +00:00
94ccb27b43
Revert r127459, "Optimize trivial branches in CodeGenPrepare, which often get
...
created from the", it broke some GCC test suite tests.
llvm-svn: 127477
2011-03-11 19:30:30 +00:00
0122841626
Force re-linking of LLVMgold.so when its exports file changes.
...
llvm-svn: 127473
2011-03-11 18:27:13 +00:00
87e4a4da0d
Fix processing of gold.exports.
...
llvm-svn: 127471
2011-03-11 18:07:46 +00:00
982efb5c89
While printing annotations, print line number and variable name if debug info is present.
...
llvm-svn: 127470
2011-03-11 18:07:33 +00:00
f541bfd7d4
Fix MOVCCi32imm to be have ARM-mode Requires and a proper size (8 bytes, was 4).
...
llvm-svn: 127469
2011-03-11 18:00:42 +00:00
710d5da306
Replace -dag-chain-limit flag with constant. It has survived a release cycle without being touched, so no longer needs to pollute the hidden-help text.
...
llvm-svn: 127468
2011-03-11 17:46:59 +00:00
64d05bc281
Add LTO and gold plugin to the CMake build. Linux-only, support for
...
other systems pending.
PR9456.
llvm-svn: 127466
2011-03-11 15:44:24 +00:00
391a946fa9
ComputeMaskedBits: sub falls through to add, and sub doesn't have the same overflow semantics as add.
...
Should fix the selfhost failures that started with r127463.
llvm-svn: 127465
2011-03-11 14:46:49 +00:00
51897bcd3e
InstCombine: Fix a thinko where transform an icmp under the assumption that it's a zero comparison when it's not.
...
Fixes PR9454.
llvm-svn: 127464
2011-03-11 11:37:40 +00:00
cc79973856
Teach ComputeMaskedBits about nsw on add. I don't think there's anything we can
...
do with nuw here, but sub and mul should be given similar treatment.
Fixes PR9343 #15 !
llvm-svn: 127463
2011-03-11 09:00:19 +00:00
8559f5914c
Fix use of CompEnd predicate to be standards conforming
...
The existing CompEnd predicate does not define a strict weak order as required
by the C++03 standard; therefore, its use as a predicate to std::upper_bound
is invalid. For a discussion of this issue, see
http://www.open-std.org/jtc1/sc22/wg21/docs/lwg-defects.html#270
This patch replaces the asymmetrical comparison with an iterator adaptor that
achieves the same effect while being strictly standard-conforming by ensuring
an apples-to-apples comparison.
llvm-svn: 127462
2011-03-11 08:54:34 +00:00
cc27b3acc4
Optimize trivial branches in CodeGenPrepare, which often get created from the
...
lowering of objectsize intrinsics. Unfortunately, a number of tests were relying
on llc not optimizing trivial branches, so I had to add an option to allow them
to continue to test what they originally tested.
This fixes <rdar://problem/8785296> and <rdar://problem/9112893>.
llvm-svn: 127459
2011-03-11 04:54:27 +00:00
f17b0031f3
Teach TableGen to pre-calculate register enum values when creating the
...
CodeGenRegister entries. Use this information to more intelligently build
the literal register entires in the DAGISel matcher table. Specifically,
use a single-byte OPC_EmitRegister entry for registers with a value of
less than 256 and OPC_EmitRegister2 entry for registers with a larger value.
rdar://9066491
llvm-svn: 127456
2011-03-11 02:19:02 +00:00
05a23b1e61
silence a conditional assignment -Wuninitialized warning.
...
llvm-svn: 127453
2011-03-11 02:12:51 +00:00
eb52c23646
Make the register enum value part of the CodeGenRegister struct.
...
llvm-svn: 127448
2011-03-11 01:33:54 +00:00
f910bf29a9
Trailing whitespace.
...
llvm-svn: 127447
2011-03-11 01:27:24 +00:00
b1ac770fa3
Trailing whitespace.
...
llvm-svn: 127446
2011-03-11 01:19:05 +00:00
d0fc231e13
Tidy up since ARM MOVCCi and MOVCCi16 are now pseudos.
...
llvm-svn: 127445
2011-03-11 01:16:49 +00:00
d025498271
Properly pseudo-ize ARM MOVCCi and MOVCCi16.
...
llvm-svn: 127442
2011-03-11 01:09:28 +00:00
cf56a5034f
Change the x86 32-bit scheduler to register pressure and fix up the
...
corresponding testcases back to the previous versions.
Fixes some performance regressions only seen on 32-bit.
llvm-svn: 127441
2011-03-11 01:05:58 +00:00
adb9c03e41
Avoid replacing the value of a directly stored load with the stored value if the load is indexed. rdar://9117613.
...
llvm-svn: 127440
2011-03-11 00:48:56 +00:00
62a7b473af
Properly pseudo-ize MOVCCr and MOVCCs.
...
llvm-svn: 127434
2011-03-10 23:56:09 +00:00
affbc66f60
RecursivelyDeleteTriviallyDeadInstructions only needs a
...
Value, not an Instruction, so casting is not necessary. Also,
it's theoretically possible that the Value is not an
Instruction, since WeakVH follows RAUWs.
llvm-svn: 127427
2011-03-10 20:57:44 +00:00
cbe6a1ae86
Don't compute the file size if we don't need to.
...
llvm-svn: 127426
2011-03-10 20:54:07 +00:00
154ed49784
Fix reassociate to postpone certain instruction deletions until
...
after it has finished all of its reassociations, because its
habit of unlinking operands and holding them in a datastructure
while working means that it's not easy to determine when an
instruction is really dead until after all its regular work is
done. rdar://9096268.
llvm-svn: 127424
2011-03-10 19:51:54 +00:00
e5ccac85d3
DMB can just be a pat referencing MCR.
...
llvm-svn: 127423
2011-03-10 19:27:17 +00:00
b75c0db9d2
Reorganize a bit. No functional change, just moving patterns up.
...
llvm-svn: 127422
2011-03-10 19:21:08 +00:00
e175682781
Pseudo-instructions are codegenonly by definition.
...
llvm-svn: 127420
2011-03-10 19:06:39 +00:00
a186cadcaa
Memory barrier instructions don't need special handling in tblgen anymore.
...
llvm-svn: 127419
2011-03-10 19:05:48 +00:00
b49b964b98
InstCombine: Turn umul_with_overflow into mul nuw if we can prove that it cannot overflow.
...
This happens a lot in clang-compiled C++ code because it adds overflow checks to operator new[]:
unsigned *foo(unsigned n) { return new unsigned[n]; }
We can optimize away the overflow check on 64 bit targets because (uint64_t)n*4 cannot overflow.
llvm-svn: 127418
2011-03-10 18:40:14 +00:00
258a605fce
Add r127409 back now that the windows file was updated.
...
llvm-svn: 127417
2011-03-10 18:33:29 +00:00
510b00c67c
Try to fix the windows build.
...
llvm-svn: 127416
2011-03-10 18:30:48 +00:00
e413d9d341
Revert r127409 which broke all the Windows bots.
...
llvm-svn: 127413
2011-03-10 18:01:43 +00:00
72ff7e4fa9
PTX: Add preliminary support for floating-point divide and multiply-and-add
...
llvm-svn: 127410
2011-03-10 16:57:18 +00:00
ea5a137e55
Add support for MemoryBuffers that are not null terminated and add
...
support for creating buffers that cover only a part of a file.
llvm-svn: 127409
2011-03-10 16:10:30 +00:00
0d364306be
rip out llvm 2.8 release notes to make room for llvm 2.9 notes.
...
llvm-svn: 127399
2011-03-10 07:43:44 +00:00
7930407339
Add an option to disable critical edge splitting in PHIElimination.
...
llvm-svn: 127398
2011-03-10 05:59:17 +00:00
6e9fb0d056
ptx: add the rest of special registers of ISA version 2.0
...
llvm-svn: 127397
2011-03-10 04:05:57 +00:00
4d6eafa138
Change the Spiller interface to take a LiveRangeEdit reference.
...
This makes it possible to register delegates and get callbacks when the spiller
edits live ranges.
llvm-svn: 127389
2011-03-10 01:51:42 +00:00
c6cc485051
Make SpillIs an optional pointer. Avoid creating a bunch of temporary SmallVectors.
...
llvm-svn: 127388
2011-03-10 01:21:58 +00:00
241bdc0de7
Unbreak the CMake build.
...
llvm-svn: 127383
2011-03-10 00:51:01 +00:00
d17ae4e939
Revert 127359; it broke lencod.
...
llvm-svn: 127382
2011-03-10 00:25:53 +00:00
fa31d38aad
Introduce DebugInfoProbe. This is used to monitor how llvm optimizer is treating debugging information.
...
It generates output that lools like
8 times line number info lost by Scalar Replacement of Aggregates (SSAUp)
1 times line number info lost by Simplify well-known library calls
12 times variable info lost by Jump Threading
llvm-svn: 127381
2011-03-10 00:21:25 +00:00
b4c6a34415
Re-commit 127368 and 127371. They are exonerated.
...
llvm-svn: 127380
2011-03-10 00:16:32 +00:00
d4b3f8e009
Revert 127368 and 127371 for now.
...
llvm-svn: 127376
2011-03-09 23:53:17 +00:00
a319876559
Restore the default implementation of getCrossCopyRegClass: no need for cross-regclass copies.
...
llvm-svn: 127371
2011-03-09 23:15:40 +00:00
66559ba79a
Revert "Re-enable test and hope to silence the buildbots", still broken.
...
llvm-svn: 127369
2011-03-09 22:48:46 +00:00
ca9a936332
Change the definition of TargetRegisterInfo::getCrossCopyRegClass to be more
...
flexible.
If it returns a register class that's different from the input, then that's the
register class used for cross-register class copies.
If it returns a register class that's the same as the input, then no cross-
register class copies are needed (normal copies would do).
If it returns null, then it's not at all possible to copy registers of the
specified register class.
llvm-svn: 127368
2011-03-09 22:47:38 +00:00
1885d21700
Fix mistyped CHECK lines.
...
llvm-svn: 127366
2011-03-09 22:07:31 +00:00
801c9afd94
Fix a pasto that broke all x86_64-elf targets.
...
llvm-svn: 127365
2011-03-09 22:07:13 +00:00
3d8584f60e
Tweak test to work on Linux.
...
llvm-svn: 127364
2011-03-09 21:35:10 +00:00
9ba3013ed9
Disable this test temporarily to reduce BuildBot complaints.
...
llvm-svn: 127363
2011-03-09 21:33:47 +00:00
13f8c7d48e
Preserve line number information while simplifying libcalls.
...
llvm-svn: 127362
2011-03-09 21:27:52 +00:00
9955e2f912
X86 byval copies no longer always_inline. <rdar://problem/8706628>
...
llvm-svn: 127359
2011-03-09 21:10:30 +00:00
6492ef1237
Add a testcase for the addc improvements introduced some commits ago. Patch by Akira Hatanaka
...
llvm-svn: 127358
2011-03-09 21:05:32 +00:00
961908982f
Re-enable test and hope to silence the buildbots
...
llvm-svn: 127357
2011-03-09 21:00:16 +00:00
bd2f81c87b
try to make o32 cc tests less specific to silence some buildbots. The test isn't enabled yet, this is will be done in a subsequent commit. Patch by Akira Hatanaka.
...
llvm-svn: 127356
2011-03-09 20:59:05 +00:00
9363d41f14
LLVM combines the offset mode of A8.6.199 A1 & A2 into STRBT.
...
The insufficient encoding information of the combined instruction confuses the decoder wrt
UQADD16. Add extra logic to recover from that.
Fixed an assert reported by Sean Callanan
llvm-svn: 127354
2011-03-09 20:01:14 +00:00
787ba0bf9b
Make these options hidden to reduce the amount of text -help puts on the
...
command line, they'll still be seen with -help-hidden.
llvm-svn: 127353
2011-03-09 19:46:51 +00:00
a10794ab7b
These llvm.dbg.* constants are not used anymore.
...
llvm-svn: 127352
2011-03-09 19:41:33 +00:00
d0db705256
Make physreg coalescing independent on the number of uses of the virtual register.
...
The damage done by physreg coalescing only depends on the number of instructions
the extended physreg live range covers. This fixes PR9438.
The heuristic is still luck-based, and physreg coalescing really should be
disabled completely. We need a register allocator with better hinting support
before that is possible.
Convert a test to FileCheck and force spilling by inserting an extra call. The
previous spilling behavior was dependent on misguided physreg coalescing
decisions.
llvm-svn: 127351
2011-03-09 19:27:06 +00:00
456e104c13
Delete a test case that is very sensitive to coalescer behavior.
...
The test is derived from an old miscompilation of
MultiSource/Benchmarks/VersaBench/8b10b which is run regularly, so we are not
losing coverage.
llvm-svn: 127350
2011-03-09 19:27:02 +00:00
048ffabe78
Improve varags handling, with testcases. Patch by Sasa Stankovic
...
llvm-svn: 127349
2011-03-09 19:22:22 +00:00
0f6d098bd1
This test case should work with list-ilp or list-burr.
...
llvm-svn: 127348
2011-03-09 19:17:10 +00:00
072ed2ee0d
Improve pre-RA-sched register pressure tracking for duplicate operands.
...
This helps cases like 2008-07-19-movups-spills.ll, but doesn't have an obvious impact on benchmarks
llvm-svn: 127347
2011-03-09 19:12:43 +00:00
6348dc0566
Add createELFObjectTargetWriter method to TargetAsmBackend, which enables construction of non-standard ELFObjectWriters that can be used in MCJIT.
...
llvm-svn: 127346
2011-03-09 18:44:41 +00:00
531f9d1241
Missing file from previous commmit (127341) for InitializeTargetAsmParser function.
...
llvm-svn: 127345
2011-03-09 18:36:40 +00:00
745fc89f62
Add constructors to MCElfStreamer and MCObjectStreamer to take an extra MCAssembler * argument.
...
llvm-svn: 127343
2011-03-09 17:33:05 +00:00
2afa325811
When SCEV can determine the loop test is X < X, set ExactBECount=0.
...
When ExactBECount is a constant, use it for MaxBECount.
When MaxBECount cannot be computed, replace it with ExactBECount.
Fixes PR9424.
llvm-svn: 127342
2011-03-09 17:29:58 +00:00
27e07c32c6
Add InitializeNativeAsmParser function.
...
llvm-svn: 127341
2011-03-09 17:25:46 +00:00
2a3b71684a
whitespace
...
llvm-svn: 127340
2011-03-09 17:23:39 +00:00
b2e4d84305
Fix typo, make helper static.
...
llvm-svn: 127335
2011-03-09 16:19:12 +00:00
e503506048
Process some link components that map to other expandable components
...
before the main loop. This is necessary because the loop ignores the
items added to `link_components' after it is entered.
llvm-svn: 127333
2011-03-09 14:44:46 +00:00
84fccb64c3
Remove unused virtual dtor.
...
llvm-svn: 127331
2011-03-09 14:20:28 +00:00
58d1f93b03
Target/X86: Tweak va_arg for Win64 not to miss taking va_start when number of fixed args > 4.
...
llvm-svn: 127328
2011-03-09 11:33:15 +00:00
2035ab2816
Makefile.rules: [PR2928] "make install" may install include files along explicit pattern, not to install CMake's building stuff.
...
llvm-svn: 127325
2011-03-09 09:11:27 +00:00
774647d974
Fix two cases I forgot to update when doing a mental "getSwappedPredicate".
...
Thanks Duncan Sands!
llvm-svn: 127323
2011-03-09 08:20:06 +00:00
718918b07a
Add a test case for r127320.
...
llvm-svn: 127321
2011-03-09 08:11:02 +00:00
19f2b3c652
Fix a crasher introduced by r127317 that is seen on the bots when using an
...
alloca as both integer and floating-point vectors of the same size. Bugpoint is
not cooperating with me, but I'll try to find a manual testcase tomorrow.
llvm-svn: 127320
2011-03-09 07:34:11 +00:00
980104d1d6
Add another micro-optimization. Apologies for the lack of refactoring, but I
...
gave up when I realized I couldn't come up with a good name for what the
refactored function would be, to describe what it does.
This is PR9343 test12, which is test3 with arguments reordered. Whoops!
llvm-svn: 127318
2011-03-09 06:26:03 +00:00
3b649f4d01
Add support to scalar replacement for partial vector accesses of an alloca, e.g.
...
a union of a float, <2 x float>, and <4 x float>. This mostly comes up with the
use of vector intrinsics, especially in NEON when programmers know the layout of
the register file. This enables codegen to eliminate a lot of the subregister
traffic it would otherwise generate.
This commit only enables this for a small number of floating-point cases, but a
lot more integer cases. I assume this is okay for all ports, but I did not do
extensive testing of the quality of code involving i512 vectors and the like. If
there is a use case where this generates worse code than before, let me know and
we can scale it back.
This fixes <rdar://problem/9036264>.
llvm-svn: 127317
2011-03-09 05:43:05 +00:00
43a241fa06
Move vector type merging to a separate function in preparation for it getting
...
more complicated.
llvm-svn: 127316
2011-03-09 05:43:01 +00:00
72ee53ef6a
Add a RUN line to the test case to make it functional. <rdar://problem/9055247>
...
llvm-svn: 127312
2011-03-09 04:02:40 +00:00
df72652fd0
Add a virtual dtor to Delegate to silence -Wnon-virtual-dtor
...
llvm-svn: 127311
2011-03-09 04:02:15 +00:00
d528660759
Test cases for r127309. <rdar://problem/9055247>
...
llvm-svn: 127310
2011-03-09 03:59:52 +00:00
5100c00fa6
Build bots hate me.
...
llvm-svn: 127307
2011-03-09 01:37:39 +00:00
a81a82dcaf
PR9346: Prevent SimplifyDemandedBits from incorrectly introducing
...
INT_MIN % -1.
llvm-svn: 127306
2011-03-09 01:28:35 +00:00
20a6fcabd3
Testcase for r127301.
...
llvm-svn: 127304
2011-03-09 01:05:00 +00:00
8e089640e0
Add a LiveRangeEdit::Delegate protocol.
...
This will we used for keeping register allocator data structures up to date
while LiveRangeEdit is trimming live intervals.
llvm-svn: 127300
2011-03-09 00:57:29 +00:00
aac35b3fbb
PR9420; an instruction before an unreachable is guaranteed not to have any
...
reachable uses, but there still might be uses in dead blocks. Use the
standard solution of replacing all the uses with undef. This is
a rare case because it's very sensitive to phase ordering in SimplifyCFG.
llvm-svn: 127299
2011-03-09 00:48:33 +00:00
4fa0f3040d
Fix testcase.
...
llvm-svn: 127298
2011-03-09 00:41:41 +00:00
5e57137e87
* Correct encoding for VSRI.
...
* Add tests for VSRI and VSLI.
llvm-svn: 127297
2011-03-09 00:33:17 +00:00
06b72e338a
Delete dead code.
...
llvm-svn: 127295
2011-03-09 00:07:39 +00:00
a7f303de71
Correct the encoding for VRSRA and VSRA instructions.
...
llvm-svn: 127294
2011-03-09 00:00:35 +00:00
e313f16ad9
* Fix VRSHR and VSHR to have the correct encoding for the immediate.
...
* Update the NEON shift instruction test to expect what 'as' produces.
llvm-svn: 127293
2011-03-08 23:48:09 +00:00
ea5ebfed15
Delete dead code after rematerializing.
...
LiveRangeEdit::eliminateDeadDefs() will eventually be used by coalescing,
splitting, and spilling for dead code elimination. It can delete chains of dead
instructions as long as there are no dependency loops.
llvm-svn: 127287
2011-03-08 22:46:11 +00:00
fbb482b314
llvm.dbg.declare intrinsic does not use any llvm::Values. It's magic!
...
llvm-svn: 127282
2011-03-08 22:12:11 +00:00
e6fbe056b8
Reverting testcase at 4126896; r126672 broke something else. <rdar://problem/9055247>
...
llvm-svn: 127278
2011-03-08 21:54:17 +00:00
c90ca36e29
Once again try to appease the buildbot gods.
...
llvm-svn: 127272
2011-03-08 21:36:29 +00:00
128e9f0fe9
Strip cruft.
...
llvm-svn: 127269
2011-03-08 20:19:10 +00:00
eee5413f3b
Add a testcase for r127263.
...
llvm-svn: 127266
2011-03-08 19:49:15 +00:00
2e1e1c1e36
Try to fix the compilation error due to type incombatibility.
...
llvm-svn: 127265
2011-03-08 19:39:35 +00:00
880e0b7760
Fix the build for MSVC 9 whose upper_bound() wants to compare elements in the sorted array.
...
Patch by Olaf Krzikalla!
llvm-svn: 127264
2011-03-08 19:37:54 +00:00
7238cba180
Fix some latent bugs if the nodes are unschedulable. We'd gotten away
...
with this before since none of the register tracking or nightly tests
had unschedulable nodes.
This should probably be refixed with a special default Node that just
returns some "don't touch me" values.
Fixes PR9427
llvm-svn: 127263
2011-03-08 19:35:47 +00:00
8030932290
Stop building PPC parts on OSX. Radar 8637926.
...
llvm-svn: 127262
2011-03-08 19:28:28 +00:00
a28879b824
Revert "Make a comparator's argument `const'. This fixes the build for
...
MSVC 9."
The "fix" was meaningless.
This reverts commit r127245.
llvm-svn: 127260
2011-03-08 19:26:21 +00:00
14be61aeee
Darwin 'as' silently ignores the '.ident' directive.
...
llvm-svn: 127258
2011-03-08 19:17:19 +00:00
cd5d3ee8c4
Typo. Patch by arrowdodger.
...
llvm-svn: 127256
2011-03-08 18:01:22 +00:00
b8ca01fff5
Reduce vector reallocations.
...
llvm-svn: 127254
2011-03-08 17:28:36 +00:00
c7b48d40d4
fix incorrect comment.
...
llvm-svn: 127252
2011-03-08 16:59:03 +00:00
e1aa67cff5
Since last couple of days, argument number is encoded using 8 bits from line number field in argument's debug info.
...
llvm-svn: 127250
2011-03-08 16:29:40 +00:00
fb30b85e7c
Update DILexicalBlock doc to mention new fields.
...
llvm-svn: 127249
2011-03-08 16:25:29 +00:00
679cfb54ec
X86: Fix the (saddo/ssub x, 1) -> incl/decl selection to check the right operand for 1.
...
Found by inspection.
llvm-svn: 127247
2011-03-08 15:20:20 +00:00
42e9aaa4b1
PTX: Add intrinsic support for ntid, ctaid, and nctaid registers
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llvm-svn: 127246
2011-03-08 14:10:18 +00:00
6ec5983a0c
Make a comparator's argument `const'. This fixes the build for MSVC 9.
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llvm-svn: 127245
2011-03-08 13:52:07 +00:00
a693632dfd
Remove remnant of my experimentation with CMake.
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llvm-svn: 127244
2011-03-08 13:30:52 +00:00
7dc3d47c34
Fix PR9331. Simplified version of a patch by Jakub Staszak.
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llvm-svn: 127243
2011-03-08 12:39:03 +00:00
5918457b5b
lib/Support/regcomp.c: Fix cygwin warning.
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llvm-svn: 127241
2011-03-08 12:25:29 +00:00
8506e4a1d6
Use $(ECHOPATH) to make llvm-lit from llvm-lit.in.
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llvm-svn: 127240
2011-03-08 12:25:19 +00:00
0b26c3a674
Reapply r127073(partially): Introduce $(ECHOPATH) to print DOSish path string on MSYS bash for alternative of $(ECHO).
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On mingw and python/w32, lit would not be expected to understand MSYS-style path.
llvm-svn: 127239
2011-03-08 12:25:10 +00:00
05334dad60
Testcase for r127187.
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llvm-svn: 127236
2011-03-08 10:27:58 +00:00
45f470b86d
Don't show commands.
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llvm-svn: 127224
2011-03-08 08:34:49 +00:00
afc8098c9e
Reorder comments to put them the right way around.
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llvm-svn: 127220
2011-03-08 06:29:47 +00:00
97d0be8ee1
While sinking an instruction, do not lose llvm.dbg.value intrinsic.
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llvm-svn: 127214
2011-03-08 03:06:19 +00:00
1d5532a0d5
Change the next release number to 3.0svn.
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llvm-svn: 127213
2011-03-08 03:00:02 +00:00
a259686db1
A few more tests for instruction encodings.
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llvm-svn: 127209
2011-03-08 02:51:48 +00:00
eb19e9e9fc
Turn on list-ilp scheduling by default on x86 and x86-64, fix up
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testcases accordingly. Some are currently xfailed and will be filed
as bugs to be fixed or understood.
Performance results:
roughly neutral on SPEC
some micro benchmarks in the llvm suite are up between 100 and 150%, only
a pair of regressions that are due to be investigated
john-the-ripper saw:
10% improvement in traditional DES
8% improvement in BSDI DES
59% improvement in FreeBSD MD5
67% improvement in OpenBSD Blowfish
14% improvement in LM DES
Small compile time impact.
llvm-svn: 127208
2011-03-08 02:42:25 +00:00
52b3e38a1f
Further improvements to pre-RA-sched=list-ilp.
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This change uses the MaxReorderWindow for both height and depth, which
tends to limit the negative effects of high register pressure.
llvm-svn: 127203
2011-03-08 01:51:56 +00:00
45acbd03db
Fix a compiler crash where a Glue value had multiple uses. Radar 9049552.
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llvm-svn: 127198
2011-03-08 01:17:20 +00:00
70bd363517
Fix comment typos.
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llvm-svn: 127197
2011-03-08 01:17:16 +00:00
77ad1dc56d
Rename the narrow shift right immediate operands to "shr_imm*" operands. Also
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expand the testing of the narrowing shift right instructions.
No functionality change.
llvm-svn: 127193
2011-03-07 23:38:41 +00:00
71c380f6c7
Let shrinkToUses optionally return a list of now dead machine instructions.
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llvm-svn: 127192
2011-03-07 23:29:10 +00:00
ac546dc62e
Typos.
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llvm-svn: 127186
2011-03-07 22:48:16 +00:00
d00c628f8f
Preserve line no. info.
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Radar 9097659
2011-03-07 22:43:45 +00:00
27f942fa60
Make the UselessRegs argument optional in the LiveRangeEdit constructor.
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llvm-svn: 127181
2011-03-07 22:42:16 +00:00
df61694417
Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo.
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llvm-svn: 127175
2011-03-07 21:56:36 +00:00
15a29867ed
Add test for r127138.
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llvm-svn: 127172
2011-03-07 21:28:14 +00:00
e5d7369e1e
Often GCC can see that NumBuckets is zero here, resulting in a warning
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about possibly swapped memset parameters. Avoid the warning.
llvm-svn: 127170
2011-03-07 19:38:38 +00:00
e9fdc06fec
Tidy up.
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llvm-svn: 127169
2011-03-07 19:28:43 +00:00
ac32d8a691
Handle the special case of registers begin redefined by early-clobber defs.
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In this case, the value need to be available at the load index instead of the
normal use index.
llvm-svn: 127167
2011-03-07 18:56:16 +00:00
cd526fa15e
Use the correct LHS type when determining the legalization of a shift's RHS type.
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llvm-svn: 127163
2011-03-07 18:29:47 +00:00
0cfa737f27
ptx: Fix calling convention printing in AsmWriter.cpp
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This allows LLVM IR using ptx_kernel or ptx_device calling
conventions to be properly printed when emitted in text form.
llvm-svn: 127157
2011-03-07 14:32:30 +00:00
2769c6e0dc
Clarify that the result of an srem is only guaranteed to have the same sign as the
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left-hand-side if the result is non-zero.
llvm-svn: 127156
2011-03-07 09:12:24 +00:00
e51e464c06
Don't keep the log files around. Just pipe to a log file instead.
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llvm-svn: 127155
2011-03-07 07:37:37 +00:00
4785885feb
Fix tagging name.
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llvm-svn: 127154
2011-03-07 07:37:12 +00:00
35fd6dec7a
Try fixing mingw build.
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llvm-svn: 127153
2011-03-07 05:35:01 +00:00
bb8599ade5
Prepend LD.Flags before LDFLAGS to avoid overriding necessary paths.
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Patch by Jack Howarth.
llvm-svn: 127152
2011-03-07 04:25:12 +00:00
ac55c79dd6
Tweak this test. We can analyze what happens and show that we still do the
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right thing, instead of merely being unable to analyze and the transform
doesn't occur.
llvm-svn: 127149
2011-03-07 02:10:18 +00:00
e467979d0a
Add more analysis of the sign bit of an srem instruction. If the LHS is negative
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then the result could go either way. If it's provably positive then so is the
srem. Fixes PR9343 #7 !
llvm-svn: 127146
2011-03-07 01:50:10 +00:00
7260d8f57b
Do a compiler check that we use one of the types from PointerUnion[N], instead of a runtime check.
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llvm-svn: 127145
2011-03-07 01:30:20 +00:00
3e76b502a4
Windows/PathV2.inc: Eliminate redundant condition. DWORD is unsigned.
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llvm-svn: 127140
2011-03-07 00:12:53 +00:00
871cfde1c2
Don't internalize available_externally functions. We already did the right
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thing for variables.
llvm-svn: 127138
2011-03-06 23:41:34 +00:00
cf0eebc6c9
remove another jeff link
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llvm-svn: 127135
2011-03-06 23:00:33 +00:00
9cb33deebf
Typo.
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llvm-svn: 127131
2011-03-06 21:13:45 +00:00
92db8e8e39
ConstantInt has some getters which return ConstantInt's or ConstantVector's of
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the value splatted into every element. Extend this to getTrue and getFalse which
by providing new overloads that take Types that are either i1 or <N x i1>. Use
it in InstCombine to add vector support to some code, fixing PR8469!
llvm-svn: 127116
2011-03-06 03:36:19 +00:00
0d8150f279
lib/CodeGen/AsmPrinter/CMakeLists.txt: Fix CMake build, following up to r127099.
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llvm-svn: 127114
2011-03-06 00:13:15 +00:00
dd01732e63
Disable a couple of experimental heuristics to get the best results from the current implementation of -pre-RA-sched=list-ilp.
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llvm-svn: 127113
2011-03-06 00:03:32 +00:00
75e7a147ae
Avoid zero-sized allocations when copying a fresh DenseMap.
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llvm-svn: 127110
2011-03-05 22:00:28 +00:00
42fc943f21
Revert r127073: "Introduce $(ECHOPATH) to print DOSish path string on MSYS bash for alternative of $(ECHO)."
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It broke the llvm-gcc-native-mingw32 buildbot, and we need all of them to be green for the 2.9 branch.
Takumi, please reapply after we branch, preferably with a fix ;-)
llvm-svn: 127107
2011-03-05 18:55:06 +00:00
692f633df9
ARM assembler stuff is crazy: for .setfp positive values of offset corresponds to "add" instruction, not to "sub" as in .pad case
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llvm-svn: 127106
2011-03-05 18:44:00 +00:00
9e66cbb366
In Thumb1 mode the constant might be materialized via the load from constpool. Emit unwinding information in case when this load from constpool is used to change the stack pointer in the prologue.
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llvm-svn: 127105
2011-03-05 18:43:55 +00:00
a8d177b2d4
Implement frame unwinding information emission for Thumb1. Not finished yet because there is no way given the constpool index to examine the actual entry: the reason is clones inserted by constant island pass, which are not tracked at all! The only connection is done during asmprinting time via magic label names which is really gross and needs to be eventually fixed.
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llvm-svn: 127104
2011-03-05 18:43:50 +00:00
51537f1c7f
Add unwind information emission for thumb stuff
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llvm-svn: 127103
2011-03-05 18:43:43 +00:00
acca7adf16
Handle MI flags inside Thumb2SizeReduction pass.
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llvm-svn: 127102
2011-03-05 18:43:38 +00:00
e7410dd0d5
Preliminary support for ARM frame save directives emission via MI flags.
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This is just very first approximation how the stuff should be done
(e.g. ARM-only for now). More to follow.
llvm-svn: 127101
2011-03-05 18:43:32 +00:00
961013686e
Provide hooks to set MI flags in MachineInstrBuilder
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llvm-svn: 127100
2011-03-05 18:43:20 +00:00
a7ec2dcefd
Some first rudimentary support for ARM EHABI: print exception table in "text mode".
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llvm-svn: 127099
2011-03-05 18:43:15 +00:00
65cff414b6
Add FrameSetup MI flags
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llvm-svn: 127098
2011-03-05 18:43:04 +00:00
489bedcc24
Shorten AsmPrinterFlags filed to accomodate for future Flags field
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llvm-svn: 127097
2011-03-05 18:42:54 +00:00
27e0a4ab86
Work around a coalescer bug.
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The coalescer can in very rare cases leave too large live intervals around after
rematerializing cheap-as-a-move instructions.
Linear scan doesn't really care, but live range splitting gets very confused
when a live range is killed by a ghost instruction.
I will fix this properly in the coalescer after 2.9 branches.
llvm-svn: 127096
2011-03-05 18:33:49 +00:00
00d09428fe
Remove unused conditional negate operations.
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llvm-svn: 127090
2011-03-05 16:54:31 +00:00
08c913b6e6
InstCombine: We know the number of items initially added to the worklist map, reserve space early to avoid rehashing.
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llvm-svn: 127089
2011-03-05 16:43:46 +00:00
4d050b6f85
Lazily allocate DenseMaps.
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This makes lookup slightly more expensive but it's worth it, unused
DenseMaps are common in LLVM code apparently.
1% speedup on clang -O3 bzip2.c
4% speedup on clang -O3 oggenc.c (Release build of clang on i386/linux)
llvm-svn: 127088
2011-03-05 16:43:41 +00:00
369ea3fdb4
ptx: add basic intrinsic support
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llvm-svn: 127084
2011-03-05 14:17:37 +00:00
25cedf3fe4
Be explicit with abs(). Visual Studio workaround.
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llvm-svn: 127075
2011-03-05 10:29:25 +00:00
250c357ce7
utils/lit/lit/TestRunner.py: bash is available with MSYS on Python/W32. Then we can execute "bash tests".
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llvm-svn: 127074
2011-03-05 09:46:53 +00:00
e9dc4d309a
Introduce $(ECHOPATH) to print DOSish path string on MSYS bash for alternative of $(ECHO).
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On mingw and python/w32, lit would not be expected to understand MSYS-style path.
llvm-svn: 127073
2011-03-05 09:46:45 +00:00
f86dd9e3ec
On Windows hosts, Python scripts in test/Scripts did not accept binary files from stdin. The environment variable "PYTHONUNBUFFERED" makes stdin as binary. Thanks to Danil Malyshev!
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llvm-svn: 127072
2011-03-05 09:46:36 +00:00
d7f4c21684
Fix for -sched-high-latency-cycles in sched=list-ilp mode.
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llvm-svn: 127071
2011-03-05 09:18:16 +00:00
5158a86fcb
Missing "virtual" keyword. Jakob's review.
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llvm-svn: 127070
2011-03-05 08:39:45 +00:00
13c885d193
Fix PR9398 - 10% of llc compile time is spent in Value::getNumUses. This reduces
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the percentage of time spent in CodeGenPrepare when llcing 403.gcc from 12.6% to
1.8% of total llc time.
llvm-svn: 127069
2011-03-05 08:12:26 +00:00
b8390b7a25
Missing comment.
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llvm-svn: 127068
2011-03-05 08:04:11 +00:00
641e2d4f8c
Increased the register pressure limit on x86_64 from 8 to 12
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regs. This is the only change in this checkin that may affects the
default scheduler. With better register tracking and heuristics, it
doesn't make sense to artificially lower the register limit so much.
Added -sched-high-latency-cycles and X86InstrInfo::isHighLatencyDef to
give the scheduler a way to account for div and sqrt on targets that
don't have an itinerary. It is currently defaults to 10 (the actual
number doesn't matter much), but only takes effect on non-default
schedulers: list-hybrid and list-ilp.
Added several heuristics that can be individually disabled for the
non-default sched=list-ilp mode. This helps us determine how much
better we can do on a given benchmark than the default
scheduler. Certain compute intensive loops run much faster in this
mode with the right set of heuristics, and it doesn't seem to have
much negative impact elsewhere. Not all of the heuristics are needed,
but we still need to experiment to decide which should be disabled by
default for sched=list-ilp.
llvm-svn: 127067
2011-03-05 08:00:22 +00:00
35d1f9f983
remove jeff's name (by his request)
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llvm-svn: 127066
2011-03-05 07:23:02 +00:00
27c079e1b0
whitespace
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llvm-svn: 127065
2011-03-05 06:31:54 +00:00
9719a719c7
Thread comparisons over udiv/sdiv/ashr/lshr exact and lshr nuw/nsw whenever
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possible. This goes into instcombine and instsimplify because instsimplify
doesn't need to check hasOneUse since it returns (almost exclusively) constants.
This fixes PR9343 #4 #5 and #8 !
llvm-svn: 127064
2011-03-05 05:19:11 +00:00
25cc338d88
Try once again to optimize "icmp (srem X, Y), Y" by turning the comparison into
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true/false or "icmp slt/sge Y, 0".
llvm-svn: 127063
2011-03-05 04:28:48 +00:00
1a9b66c752
Rework the global split cost calculation.
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The global cost is the sum of block frequencies for spill code that must be
inserted because preferences weren't met.
llvm-svn: 127062
2011-03-05 03:28:51 +00:00
6f9a8f85d7
test/CodeGen/X86/vec_cast.ll: [PR8311] Add explicit -mtriple=x86_64-linux and -mtriple=x86_64-win32. Thanks to Nadav, it might be fixed in r126424.
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llvm-svn: 127060
2011-03-05 02:38:02 +00:00
0434dbe1fe
test commit
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llvm-svn: 127059
2011-03-05 02:36:09 +00:00
4b598e156a
Compute the constraints for global live range splitting from an interference pattern.
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This simplifies the code and makes it faster too.
The interference patterns are saved for each candidate register. It will be
reused for actually executing the split. Work in progress.
llvm-svn: 127054
2011-03-05 01:10:31 +00:00
dc55428d7a
Teach the register scavenger to take subregs into account when finding a free register.
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llvm-svn: 127049
2011-03-05 00:20:19 +00:00
f045b7ab45
Support unregistering exception frames of functions when they are removed.
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Patch by Johannes Schaub!
Fixes PR8548
llvm-svn: 127047
2011-03-04 23:37:39 +00:00
Jim Grosbach