Commit Graph

162872 Commits

Author SHA1 Message Date
Hal Finkel 1df3205e8c Adjust PPC A2 input operand latencies
On the PPC A2, instructions are only issued after their input operands are
ready. Model this by specifying that input operands are read at dispatch (0
cycles after issue). This changes all input operand latencies from 1 to 0.

Significant test-suite performance changes (these are 99.5% confidence
intervals on 6 runs for both before and after):

speedups:
MultiSource/Benchmarks/sim/sim
	-1.21915% +/- 0.175063%
MultiSource/Benchmarks/TSVC/LinearDependence-flt/LinearDependence-flt
	-1.23946% +/- 1.05133%
SingleSource/Benchmarks/Misc/flops-2
	-1.24237% +/- 0.681362%
MultiSource/Applications/JM/lencod/lencod
	-1.33992% +/- 0.757498%
MultiSource/Benchmarks/TSVC/InductionVariable-flt/InductionVariable-flt
	-1.51802% +/- 1.21468%
MultiSource/Benchmarks/TSVC/GlobalDataFlow-flt/GlobalDataFlow-flt
	-2.18818% +/- 1.28605%
MultiSource/Benchmarks/TSVC/Packing-flt/Packing-flt
	-2.21977% +/- 1.19499%
SingleSource/Benchmarks/BenchmarkGame/spectral-norm
	-2.29822% +/- 0.671871%
MultiSource/Benchmarks/TSVC/Packing-dbl/Packing-dbl
	-2.40975% +/- 0.355931%
SingleSource/Benchmarks/Misc/fp-convert
	-2.41899% +/- 1.04751%
MultiSource/Benchmarks/TSVC/Searching-dbl/Searching-dbl
	-2.50349% +/- 0.126765%
SingleSource/Benchmarks/Misc/flops-3
	-3.00214% +/- 0.700795%
MultiSource/Benchmarks/TSVC/LoopRestructuring-flt/LoopRestructuring-flt
	-3.56995% +/- 3.2929%
MultiSource/Applications/sgefa/sgefa
	-4.24908% +/- 2.00413%
MultiSource/Benchmarks/ASC_Sequoia/IRSmk/IRSmk
	-18.1294% +/- 3.96489%

regressions:
MultiSource/Benchmarks/TSVC/Reductions-dbl/Reductions-dbl
	1.03249% +/- 0.178547%
MultiSource/Applications/hexxagon/hexxagon
	1.16597% +/- 0.285235%
MultiSource/Benchmarks/TSVC/IndirectAddressing-flt/IndirectAddressing-flt
	1.39576% +/- 1.07855%
SingleSource/Benchmarks/Misc-C++/stepanov_v1p2
	1.71539% +/- 0.173182%
MultiSource/Benchmarks/Fhourstones-3.1/fhourstones3.1
	1.90013% +/- 0.866472%
MultiSource/Benchmarks/TSVC/Recurrences-dbl/Recurrences-dbl
	2.39854% +/- 1.05914%
MultiSource/Benchmarks/TSVC/ControlFlow-dbl/ControlFlow-dbl
	2.4402% +/- 0.817904%
MultiSource/Benchmarks/TSVC/LoopRestructuring-dbl/LoopRestructuring-dbl
	5.87997% +/- 3.3172%
MultiSource/Benchmarks/Trimaran/netbench-crc/netbench-crc
	9.02643% +/- 5.79591%
MultiSource/Benchmarks/VersaBench/bmm/bmm
	10.3517% +/- 1.227%

Obviously, there are data points on both sides of this; but I think, overall,
this supports making the change.

llvm-svn: 195951
2013-11-29 07:04:59 +00:00
Lang Hames 7468daadda Teach LocalStackSlotAllocation that stackmaps/patchpoints don't have range
constraints on their frame offsets.

llvm-svn: 195950
2013-11-29 06:35:30 +00:00
Hal Finkel 5a7162f36b Create a PPC440 SchedMachineModel
Some of the older PPC processor definitions don't have associated
SchedMachineModels; correct this for the PPC440.

llvm-svn: 195949
2013-11-29 06:32:17 +00:00
Hal Finkel 4035e8d86a Fixup PPC440 load/store operand latencies
The operand latencies for loads and stores in the PPC440 itinerary were wrong
(the store operands are all inputs, and the "with update" (pre-increment)
instructions need a latency for the additional output).

llvm-svn: 195948
2013-11-29 06:19:43 +00:00
Hal Finkel a10bd1d23a Adjust PPC440 operand latencies
The operand latencies for the PPC440 should be specified relative to dispatch,
not relative to the initial fetch-and-decode stages. Because most instructions
(ignoring bypass) wait in dispatch until their operands are ready, this is
modeled as reading input operands "at dispatch" (0 cycles after issue), and so
every input and output operand has 4 cycles subtracted from it.

This could alter scheduling slightly, but I don't expect a large effect.

llvm-svn: 195947
2013-11-29 05:59:00 +00:00
Hal Finkel dd06369913 Don't model the fetch and decode units for the PPC440
Modeling the fetch and decode units in the PPC440 itinerary does not add
anything to the hazard detection capability (and so modeling them just wastes
compile time).

No functionality change intended.

llvm-svn: 195946
2013-11-29 05:58:38 +00:00
Lang Hames c8a73af391 Remove unused variable from r195944.
llvm-svn: 195945
2013-11-29 03:36:53 +00:00
Lang Hames 39609996d9 Refactor a lot of patchpoint/stackmap related code to simplify and make it
target independent.

Most of the x86 specific stackmap/patchpoint handling was necessitated by the
use of the native address-mode format for frame index operands. PEI has now
been modified to treat stackmap/patchpoint similarly to DEBUG_INFO, allowing
us to use a simple, platform independent register/offset pair for frame
indexes on stackmap/patchpoints.

Notes:
  - Folding is now platform independent and automatically supported.
  - Emiting patchpoints with direct memory references now just involves calling
    the TargetLoweringBase::emitPatchPoint utility method from the target's
    XXXTargetLowering::EmitInstrWithCustomInserter method. (See
    X86TargetLowering for an example).
  - No more ugly platform-specific operand parsers.

This patch shouldn't change the generated output for X86. 

llvm-svn: 195944
2013-11-29 03:07:54 +00:00
Hao Liu 46a6ed9e64 AArch64: Two intrinsics are expected to return float64 not float32 in arm_neon.h
llvm-svn: 195943
2013-11-29 02:31:42 +00:00
Hao Liu 8a0099e02c Fix the problem that the range check for scalar narrow shift is too wide.
E.g. the immediate value of vshrns_n_s16 is [1,16], which should be [1,8].

llvm-svn: 195942
2013-11-29 02:13:17 +00:00
Hao Liu ba38eee8ac AArch64: The pattern match should check the range of the immediate value.
Or we can generate some illegal instructions.
E.g. shrn2 v0.4s, v1.2d, #35. The legal range should be in [1, 16].

llvm-svn: 195941
2013-11-29 02:11:22 +00:00
Jiangning Liu 24173dd4b1 Add missing intrinsic function vbsl_f64 for AArch64 NEON.
llvm-svn: 195940
2013-11-29 01:38:49 +00:00
Jiangning Liu f7b4c7c2ce Add missing test case for bsl_f64 support of AArch64 NEON.
llvm-svn: 195939
2013-11-29 01:38:08 +00:00
Jiangning Liu c429c00f3b Add missing pattern for supporting intrinsic function vbsl_f64 with
argument double floating point.

llvm-svn: 195938
2013-11-29 01:37:15 +00:00
Jiangning Liu c8a9d762d3 Add missing intrinsic function vcombine_f64 for AArch64 NEON.
llvm-svn: 195937
2013-11-29 01:29:57 +00:00
Kevin Qin 337cfcc83c [AArch64 NEON]Fix a assertion failure when disassemble SHLL instruction.
llvm-svn: 195936
2013-11-29 01:29:16 +00:00
Tobias Grosser 2cbc7bf64a (re)enable formatting checks
llvm-svn: 195935
2013-11-28 23:35:08 +00:00
Stephen Canon c454964c47 Rein in overzealous InstCombine of fptrunc(OP(fpextend, fpextend)).
llvm-svn: 195934
2013-11-28 21:38:05 +00:00
Rafael Espindola d5bd5a4716 Refactor to remove a bit of duplication. No functionality change.
llvm-svn: 195933
2013-11-28 20:12:44 +00:00
Benjamin Kramer ea1982aff9 Silence sign-compare warning and reduce nesting.
No functionality change.

llvm-svn: 195932
2013-11-28 19:58:56 +00:00
Rafael Espindola 61b3d0c1fb Remove an always true parameter.
llvm-svn: 195931
2013-11-28 19:35:07 +00:00
Sylvestre Ledru 3b5b16cdff Also silent -Wno-cast-qual in the SWIG Python wrapper. Remove a huge number of warnings
llvm-svn: 195930
2013-11-28 18:11:34 +00:00
NAKAMURA Takumi 226e10edff [CMake] Let add_public_tablegen_target() provide intrinsics_gen, too.
I think, in principle, intrinsics_gen may be added explicitly.
That said, it can be added incidentally, since each target already has dependencies to llvm-tblgen.
Almost all source files depend on both CommonTaleGen and intrinsics_gen.

Explicit add_dependencies() have been pruned under lib/Target.

llvm-svn: 195929
2013-11-28 17:04:31 +00:00
NAKAMURA Takumi c08227de0e [CMake] Also OptionTests can be free from add_dependencies() with add_public_tablegen_target().
llvm-svn: 195928
2013-11-28 17:04:13 +00:00
NAKAMURA Takumi ce746c6c49 [CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen.
add_public_tablegen_target adds *CommonTableGen to LLVM_COMMON_DEPENDS.
LLVM_COMMON_DEPENDS affects add_llvm_library (and other add_target stuff) within its scope.

llvm-svn: 195927
2013-11-28 17:04:04 +00:00
Rafael Espindola 848493d886 The global prefix is always one char. Don't use a string for it.
llvm-svn: 195926
2013-11-28 17:00:49 +00:00
Daniel Jasper 9c19956845 clang-format: Improve selective formatting of nested statements.
Previously, clang-format could create quite corrupt formattings if
individual lines of nested blocks (e.g. in "DEBUG({})" or lambdas) were
used. With this patch, it tries to extend the formatted regions to leave
around some reasonable format without always formatting the entire
surrounding statement.

llvm-svn: 195925
2013-11-28 15:58:55 +00:00
NAKAMURA Takumi b2abd160b3 [CMake] Prune include_directories() in llvm/lib/Target, take #2.
I forgot to commit them. They were staging in my local repo.

llvm-svn: 195924
2013-11-28 15:30:37 +00:00
Daniel Sanders 063b74ad4e [mips] Revert test commit r195922.
llvm-svn: 195923
2013-11-28 15:26:33 +00:00
Daniel Sanders eb16443fca [mips] A test commit to test my Herald and Audit workflow
Will be reverted in the next commit

llvm-svn: 195922
2013-11-28 15:25:43 +00:00
NAKAMURA Takumi 413518f1f8 [CMake] Prune include_directories() in llvm/lib/Target. add_llvm_target() sets them.
llvm-svn: 195921
2013-11-28 14:53:30 +00:00
NAKAMURA Takumi 979e604d8c Add newline at eof.
llvm-svn: 195920
2013-11-28 14:52:52 +00:00
Evgeniy Stepanov f2cddc3e64 [sanitizer] Disable iconv interceptor in OSX.
iconv is defined in an optional DSO, and our interception logic on OSX does not
support that.

llvm-svn: 195919
2013-11-28 14:42:59 +00:00
Evgeniy Stepanov b56c5cd95e [sanitizer] Intercept times.
llvm-svn: 195918
2013-11-28 14:41:22 +00:00
Evgeniy Stepanov 9c1f8323ae [sanitizer] Intercept iconv.
llvm-svn: 195917
2013-11-28 14:14:48 +00:00
Dmitry Vyukov 25ecfcf00c tsan: deflake more tests
llvm-svn: 195916
2013-11-28 10:12:16 +00:00
Daniel Sanders a3365ac962 As myself as code-owner of the MIPS backend (lib/Target/Mips/*)
llvm-svn: 195915
2013-11-28 09:36:44 +00:00
Dmitry Vyukov 8d1eb705c7 tsan: add support for passing file descriptors over UNIX domain sockets
tsan was missing new fd's arrived from recvmsg(),
and thus was reporting false positives due to missed synchronization on the fd's

llvm-svn: 195914
2013-11-28 09:09:42 +00:00
Dmitry Vyukov 0fea3ad0c7 tsan: deflake more tests
llvm-svn: 195913
2013-11-28 09:06:55 +00:00
Peter Zotov e7255da917 [OCaml] Add a slash accidentally omitted from Makefile
llvm-svn: 195912
2013-11-28 09:03:28 +00:00
Rafael Espindola 3e3a3f1f85 Use the mangler consistently instead of using getGlobalPrefix directly.
llvm-svn: 195911
2013-11-28 08:59:52 +00:00
Alp Toker 3dfeafd9db InclusionRewriter: Avoid duplicated BOM check
The lexer already knows its position in the file, so use that instead of
guessing it might be 3.

llvm-svn: 195910
2013-11-28 07:21:44 +00:00
Hal Finkel 92720ab1b2 Don't share functional units among the PPC itineraries
Instead of sharing functional unit names between the various PPC itineraries,
give each core its own unit names prefixed with the core name.  This follows
the convention used by other backends (such as ARM), and removes a non-obvious
ordering dependency between the various PPCSchedule*.td files.

No functionality change intended.

llvm-svn: 195908
2013-11-28 06:05:59 +00:00
Alp Toker 6a7f41f0ec Fix test on Windows
'not' on Windows tries and fails to convert the argument to UTF-16 and back for
some reason:

  Error: Unable to convert command-line to UTF-16

Let's try replacing it with !.

(There was no obvious way to do these with FileCheck)

llvm-svn: 195907
2013-11-28 05:55:40 +00:00
David Majnemer fd9afda636 Sema: Assert that there are no pending local instantiations left
This should have been part of r195887, not sure how it slipped through
the cracks.

llvm-svn: 195906
2013-11-28 01:45:16 +00:00
Jiangning Liu 4bc9dbd846 Remove the variable only used by assert to avoid the build failure
caused by build options [-Werror,-Wunused-variable].

llvm-svn: 195905
2013-11-28 01:34:55 +00:00
Alp Toker 49d9221098 Ensure that the output BOM test check is run
The first command's output was only reaching one of the two checks previously.

llvm-svn: 195904
2013-11-28 01:22:29 +00:00
Hao Liu f9f468abee AArch64: Fix a bug about disassembling post-index load single element to 4 vectors
llvm-svn: 195903
2013-11-28 01:07:45 +00:00
Reed Kotler 0d409e2dfe Check in conditional branches for constant islands. Still need to finish
conditional branches for very large targets. That will be the next small
patch. Everything now should in principle work as good (functionality
wise) as without constant islands so we decided at Mips/Imagination to
make constant islands the default for Mips16 now so that it will get
excercised a lot and this port is still experimentatl though hopefully soon
we will change the status. Some more cleanup and code review is in order
but things are converging fast.

llvm-svn: 195902
2013-11-28 00:56:37 +00:00
Tom Stellard 8bb6cb8009 Fix a C&P error in r195021 (65a950abab3cb8435ccb2646ac4773986c995c81)
Patch by: Kai Wasserbäch

Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
llvm-svn: 195898
2013-11-28 00:17:29 +00:00