058abf1a4a
[Hexagon] Change the vector scaling for vector offsets
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Keep full offset value on MI-level instructions, but have it scaled down
in the MC-level instructions.
llvm-svn: 299664
2017-04-06 17:28:21 +00:00
bc744272f8
Fix -Wunused-variable in non-Asserts build
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llvm-svn: 270118
2016-05-19 20:44:22 +00:00
f869d3190c
Simplify conditional unreachable into an assertion
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llvm-svn: 270111
2016-05-19 20:28:40 +00:00
562e19eecb
Fix a covnersion from string to bool issue used in an assert
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Problem Was exposed by -Wstring-conversion
llvm-svn: 270087
2016-05-19 18:05:56 +00:00
a0ea73c9af
[scan-build] fix dead store warnings emitted on LLVM Hexagon code base
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Patch by Apelete Seketeli.
Differential Revision: http://reviews.llvm.org/D19900
llvm-svn: 269415
2016-05-13 13:13:59 +00:00
855d182656
Fix a couple assertions that can never fire because they just contained the text string which always evaluates to true. Add a ! so they'll evaluate to false.
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llvm-svn: 267312
2016-04-24 02:01:25 +00:00
7cd0892729
[Hexagon] Enabling ASM parsing on Hexagon backend and adding instruction parsing tests. General updating of the code emission.
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llvm-svn: 252443
2015-11-09 04:07:48 +00:00
7c9587136d
[Hexagon] Adding skeleton of HVX extension instructions.
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llvm-svn: 250600
2015-10-17 01:33:04 +00:00
3affe6e264
-Wdeprecated: Remove some dead code that was relying on a questionable (rule-of-3-violating) copy ctor in MCInstPrinter
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llvm-svn: 244133
2015-08-05 21:15:48 +00:00
8b643559d4
MC: Add target hook to control symbol quoting
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llvm-svn: 239370
2015-06-09 00:31:39 +00:00
be8c453d58
[Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing.
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llvm-svn: 239161
2015-06-05 16:00:11 +00:00
c40be85adc
Revert r239095 incorrect test tree.
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llvm-svn: 239102
2015-06-04 21:32:42 +00:00
fc52c11d80
[Hexagon] Adding functionality for duplexing. Duplexing is a way to compress commonly used pairs of instructions in order to reduce code size. The test case duplex.ll normally would be 8 bytes, assign register to 0 and jump to link register. After duplexing this is only 4 bytes. This also tests the HexagonMCShuffler code path which is used to make sure duplexed instructions still follow slot requirements.
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llvm-svn: 239095
2015-06-04 21:16:16 +00:00
68d967d92e
[Hexagon] Disassembling, printing, and emitting instructions a whole-bundle at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch.
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llvm-svn: 238556
2015-05-29 14:44:13 +00:00
55bdeb7bc7
[Hexagon] Use constant extenders to fix up hardware loops
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Use a loop instruction with a constant extender for a hardware
loop instruction that is too far away from the start of the loop.
This is cheaper than changing the SA register value.
Differential Revision: http://reviews.llvm.org/D9262
llvm-svn: 235882
2015-04-27 14:16:43 +00:00
badf3a6356
[Hexagon] Implement HexagonInstPrinter::printRegName
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llvm-svn: 235514
2015-04-22 15:38:17 +00:00
b46d0234a6
[MCInstPrinter] Enable MCInstPrinter to change its behavior based on the
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per-function subtarget.
Currently, code-gen passes the default or generic subtarget to the constructors
of MCInstPrinter subclasses (see LLVMTargetMachine::addPassesToEmitFile), which
enables some targets (AArch64, ARM, and X86) to change their instprinter's
behavior based on the subtarget feature bits. Since the backend can now use
different subtargets for each function, instprinter has to be changed to use the
per-function subtarget rather than the default subtarget.
This patch takes the first step towards enabling instprinter to change its
behavior based on the per-function subtarget. It adds a bit "PassSubtarget" to
AsmWriter which tells table-gen to pass a reference to MCSubtargetInfo to the
various print methods table-gen auto-generates.
I will follow up with changes to instprinters of AArch64, ARM, and X86.
llvm-svn: 233411
2015-03-27 20:36:02 +00:00
1174fea31c
[Hexagon] Moving remaining methods off of HexagonMCInst in to HexagonMCInstrInfo and eliminating HexagonMCInst class.
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llvm-svn: 229914
2015-02-19 21:10:50 +00:00
b4e5be4c66
[Hexagon] [NFC] Renaming *packetStart to *packetBegin
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llvm-svn: 223243
2014-12-03 17:31:43 +00:00
6f352b03a4
[Hexagon] Adding NOP encoding bits.
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llvm-svn: 222791
2014-11-25 21:23:07 +00:00
ff06261aed
[Hexagon] [NFC] Merging InstPrinter directory in to MCTargetDesc since they have a circular dependency.
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llvm-svn: 222458
2014-11-20 21:56:35 +00:00
5241881bbc
[Hexagon] Reverting 220584 to address ASAN errors.
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llvm-svn: 221210
2014-11-04 00:14:36 +00:00
838307b31f
[Hexagon] Resubmission of 220427
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Modified library structure to deal with circular dependency between HexagonInstPrinter and HexagonMCInst.
Adding encoding bits for add opcode.
Adding llvm-mc tests.
Removing unit tests.
http://reviews.llvm.org/D5624
llvm-svn: 220584
2014-10-24 19:00:32 +00:00
Krzysztof Parzyszek