Commit Graph

278406 Commits

Author SHA1 Message Date
Haojian Wu 4c1394d67d [clangd] Introduce a "Symbol" class.
Summary:
* The "Symbol" class represents a C++ symbol in the codebase, containing all the
  information of a C++ symbol needed by clangd. clangd will use it in clangd's
  AST/dynamic index and global/static index (code completion and code
  navigation).
* The SymbolCollector (another IndexAction) will be used to recollect the
  symbols when the source file is changed (for ASTIndex), or to generate
  all C++ symbols for the whole project.

In the long term (when index-while-building is ready), clangd should share a
same "Symbol" structure and IndexAction with index-while-building, but
for now we want to have some stuff working in clangd.

Reviewers: ioeric, sammccall, ilya-biryukov, malaperle

Reviewed By: sammccall

Subscribers: malaperle, klimek, mgorny, cfe-commits

Differential Revision: https://reviews.llvm.org/D40897

llvm-svn: 320486
2017-12-12 15:42:10 +00:00
Alexey Bataev ca2a8cea2f Revert "[InstCombine] Fix PR35618: Instcombine hangs on single minmax load bitcast."
This reverts commit r320483 because of the failed Windows buildbots.

llvm-svn: 320485
2017-12-12 15:24:17 +00:00
Alex Bradbury 8bba6bfeef [RISCV] MC layer support for the instructions added in the privileged spec
Adds support for the instructions added in the RISC-V privileged ISA
(https://content.riscv.org/wp-content/uploads/2017/05/riscv-privileged-v1.10.pdf):
uret, sret, mret, wfi, and sfence.vma.

Note from the committer: I made very minor formatting changes prior to commit, 
which didn't seem worth creating another review round-trip for.

Differential Revision: https://reviews.llvm.org/D40383

Patch by David Craven.

llvm-svn: 320484
2017-12-12 15:17:45 +00:00
Alexey Bataev 1daef8a667 [InstCombine] Fix PR35618: Instcombine hangs on single minmax load bitcast.
If we have pattern `store (load(bitcast(select (cmp(V1, V2), &V1,
&V2)))), bitcast)`, but the load is used in other instructions, it leads
to looping in InstCombiner. Patch adds additional check that all users
of the load instructions are stores and then replaces all uses of load
instruction by the new one with new type.

Reviewers: RKSimon, spatel, majnemer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D41072

llvm-svn: 320483
2017-12-12 15:03:17 +00:00
Ilya Biryukov ef3191fcfd [clangd] Removed unused variable. NFC
llvm-svn: 320482
2017-12-12 14:15:01 +00:00
Ayman Musa c2eed926b0 [X86] Recognize constant arrays with special values and replace loads from it with subtract and shift instructions, which then will be replaced by X86 BZHI machine instruction.
Recognize constant arrays with the following values:
  0x0, 0x1, 0x3, 0x7, 0xF, 0x1F, .... , 2^(size - 1) -1
where //size// is the size of the array.

the result of a load with index //idx// from this array is equivalent to the result of the following:
  (0xFFFFFFFF >> (sub 32, idx))             (assuming the array of type 32-bit integer).

And the result of an 'AND' operation on the returned value of such a load and another input, is exactly equivalent to the X86 BZHI instruction behavior.

See test cases in the LIT test for better understanding.

Differential Revision: https://reviews.llvm.org/D34141

llvm-svn: 320481
2017-12-12 14:13:51 +00:00
Anna Thomas 2dd9835f35 [InstComineLoadStoreAlloca] Optimize stores to GEP off null base
Summary:
Currently, in InstCombineLoadStoreAlloca, we have simplification
rules for the following cases:
  1. load off a null
  2. load off a GEP with null base
  3. store to a null

This patch adds support for the fourth case which is store into a
GEP with null base. Since this is UB as well (and directly analogous to
the load off a GEP with null base), we can substitute the stored val
with undef in instcombine, so that SimplifyCFG can optimize this code
into unreachable code.

Note: Right now, simplifyCFG hasn't been taught about optimizing
this to unreachable and adding an llvm.trap (this is already done for
the above 3 cases).

Reviewers: majnemer, hfinkel, sanjoy, davide

Reviewed by: sanjoy, davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D41026

llvm-svn: 320480
2017-12-12 14:12:33 +00:00
Krasimir Georgiev 11ef531b5c [clang-format] Improve ObjC headers detection.
This patch improves detection of ObjC header files.
Right now many ObjC headers, especially short ones, are categorized as C/C++.

Way of filtering still isn't the best, as most likely it should be token-based.

Contributed by jolesiak!

llvm-svn: 320479
2017-12-12 13:43:59 +00:00
Peter Smith 2128df7e7b [ELF] Refactor to remove loop copying all Sections in OS->finalize() [NFC]
Moving the SHF_LINK_ORDER processing out of OutputSection::finalize()
means that we no longer need to copy all InputSections as we now only need
the first one.

Differential Revision: https://reviews.llvm.org/D40966

llvm-svn: 320478
2017-12-12 13:38:51 +00:00
Peter Smith 03cbf468cd [ELF] Move SHF_LINK_ORDER processing earlier in Writer.cpp [NFC]
By moving this step before thunk creation and other processing that depends
on the size of sections, we permit removal of duplicates in the .ARM.exidx
section.

Differential Revision: https://reviews.llvm.org/D40964

llvm-svn: 320477
2017-12-12 13:30:44 +00:00
Ilya Biryukov 9b5ffc22f6 [clangd] clang-format the code. NFC
llvm-svn: 320476
2017-12-12 12:56:46 +00:00
Nemanja Ivanovic 6479c72fcd [PowerPC] Add branch flag on asm parser-only branch instructions
This flag was missing but it wasn't an issue as nothing depended on it
for these asm parser-only instructions. Now that LLDB support is slowly
landing, it is important to get this right.
Committing on behalf of Leonardo Bianconi.

Differential revision: https://reviews.llvm.org/D40846

llvm-svn: 320475
2017-12-12 12:33:09 +00:00
Ilya Biryukov 0e6a51f4f3 [clangd] Document highlights for clangd
Summary: Implementation of Document Highlights Request as described in
LSP.

Contributed by William Enright (nebiroth).

Reviewers: malaperle, krasimir, bkramer, ilya-biryukov

Reviewed By: malaperle

Subscribers: mgrang, sammccall, klimek, ioeric, rwols, cfe-commits, arphaman, ilya-biryukov

Differential Revision: https://reviews.llvm.org/D38425

llvm-svn: 320474
2017-12-12 12:27:47 +00:00
Nemanja Ivanovic b0783cccb7 [PowerPC] Follow-up to r318436 to get the missed CSE opportunities
The last of the three patches that https://reviews.llvm.org/D40348 was
broken up into.
Canonicalize the materialization of constants so that they are more likely
to be CSE'd regardless of the bit-width of the use. If a constant can be
materialized using PPC::LI, materialize it the same way always.
For example:
  li 4, -1
  li 4, 255
  li 4, 65535
are equivalent if the uses only use the low byte. Canonicalize it to the
first form.

Differential Revision: https://reviews.llvm.org/D40348

llvm-svn: 320473
2017-12-12 12:09:34 +00:00
James Henderson 8d0efdd5db [ELF] Reset OutputSection size prior to processing linker script commands
The size of an OutputSection is calculated early, to aid handling of compressed
debug sections. However, subsequent to this point, unused synthetic sections are
removed. In the event that an OutputSection, from which such an InputSection is
removed, is still required (e.g. because it has a symbol assignment), and no longer
has any InputSections, dot assignments, or BYTE()-family directives, the size
member is never updated when processing the commands. If the removed InputSection
had a non-zero size (such as a .got.plt section), the section ends up with the
wrong size in the output.

The fix is to reset the OutputSection size prior to processing the linker script
commands relating to that OutputSection. This ensures that the size is correct even
in the above situation.

Additionally, to reduce the risk of developers misusing OutputSection Size and
InputSection OutSecOff, they are set to simply the number of InputSections in an
OutputSection, and the corresponding index respectively. We cannot completely
stop using them, due to SHF_LINK_ORDER sections requiring them.

Compressed debug sections also require the full size. This is now calculated in
maybeCompress for these kinds of sections.

Reviewers: ruiu, rafael

Differential Revision: https://reviews.llvm.org/D38361

llvm-svn: 320472
2017-12-12 11:51:13 +00:00
Eric Liu 06d3402816 [SemaCodeComplete] Allow passing out scope specifiers in qualified-id completions via completion context.
Reviewers: ilya-biryukov, arphaman

Reviewed By: arphaman

Subscribers: nik, cfe-commits

Differential Revision: https://reviews.llvm.org/D40563

llvm-svn: 320471
2017-12-12 11:35:46 +00:00
Simon Pilgrim 0f8a5a41cf Revert r320461 - causing ICE in windows buildss
[X86] Use regular expressions more aggressively to reduce the number of scheduler entries needed for FMA3 instructions.

When the scheduler tables are generated by tablegen, the instructions are divided up into groups based on their default scheduling information and how they are referenced by groups for each processor. For any set of instructions that are matched by a specific InstRW line, that group of instructions is guaranteed to not be in a group with any other instructions. So in general, the more InstRW class definitions are created, the more groups we end up with in the generated files. Particularly if a lot of the InstRW lines only match to single instructions, which is true of a large number of the Intel scheduler models.

This change alone reduces the number of instructions groups from ~6000 to ~5500. And there's lots more we could do.

llvm-svn: 320470
2017-12-12 11:34:25 +00:00
Jonas Devlieghere f0945f48bd [dsymutil] Accept line tables up to DWARFv5.
This patch removes the hard-coded check for DWARFv2 line tables. Now
dsymutil accepts line tables for DWARF versions 2 to 5 (inclusive).

Differential revision: https://reviews.llvm.org/D41084

rdar://35968319

llvm-svn: 320469
2017-12-12 11:32:21 +00:00
Ilya Biryukov 657159c273 [clangd] Introduced a Context that stores implicit data
Summary:
It will be used to pass around things like Logger and Tracer throughout
clangd classes.

Reviewers: sammccall, ioeric, hokein, bkramer

Reviewed By: sammccall

Subscribers: klimek, bkramer, mgorny, cfe-commits

Differential Revision: https://reviews.llvm.org/D40485

llvm-svn: 320468
2017-12-12 11:16:45 +00:00
Eugene Leviant d53f3da772 Revert r320464 as it breaks gold plugin tests
llvm-svn: 320467
2017-12-12 10:12:46 +00:00
Igor Laevsky d63560b817 Revert r320049, r320014 and r319894
They were causing failures of the piglit OpenGL tests with AMD GPUs using the
Mesa radeonsi driver.

llvm-svn: 320466
2017-12-12 10:03:39 +00:00
Serguei Katkov f4ceb77cd9 [NFC][SafepointIRVerifier] Add alias for set of available values
Introduces usage of AvailableValueSet alias name instead of
DenseSet<const Value *> for better reading.

Patch Author: Daniil Suchkov
Reviewers: mkazantsev, anna, apilipenko
Reviewed By: anna
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D41002

llvm-svn: 320465
2017-12-12 09:44:41 +00:00
Eugene Leviant 3695183395 [ThinLTO] Remove unused code from thinLTOInternalizeModule
Differential revision: https://reviews.llvm.org/D40970

llvm-svn: 320464
2017-12-12 09:12:32 +00:00
Dorit Nuzman 927b31600e [LV] Ignore the cost of values that will not appear in the vectorized loop
VecValuesToIgnore holds values that will not appear in the vectorized loop.
We should therefore ignore their cost when VF > 1.

Differential Revision: https://reviews.llvm.org/D40883

llvm-svn: 320463
2017-12-12 08:57:43 +00:00
Martin Storsjo 2b964108a0 [COFF] Don't error out on undefined references to __enclave_config
This is required for linking the CRT from MSVC 2017 15.5.

Differential Revision: https://reviews.llvm.org/D41089

llvm-svn: 320462
2017-12-12 08:22:29 +00:00
Craig Topper c8e64ab539 [X86] Use regular expressions more aggressively to reduce the number of scheduler entries needed for FMA3 instructions.
When the scheduler tables are generated by tablegen, the instructions are divided up into groups based on their default scheduling information and how they are referenced by groups for each processor. For any set of instructions that are matched by a specific InstRW line, that group of instructions is guaranteed to not be in a group with any other instructions. So in general, the more InstRW class definitions are created, the more groups we end up with in the generated files. Particularly if a lot of the InstRW lines only match to single instructions, which is true of a large number of the Intel scheduler models.

This change alone reduces the number of instructions groups from ~6000 to ~5500. And there's lots more we could do.

llvm-svn: 320461
2017-12-12 08:17:04 +00:00
Mikael Holmen 66cf383761 [CallSiteSplitting] Don't let debug intrinsics affect optimizations
Summary:
This solves PR35616.

We don't want the compiler to generate different code when we compile
with/without -g, so we now ignore debug intrinsics when determining if
the optimization can trigger or not.

Reviewers: junbuml

Subscribers: davide, JDevlieghere, llvm-commits

Differential Revision: https://reviews.llvm.org/D41068

llvm-svn: 320460
2017-12-12 07:29:57 +00:00
Craig Topper 468a813315 [X86] Use Ld scheduler classes for instructions with folded loads.
llvm-svn: 320459
2017-12-12 07:06:35 +00:00
Craig Topper c1e72c019d [X86] Correct the FMA3 regular expressions in the znver1 scheduler model.
llvm-svn: 320458
2017-12-12 07:06:32 +00:00
Tony Tye a697880b38 [AMDGPU] Rename Bonaire target to be gfx704; remove gfx800 and make Iceland and Tonga both use gfx802; update target feature handling
Correct committed version to match intended accepted review D40051 id=123417

- Rename Bonaire target to be gfx704.
- Eliminate gfx800 and make Iceland and Tonga both use gfx802 as they use the same code.
- List target features supported by each processor in the processor table together with the default value.
- Add xnack flag to e_flags.
- Remove xnack from kernel metadata and kernel descriptor since it is now a whole code object property.

Differential Revision: https://reviews.llvm.org/D40051

llvm-svn: 320457
2017-12-12 05:47:00 +00:00
Vedant Kumar 08ff404308 Avoid module import in a textual header, NFC
This unbreaks the lldb modules build (-DLLVM_ENABLE_MODULES=On).

llvm-svn: 320456
2017-12-12 03:27:13 +00:00
Artem Dergachev e67a575dfb [analyzer] StackAddrEscape: For now, disable the new async escape checks.
The new check introduced in r318705 is useful, but suffers from a particular
class of false positives, namely, it does not account for
dispatch_barrier_sync() API which allows one to ensure that the asyncronously
executed block that captures a pointer to a local variable does not actually
outlive that variable.

The new check is split into a separate checker, under the name of
alpha.core.StackAddressAsyncEscape, which is likely to get enabled by default
again once these positives are fixed. The rest of the StackAddressEscapeChecker
is still enabled by default.

Differential Revision: https://reviews.llvm.org/D41042

llvm-svn: 320455
2017-12-12 02:59:09 +00:00
Davide Italiano 074f858da7 [TestModulesInlineFunctions] This test now passes.
Remove yet another spurious unexpected success.
Ack'ed by Jim Ingham.

Fixes PR25743.

llvm-svn: 320454
2017-12-12 02:52:01 +00:00
Davide Italiano 4b13d8bdf3 [TestCppScope] This test now passes on Darwin.
I tested on x86-64 and Jason on embedded architectures.
This cleans up another couple of reported unexpected successes.

<rdar://problem/28623427>

llvm-svn: 320452
2017-12-12 02:32:49 +00:00
Artem Dergachev 3ef5deb3a7 [analyzer] In getSVal() API, disable auto-detection of void type as char type.
This is a follow-up from r314910. When a checker developer attempts to
dereference a location in memory through ProgramState::getSVal(Loc) or
ProgramState::getSVal(const MemRegion *), without specifying the second
optional QualType parameter for the type of the value he tries to find at this
location, the type is auto-detected from location type. If the location
represents a value beyond a void pointer, we thought that auto-detecting the
type as 'char' is a good idea. However, in most practical cases, the correct
behavior would be to specify the type explicitly, as it is available from other
sources, and the few cases where we actually need to take a 'char' are
workarounds rather than an intended behavior. Therefore, try to fail with an
easy-to-understand assertion when asked to read from a void pointer location.

Differential Revision: https://reviews.llvm.org/D38801

llvm-svn: 320451
2017-12-12 02:27:55 +00:00
Davide Italiano e8d85eaaa7 [testsuite] Remove even more testing vestiges.
With this one, the number of unexpected successes for the LLDB
test suite when building with clang ToT goes down to 18.

llvm-svn: 320450
2017-12-12 02:10:23 +00:00
Rafael Espindola 8f619ab826 Compact symbols from 96 to 88 bytes.
By using an index instead of a pointer for verdef we can put the index
next to the alignment field. This uses the otherwise wasted area and
reduces the shared symbol size.

By itself the performance change of this is in the noise, but I have a
followup patch to remove another 8 bytes that improves performance
when combined with this.

llvm-svn: 320449
2017-12-12 01:45:49 +00:00
Rafael Espindola 814ece6854 Add an option for ICFing data.
An internal linker has support for merging identical data and in some
cases it can be a significant win.

This is behind an off by default flag so it has to be requested
explicitly.

llvm-svn: 320448
2017-12-12 01:36:24 +00:00
Davide Italiano ee710e1d00 Rollback [Testsuite] Rename this file from *m -> *mm.
After discussing this with Jim and Jason, I think my commit was
actually sweeping the issue under the carpet rather than fixing it.
I'll take a closer look between tonight and tomorrow.

llvm-svn: 320447
2017-12-12 01:21:43 +00:00
Petr Hosek 95d7a4197a [CMake] Support runtimes and monorepo layouts when looking for libcxx
This also slightly refactors the code that's checking the directory
presence which allows eliminating one unnecessary variable.

Differential Revision: https://reviews.llvm.org/D40637

llvm-svn: 320446
2017-12-12 01:20:52 +00:00
Petr Hosek 2ffea93c57 [libcxxabi] Pass LIBCXXABI_SYSROOT and LIBCXXABI_GCC_TOOLCHAIN to lit
These are expected to be set by the shared lit scripts used from libc++.

Differential Revision: https://reviews.llvm.org/D40818

llvm-svn: 320445
2017-12-12 01:20:37 +00:00
Davide Italiano 53cff5161c [testsuite] Remove testing failures vestiges.
Some tests are failing on macOS when building with the in-tree
clang, and this is because they're conditional on the version released.
Apple releases using a different versioning number, but as these are
conditional on clang < 7, they fail for clang ToT (which is 6.0).
As a general solution, we actually need either a mapping between
Apple internal release version and public ones.

That said, I discussed this with Fred , and Apple Clang 6.0 seems
to be old enough that we can remove this altogether (which means I
can delay implementing the general purpose solution for a bit).

Differential Revision:  https://reviews.llvm.org/D41101

llvm-svn: 320444
2017-12-12 01:14:11 +00:00
Shoaib Meenai ac75523108 [lldb] Switch to add_llvm_install_targets
This adds the install-*-stripped targets to LLDB, which are required for
the install-distribution-stripped option. We also need to create some
install-*-stripped targets manually, which are modeled after their
corresponding install-* targets.

Differential Revision: https://reviews.llvm.org/D41099

llvm-svn: 320443
2017-12-12 00:47:07 +00:00
Petr Hosek 17d71c014c [ELF] Use shell to check the file permissions
This is less error-prone to mask settings than stat.

Differential Revision: https://reviews.llvm.org/D41097

llvm-svn: 320442
2017-12-12 00:31:46 +00:00
Sam Clegg f2356b3c05 [WebAssembly] Check more details in call-indirect test. NFC.
Also make function bodies unique so they can be distinguished
in the output.  This is helpful for adding support for --gc-sections.

Differential Revision: https://reviews.llvm.org/D41093

llvm-svn: 320441
2017-12-12 00:22:21 +00:00
Vedant Kumar 7a911b5851 [llvm-cov] Simplify a test case. NFC.
llvm-svn: 320439
2017-12-11 23:34:50 +00:00
Petr Hosek d663de3e18 [ELF] Don't set the executable bit for relocatable files
These are not executable files so they shouldn't be marked as such.

Differential Revision: https://reviews.llvm.org/D41041

llvm-svn: 320438
2017-12-11 23:30:54 +00:00
Jake Ehrlich 0ca350a92d [ELF] Change default output section type to SHT_NOBITS
When an output section has no byte commands and has no input sections then it
would be ideal if the type of the section is SHT_NOBITS so that the file can
take up less space. This change sets the default type of of output sections to
SHT_NOBITS instead of SHT_PROGBITS to allow this. This required some minor test
changes (which double as tests for this new behavior) but extend-pt-load.s had
be changed in a non-trivial way. Since it seems to me that the point of the
test is to point out the consequences of how flags are assigned to output
sections that don't have input sections I changed the test to work and still
show how the memsize of the executable segment was changed.

Differential Revision: https://reviews.llvm.org/D41082

llvm-svn: 320437
2017-12-11 23:25:27 +00:00
Rui Ueyama 6074e6b094 Remove redundant local variables.
llvm-svn: 320436
2017-12-11 23:19:11 +00:00
Max Moroz fe4d904917 [llvm-cov] Add an option for "export" command to emit only file summary data.
Summary:
That allows to get the same data as produced by "llvm-cov report",
but in JSON format, which is better for further processing by end users.

Reviewers: vsk

Reviewed By: vsk

Differential Revision: https://reviews.llvm.org/D41085

llvm-svn: 320435
2017-12-11 23:17:46 +00:00