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3 Commits

Author SHA1 Message Date
Evan Cheng a20a773654 Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode. 
Before:
_main:
        subq    $8, %rsp
        leaq    _X(%rip), %rax
        movsd   8(%rax), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret
Now:
_main:
        subq    $8, %rsp
        movsd   _X+8(%rip), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret

Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl    %ecx, %ecx
movl    %ecx, %eax

llvm-svn: 46850
 2008-02-07 08:53:49 +00:00
Evan Cheng 05b94b8c13 Fix tests. 
llvm-svn: 43961
 2007-11-09 20:46:00 +00:00
Reid Spencer 83b3d82672 Regression is gone, don't try to find it on clean target. 
llvm-svn: 33296
 2007-01-17 07:59:14 +00:00