1f57cc4a59
add FIXME
...
llvm-svn: 114578
2010-09-22 20:55:15 +00:00
284eebc1ae
Add MC instruction printer support for ARM and Thumb1 jump tables.
...
llvm-svn: 114555
2010-09-22 17:39:48 +00:00
1573b29ea7
Add MC instruction printer support for TB[BH] style thumb2 jump tables.
...
llvm-svn: 114553
2010-09-22 17:15:35 +00:00
754e1efffc
Clean up comment.
...
llvm-svn: 114550
2010-09-22 16:45:13 +00:00
d64f9b8381
Add start of support for MC instruction printer of ARM jump tables. Filling in
...
the rest of it is next up.
llvm-svn: 114500
2010-09-21 23:28:16 +00:00
cbac342e1a
Fix errant printing of [v]ldm instructions that aren't a pop
...
llvm-svn: 114445
2010-09-21 16:45:31 +00:00
af5d63583e
factor out a simple helper function to create a label for PC-relative
...
instructions (PICADD, PICLDR, et.al.)
llvm-svn: 114243
2010-09-18 00:05:05 +00:00
3d97920829
Add MC-inst handling for tPICADD
...
llvm-svn: 114237
2010-09-17 23:41:53 +00:00
7a6c37d3e7
Teach the (non-MC) instruction printer to use the cannonical names for push/pop,
...
and shift instructions on ARM. Update the tests to match.
llvm-svn: 114230
2010-09-17 22:36:38 +00:00
132a0ce787
Hook up verbose asm comment printing for SOImm operands in MC printer
...
llvm-svn: 114215
2010-09-17 21:33:25 +00:00
0d35df1cfe
handle the upper16/lower16 target operand flags on symbol references for MC
...
instruction lowering.
llvm-svn: 114191
2010-09-17 18:25:25 +00:00
a7d430b51c
expand PICLDR MC lowering to handle other PICLDR and PICSTR versions.
...
llvm-svn: 114183
2010-09-17 16:25:52 +00:00
218e22da8b
MC-ization of the PICLDR pseudo. Next up, adding the other variants
...
(PICLDRB, et. al.) and PICSTR*
llvm-svn: 114098
2010-09-16 17:43:25 +00:00
a625b0110b
Remove support for "dregpair" operand modifier, now that it is no longer being
...
used for anything.
llvm-svn: 114067
2010-09-16 04:55:00 +00:00
40e85fbf17
move getRegisterNumbering() to out of ARMBaseRegisterInfo into the helper
...
functions in ARMBaseInfo.h so it can be used in the MC library as well.
For anything bigger than this, we may want a means to have a small support
library for shared helper functions like this. Cross that bridge when we
come to it.
llvm-svn: 114016
2010-09-15 20:26:25 +00:00
a244f70113
Add predicate and 's' bit operands to PICADD instruction lowering.
...
llvm-svn: 113860
2010-09-14 21:28:17 +00:00
7ae94222cd
fix comment typo
...
llvm-svn: 113856
2010-09-14 21:05:34 +00:00
8ee5cd99ef
Remove trailing whitespace
...
llvm-svn: 112790
2010-09-02 01:02:06 +00:00
13ce07fa92
Change ARM VFP VLDM/VSTM instructions to use addressing mode #4 , just like
...
all the other LDM/STM instructions. This fixes asm printer crashes when
compiling with -O0. I've changed one of the NEON tests (vst3.ll) to run
with -O0 to check this in the future.
Prior to this change VLDM/VSTM used addressing mode #5 , but not really.
The offset field was used to hold a count of the number of registers being
loaded or stored, and the AM5 opcode field was expanded to specify the IA
or DB mode, instead of the standard ADD/SUB specifier. Much of the backend
was not aware of these special cases. The crashes occured when rewriting
a frameindex caused the AM5 offset field to be changed so that it did not
have a valid submode. I don't know exactly what changed to expose this now.
Maybe we've never done much with -O0 and NEON. Regardless, there's no longer
any reason to keep a count of the VLDM/VSTM registers, so we can use
addressing mode #4 and clean things up in a lot of places.
llvm-svn: 112322
2010-08-27 23:18:17 +00:00
481d7a9ab4
Rename sat_shift operand to shift_imm, in preparation for using it for other
...
instructions besides saturate instructions. No functional changes.
llvm-svn: 111168
2010-08-16 18:27:34 +00:00
8e8f1c133a
Cleaned up the for-disassembly-only entries in the arm instruction table so that
...
the memory barrier variants (other than 'SY' full system domain read and write)
are treated as one instruction with option operand.
llvm-svn: 110951
2010-08-12 20:46:17 +00:00
add513112a
Move the ARM SSAT and USAT optional shift amount operand out of the
...
instruction opcode. This also fixes part of PR7792.
llvm-svn: 110875
2010-08-11 23:10:46 +00:00
97886d59d1
ARM "rrx" shift operands do not have an immediate. PR7790.
...
llvm-svn: 110292
2010-08-05 00:34:42 +00:00
a52ddc496a
Implement target specific getDebugValueLocation().
...
llvm-svn: 110267
2010-08-04 22:39:39 +00:00
b128824b60
Move newlines before inline jumptables from the asm strings in .td files to
...
the jtblock_operand print methods. This avoids extra newlines in the
disassembler's output. PR7757.
llvm-svn: 109948
2010-07-31 06:28:10 +00:00
4320e2d1bb
Add the __TEXT,__StaticInit section to the list of sections emitted at the
...
beginning on ARM Darwin assembly files so that it won't be placed after
debug sections. Radar 8252813.
llvm-svn: 109879
2010-07-30 19:55:47 +00:00
965a73a28c
For ARM/Darwin, add a dwarf entry indicating whether a function is arm or thumb
...
rdar://8202967
llvm-svn: 109057
2010-07-21 23:03:52 +00:00
b792b463af
sink the arm implementations of ASmPrinter and MCInstLower
...
out of the AsmPrinter directory into libarm. Now the
ARM InstPrinters depend jsut on the MC stuff, not on vmcore
or codegen.
llvm-svn: 108783
2010-07-19 23:44:46 +00:00
17d28de8ac
Move ARM to pluggable asmprinter
...
llvm-svn: 54889
2008-08-17 13:55:10 +00:00
ed47329174
Handle visibility printing with all generality. Remove bunch of duplicate code.
...
llvm-svn: 54540
2008-08-08 18:25:07 +00:00
df8c7faf60
Undo most of r54519.
...
llvm-svn: 54534
2008-08-08 17:56:50 +00:00
655fa0fec4
It's not legal to output a GV in a coalesced section if it's used in an ARM PIC relative constantpool.
...
llvm-svn: 54519
2008-08-08 06:56:16 +00:00
04083529df
Switch ARM to new section handling stuff
...
llvm-svn: 54458
2008-08-07 09:54:23 +00:00
c4650f4b56
Emit debug info for data-only files. ARM version.
...
llvm-svn: 53360
2008-07-09 21:20:54 +00:00
49c8e68e4c
Back out 53254. It broke ppc debug info codegen.
...
llvm-svn: 53280
2008-07-09 06:36:53 +00:00
b9097a71d4
Make debug info come out in data-only files.
...
This is a question of the debugging setup code not
being called at the right time, and it's called from
target-dependent code for some reason. I have only
attempted to fix Darwin, but I'm pretty sure it's
broken elsewhere; I'll leave that to people who can
test it.
llvm-svn: 53254
2008-07-08 21:56:22 +00:00
c7fc432b19
Minor const-correctness fixes.
...
llvm-svn: 53196
2008-07-07 20:06:06 +00:00
5bf742f2aa
Handle quoted names when constructing $stub's,
...
$non_lazy_ptr's and $lazy_ptr's.
llvm-svn: 51277
2008-05-19 21:38:18 +00:00
c799065cc3
Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.
...
llvm-svn: 47703
2008-02-28 00:43:03 +00:00
c24ea4fb41
Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
...
would have been a Godsend here!
llvm-svn: 47625
2008-02-26 21:11:01 +00:00
7b1431785b
Handle \n's in value names for more targets. The asm printers
...
really really really need refactoring :(
llvm-svn: 47171
2008-02-15 19:04:54 +00:00
ffde4ff5b1
__DATA not __DATA__ is the right segment name on darwin.
...
Spotted by Nick Kledzik.
llvm-svn: 47037
2008-02-12 23:35:09 +00:00
3a4be0fdef
Rename MRegisterInfo to TargetRegisterInfo.
...
llvm-svn: 46930
2008-02-10 18:45:23 +00:00
32e5347eb8
Get rid of the annoying blank lines before labels.
...
llvm-svn: 46667
2008-02-02 08:39:46 +00:00
96a1b810ec
If the function has no machine instructions, then emit a "nop" so that
...
the function label isn't associated with something it shouldn't be.
llvm-svn: 46449
2008-01-28 09:15:03 +00:00
7f1ff5fedd
Honor explicit section information on Darwin.
...
llvm-svn: 46267
2008-01-23 00:58:14 +00:00
8ef89eabc2
Revert the part of 45849 that treated weak globals
...
as weak globals rather than commons. While not wrong,
this change tickled a latent bug in Darwin's strip,
so revert it for now as a workaround.
llvm-svn: 46147
2008-01-17 23:36:04 +00:00
193daf0698
Weak zeroes don't go in bss on Darwin.
...
llvm-svn: 45849
2008-01-11 01:59:45 +00:00
a5bb370aa4
Add new shorter predicates for testing machine operands for various types:
...
e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
llvm-svn: 45464
2007-12-30 23:10:15 +00:00
5c4637816e
Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
...
llvm-svn: 45453
2007-12-30 20:49:49 +00:00
f3ebc3f3d2
Remove attribution from file headers, per discussion on llvmdev.
...
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
797d56ff17
Much improved pic jumptable codegen:
...
Then:
call "L1$pb"
"L1$pb":
popl %eax
...
LBB1_1: # entry
imull $4, %ecx, %ecx
leal LJTI1_0-"L1$pb"(%eax), %edx
addl LJTI1_0-"L1$pb"(%ecx,%eax), %edx
jmpl *%edx
.align 2
.set L1_0_set_3,LBB1_3-LJTI1_0
.set L1_0_set_2,LBB1_2-LJTI1_0
.set L1_0_set_5,LBB1_5-LJTI1_0
.set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2
Now:
call "L1$pb"
"L1$pb":
popl %eax
...
LBB1_1: # entry
addl LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
jmpl *%eax
.align 2
.set L1_0_set_3,LBB1_3-"L1$pb"
.set L1_0_set_2,LBB1_2-"L1$pb"
.set L1_0_set_5,LBB1_5-"L1$pb"
.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2
llvm-svn: 43924
2007-11-09 01:32:10 +00:00
1a30c18e88
[ARM] Fix code generation for:
...
static __thread struct {
int a;
int b;
} teste = {0, 0};
llvm-svn: 43722
2007-11-05 18:33:37 +00:00
283207a71c
Eliminate the remaining uses of getTypeSize. This
...
should only effect x86 when using long double. Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment). This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.
llvm-svn: 43688
2007-11-05 00:04:43 +00:00
cdf3609130
Revert 42908 for now.
...
llvm-svn: 42960
2007-10-14 05:57:21 +00:00
dc35bd79ca
Change the names used for internal labels to use the current
...
function symbol name instead of a codegen-assigned function
number.
Thanks Evan! :-)
llvm-svn: 42908
2007-10-12 14:53:36 +00:00
c731c97fac
Use empty() member functions when that's what's being tested for instead
...
of comparing begin() and end().
llvm-svn: 42585
2007-10-03 19:26:29 +00:00
0b7cf862bc
AsmPrinters overriding getAnalysisUsage should call super.
...
And not super's super, either.
llvm-svn: 42482
2007-09-30 13:39:29 +00:00
1ff71872c2
Honor user-defined section specification of a global, ignores whether its initializer is null.
...
llvm-svn: 42182
2007-09-21 00:41:19 +00:00
cf0a5349de
Don't ignore the return value of AsmPrinter::doInitialization and
...
AsmPrinter::doFinalization.
llvm-svn: 40487
2007-07-25 19:33:14 +00:00
0a42fdf346
Print the s bit if the instruction is toggled to its CPSR setting form.
...
llvm-svn: 37932
2007-07-06 01:01:34 +00:00
485531ea9b
Quote complex names for Darwin X86 and ARM.
...
llvm-svn: 37700
2007-06-22 00:54:56 +00:00
5c48958a61
Print predicate of the second instruction of the two-piece constant MI.
...
llvm-svn: 37437
2007-06-05 18:55:18 +00:00
252695f0f6
PIC label asm printing cosmetic changes.
...
llvm-svn: 37434
2007-06-05 07:36:38 +00:00
3e3ff30aa2
Fix the asmprinter so that a globalvalue can specify an explicit alignment
...
smaller than the preferred alignment, but so that the target can actually
specify a minimum alignment if needed. This fixes some objc protocol
failures Devang tracked down.
llvm-svn: 37373
2007-05-31 18:57:45 +00:00
0f7cbe8370
Add PredicateOperand to all ARM instructions that have the condition field.
...
llvm-svn: 37066
2007-05-15 01:29:07 +00:00
9c031c0ddf
Switch BCC, MOVCCr, etc. to PredicateOperand.
...
llvm-svn: 36948
2007-05-08 21:08:43 +00:00
23040754b0
Should never see an indexed load / store with zero offset.
...
llvm-svn: 36714
2007-05-03 23:30:36 +00:00
83930198dd
Debug support for arm-linux.
...
Patch by Raul Herbster.
llvm-svn: 36690
2007-05-03 20:28:35 +00:00
9a8c7cf00b
add support for printing offset from global
...
llvm-svn: 36669
2007-05-03 16:42:23 +00:00
2c673ad7ef
Enable protected visibility on ARM.
...
llvm-svn: 36583
2007-04-30 00:23:51 +00:00
c39c12a3fa
ARM TLS: implement "general dynamic", "initial exec" and "local exec" models.
...
llvm-svn: 36506
2007-04-27 13:54:47 +00:00
4ae9425bb6
remember to emit weak reference in one more case.
...
llvm-svn: 36438
2007-04-25 14:50:40 +00:00
ed0ecdb7ff
add Align field, and use when generating function alignment
...
llvm-svn: 36371
2007-04-23 20:07:25 +00:00
ee2d164f0f
Implement PIC for arm-linux.
...
llvm-svn: 36324
2007-04-22 00:04:12 +00:00
1e150dedd1
Implement inline asm modifier P.
...
llvm-svn: 35640
2007-04-04 00:13:29 +00:00
8f592160c0
Add support for hidden visibility to darwin/arm.
...
llvm-svn: 35448
2007-03-29 07:49:34 +00:00
9e7b838469
Make two piece constant generation as a single instruction. It's re-materialized as a load from constantpool.
...
llvm-svn: 35207
2007-03-20 08:11:30 +00:00
ea28fc5dc4
Implement inline asm modifier c.
...
llvm-svn: 35035
2007-03-08 22:42:46 +00:00
ddf082082c
Putting more constants which do not contain relocations into .literal{4|8|16}
...
llvm-svn: 35026
2007-03-08 08:31:54 +00:00
d918477ac3
For Darwin, put constant data into .const, .const_data, .literal{4|8|16}
...
sections.
llvm-svn: 35017
2007-03-08 01:25:25 +00:00
65c75b57d4
Get rid of verboten <iostream> include.
...
llvm-svn: 34777
2007-03-01 06:05:39 +00:00
903e01d407
Fix .thumb_func directive on linux.
...
llvm-svn: 33759
2007-02-01 18:25:34 +00:00
ed81dea45b
Don't emit unnecessary .align directive.
...
llvm-svn: 33729
2007-01-31 23:39:39 +00:00
83f35170fa
- Fix codegen for pc relative constant (e.g. JT) in thumb mode:
...
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
add r1, pc, #PCRELV0
This is not legal since add r1, pc, #c requires the constant be a multiple of 4.
Do the following instead:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
mov r1, #PCRELV0
add r1, pc
- In thumb mode, it's not possible to use .set generate a pc relative stub
address. The stub is ARM code which is in a different section from the thumb
code. Load the value from a constpool instead.
- Some asm printing clean up.
llvm-svn: 33664
2007-01-30 20:37:08 +00:00
5301e7c605
For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid
...
confusion with external linkage types.
llvm-svn: 33663
2007-01-30 20:08:39 +00:00
0e083d0161
Darwin -static should codegen static ctors / dtors to .constructor / .destructor sections.
...
llvm-svn: 33657
2007-01-30 08:04:53 +00:00
1cd3c0efb8
Change the operand orders to t_addrmode_s* to make it easier to morph
...
instructions that use these address modes to instructions that use
t_addrmode_sp.
llvm-svn: 33651
2007-01-30 02:35:32 +00:00
0701c5a074
Thumb jumptable support.
...
llvm-svn: 33568
2007-01-27 02:29:45 +00:00
c56315c2b5
Change the MachineDebugInfo to MachineModuleInfo to better reflect usage
...
for debugging and exception handling.
llvm-svn: 33550
2007-01-26 21:22:28 +00:00
aa26c1ab9d
If the constant pool value is a extern weak symbol, emit the weak reference.
...
llvm-svn: 33543
2007-01-26 19:51:32 +00:00
4f7d37fe04
Fix elf object definition.
...
llvm-svn: 33502
2007-01-25 20:11:04 +00:00
c1a1bd18e3
Getting rid uses of evil std::set<>
...
llvm-svn: 33496
2007-01-25 03:07:27 +00:00
c0b7366cf9
- Reorg Thumb load / store instructions. Combine each rr and ri pair of
...
instructions into one (e.g. tLDRrr, tLDRri -> tLDR).
- Thumb ldrsb and ldrsh only have the [reg, reg] address format. If the
address is not an add, materialize a 0 immediate into a register and use
it as the offset field.
llvm-svn: 33470
2007-01-23 22:59:13 +00:00
1199c2d653
Restructure code a bit to make use of continue (simplifying things). Generalize
...
the .zerofill directive emission to not be darwin-specific.
llvm-svn: 33365
2007-01-19 19:25:36 +00:00
75aaf1fa6a
Fix section definition.
...
llvm-svn: 33359
2007-01-19 17:33:22 +00:00
10043e215b
ARM backend contribution from Apple.
...
llvm-svn: 33353
2007-01-19 07:51:42 +00:00
5cfa5ef912
Fix for ARM weak symbols, patch by Lauro Ramos Venancio!
...
llvm-svn: 32740
2006-12-21 22:59:58 +00:00
1ef9cd400d
eliminate static ctors for Statistic objects.
...
llvm-svn: 32703
2006-12-19 22:59:26 +00:00
d7998d0e6d
move ExtWeakSymbols to AsmPrinter
...
llvm-svn: 32648
2006-12-18 03:37:18 +00:00
b8ada08b26
.align is in bits
...
.comm is in bytes
:-(
llvm-svn: 32408
2006-12-10 02:53:14 +00:00
d12d2250a7
%progbits not @progbits
...
llvm-svn: 32376
2006-12-08 22:06:02 +00:00
94f29f129d
add \"aw\",@progbits" to ctors and dtors
...
llvm-svn: 32373
2006-12-08 21:24:58 +00:00
265fa68bd8
fix alignment
...
llvm-svn: 32337
2006-12-07 22:38:06 +00:00
9bfb1e1f29
What should be the last unnecessary <iostream>s in the library.
...
llvm-svn: 32333
2006-12-07 22:21:48 +00:00
219a796475
make sure that we don't use a common symbol if a section was specified
...
llvm-svn: 32310
2006-12-07 18:33:58 +00:00
700b873130
Detemplatize the Statistic class. The only type it is instantiated with
...
is 'unsigned'.
llvm-svn: 32279
2006-12-06 17:46:33 +00:00
776abee608
print weak references
...
llvm-svn: 32276
2006-12-06 13:35:10 +00:00
81cf22d873
These asm printers shouldn't use assembly/writer.h
...
llvm-svn: 32262
2006-12-06 06:13:25 +00:00
2369a024d7
add support for weak linkage
...
llvm-svn: 32222
2006-12-05 17:00:17 +00:00
5f7ab1b964
implement load effective address similar to the alpha backend
...
remove lea_addri and the now unused memri addressing mode
llvm-svn: 31592
2006-11-09 13:58:55 +00:00
708cb60588
initial implementation of addressing mode 2
...
TODO: fix lea_addri
llvm-svn: 31552
2006-11-08 17:07:32 +00:00
ac8668d62f
move ARMCondCodeToString to ARMAsmPrinter.cpp
...
remove unused variables from lowerCall
llvm-svn: 31378
2006-11-02 15:00:02 +00:00
3576405a26
print null values in bss
...
llvm-svn: 31349
2006-11-01 14:26:44 +00:00
ea67b973c2
print common symbols
...
llvm-svn: 31048
2006-10-19 13:30:40 +00:00
19398ec86e
initial implementation of addressing mode 5
...
llvm-svn: 31002
2006-10-17 18:04:53 +00:00
f719c5f43d
expand ISD::SHL_PARTS, ISD::SRA_PARTS and ISD::SRL_PARTS
...
llvm-svn: 30987
2006-10-16 21:10:32 +00:00
a6a570e02f
Pass the MachineFunction into EmitJumpTableInfo.
...
llvm-svn: 30742
2006-10-05 03:01:21 +00:00
4431699187
Use getSectionForFunction.
...
llvm-svn: 30740
2006-10-05 02:49:23 +00:00
3130a756ef
add shifts to addressing mode 1
...
llvm-svn: 30291
2006-09-13 12:09:43 +00:00
e45a79a9e2
partial implementation of the ARM Addressing Mode 1
...
llvm-svn: 30252
2006-09-11 17:25:40 +00:00
ecb0d686f8
call AsmPrinter::doInitialization in ARMAsmPrinter::doInitialization
...
llvm-svn: 30246
2006-09-11 12:49:38 +00:00
fbee8bfe48
Removed unnecessary Mangler creation.
...
llvm-svn: 30239
2006-09-10 21:17:03 +00:00
261779bb45
Make target asm info a property of the target machine.
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llvm-svn: 30162
2006-09-07 22:06:40 +00:00
a6211dcdad
Separate target specific asm properties from the asm printers.
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llvm-svn: 30126
2006-09-06 18:34:40 +00:00
98dc23fd1f
use @ for comments
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store LR in an arbitrary stack slot
add support for writing varargs functions
llvm-svn: 29876
2006-08-25 17:55:16 +00:00
fe03fe9bf4
create a generic bcond instruction that has a conditional code argument
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llvm-svn: 29856
2006-08-24 16:13:15 +00:00
e08b9853cc
initial support for branches
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llvm-svn: 29854
2006-08-24 13:45:55 +00:00
c3ed77e1b9
add a "load effective address"
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llvm-svn: 29748
2006-08-17 17:09:40 +00:00
8b7bd8264b
start comments with #
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move the constant pool to .text
correctly print loads of labels
mark R0, R1, R2 and R3 as caller save
llvm-svn: 29451
2006-08-01 18:53:10 +00:00
95035cf001
implement LowerConstantPool and LowerGlobalAddress
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llvm-svn: 29433
2006-08-01 12:58:43 +00:00
7cc2d19fc1
handle GlobalValue::InternalLinkage in doFinalization
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llvm-svn: 29417
2006-07-31 20:38:13 +00:00
89e5cbd897
emit global constants
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llvm-svn: 29344
2006-07-27 11:38:51 +00:00
75269be065
skeleton of a lowerCall implementation for ARM
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llvm-svn: 29159
2006-07-16 01:02:57 +00:00
185c5c2bdf
add the memri memory operand
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this makes it possible for ldr instructions with non-zero immediate
llvm-svn: 29103
2006-07-11 11:36:48 +00:00
87bc1a9b0b
On ARM, alignment is in bits
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Add lr as a hard coded operand of bx
llvm-svn: 28494
2006-05-26 10:56:17 +00:00
91df1ef41f
implement initial version of ARMAsmPrinter::printOperand
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llvm-svn: 28470
2006-05-25 12:57:06 +00:00
27f8bdc7e5
implement minimal versions of
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ARMAsmPrinter::runOnMachineFunction
LowerFORMAL_ARGUMENTS
ARMInstrInfo::isMoveInstr
llvm-svn: 28431
2006-05-23 02:48:20 +00:00
ffdc24b847
added a skeleton of the ARM backend
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llvm-svn: 28301
2006-05-14 22:18:28 +00:00
Jim Grosbach