Commit Graph

226508 Commits

Author SHA1 Message Date
Jacques Pienaar 4badd6aaf3 [lanai] isBrImm should accept any non-constant immediate.
isBrImm should accept any non-constant immediate. Previously it was only accepting LanaiMCExpr ones which was wrong.

Differential Revision: http://reviews.llvm.org/D18571

llvm-svn: 265032
2016-03-31 17:58:55 +00:00
Ehsan Amiri 99b017ae35 [PPC] basic support for Power 9 direct move instructions
http://reviews.llvm.org/D18097

Initial support does not include any patterns to generate this instructions

llvm-svn: 265031
2016-03-31 17:47:17 +00:00
Rong Xu d5a57b5947 [PGO] use emplace_back. NFC.
Use emplace_back instead of push_back for simplicity.

llvm-svn: 265030
2016-03-31 17:39:33 +00:00
Sanjay Patel 92d5ea5e07 [x86] use SSE/AVX ops for non-zero memsets (PR27100)
Move the memset check down to the CPU-with-slow-SSE-unaligned-memops case: this allows fast
targets to take advantage of SSE/AVX instructions and prevents slow targets from stepping
into a codegen sinkhole while trying to splat a byte into an XMM reg.

Follow-on bugs exposed by the current codegen are:
https://llvm.org/bugs/show_bug.cgi?id=27141
https://llvm.org/bugs/show_bug.cgi?id=27143

Differential Revision: http://reviews.llvm.org/D18566

llvm-svn: 265029
2016-03-31 17:30:06 +00:00
Valery Pykhtin ab962acd59 [AMDGPU] enable few disassembler tests that were mistakenly marked as FIXME.
llvm-svn: 265028
2016-03-31 17:28:46 +00:00
Hans Wennborg a7543ba10c More checks in win32-seh-nested-finally.ll after comment on r264966
llvm-svn: 265027
2016-03-31 16:42:10 +00:00
Ulrich Weigand 6ad762d36f [PowerPC] Attempt to fix fast-isel-i64offset.ll failure
The test case added in r265023 is failing on ninja-x64-msvc-RA-centos6.
Update the test to make less specific assumptions on code generation.

llvm-svn: 265026
2016-03-31 16:38:57 +00:00
Xinliang David Li d0b4cbb9dd Minor code cleanup /NFC
llvm-svn: 265025
2016-03-31 16:22:17 +00:00
Stephan Bergmann 480de227f6 Don't use potentially invalidated iterator
If the lhs is evaluated before the rhs, FuncletI's operator-> can trigger the

  assert(isHandleInSync() && "invalid iterator access!");

at include/llvm/ADT/DenseMap.h:1061.  (Happens e.g. when compiled with GCC 6.)

Differential Revision: http://reviews.llvm.org/D18440

llvm-svn: 265024
2016-03-31 15:42:01 +00:00
Ulrich Weigand 3707ba8030 [PowerPC] Correctly compute 64-bit offsets in fast isel
PPCSimplifyAddress contains this code:

  IntegerType *OffsetTy = ((VT == MVT::i32) ? Type::getInt32Ty(*Context)
                                            : Type::getInt64Ty(*Context));

to determine the type to be used for an index register, if one needs
to be created.  However, the "VT" here is the type of the data being
loaded or stored, *not* the type of an address.  This means that if
a data element of type i32 is accessed using an index that does not
not fit into 32 bits, a wrong address is computed here.

Note that PPCFastISel is only ever used on 64-bit currently, so the type
of an address is actually *always* MVT::i64.  Other parts of the code,
even in this same PPCSimplifyAddress routine, already rely on that fact.
Thus, this patch changes the code to simply unconditionally use
Type::getInt64Ty(*Context) as OffsetTy.

llvm-svn: 265023
2016-03-31 15:37:06 +00:00
Nemanja Ivanovic a621a7f9c3 [PowerPC] Basic support for P9 atomic loads and stores
This patch corresponds to review:
http://reviews.llvm.org/D18032

This patch provides asm implementation for the following instructions:
lwat, ldat, stwat, stdat, ldmx, mcrxrx

llvm-svn: 265022
2016-03-31 15:26:37 +00:00
Jun Bum Lim cf9744367b [AArch64] Handle missing store pair opportunity
Summary:
This change will handle missing store pair opportunity where the first store
instruction stores zero followed by the non-zero store. For example, this change
will convert :

  str wzr, [x8]
  str w1, [x8, #4]
into:
  stp wzr, w1, [x8]

Reviewers: jmolloy, t.p.northover, mcrosier

Subscribers: flyingforyou, aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D18570

llvm-svn: 265021
2016-03-31 14:47:24 +00:00
Ulrich Weigand 1931b01a64 [PowerPC] Remove incorrect use of COPY_TO_REGCLASS in fast isel
The fast isel pass currently emits a COPY_TO_REGCLASS node to convert
from a F4RC to a F8RC register class during conversion of a
floating-point number to integer. There is actually no support in the
common code instruction printers to emit COPY_TO_REGCLASS nodes, so the
PowerPC back-end has special code there to simply ignore
COPY_TO_REGCLASS.

This is correct *if and only if* the source and destination registers of
COPY_TO_REGCLASS are the same (except for the different register class).
But nothing guarantees this to be the case, and if the register
allocator does end up allocating source and destination to different
registers after all, the back-end simply generates incorrect code. I've
included a test case that shows such incorrect code generation.

However, it seems that COPY_TO_REGCLASS is actually not intended to be
used at the MI layer at all. It is used during SelectionDAG, but always
lowered to a plain COPY before emitting MI. Other back-end's fast isel
passes never emit COPY_TO_REGCLASS at all. I suspect it is simply wrong
for the PowerPC back-end to emit it here.

This patch changes the PowerPC back-end to directly emit COPY instead of
COPY_TO_REGCLASS and removes the special handling in the instruction
printers.

Differential Revision: http://reviews.llvm.org/D18605

llvm-svn: 265020
2016-03-31 14:44:50 +00:00
Daniel Sanders 85fd10bd93 [mips] Range check simm16
Summary:
There are too many instructions to exhaustively test so addiu and lwc2 are
used as representative examples.

It should be noted that many memory instructions that should have simm16
range checking do not because it is also necessary to support the macro
of the same name which accepts simm32. The range checks for these occur in
the macro expansion.

Reviewers: vkalintiris

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D18437

llvm-svn: 265019
2016-03-31 14:34:00 +00:00
Daniel Sanders eab3146156 [mips] Range check simm11 and mem_simm11.
Summary:
ldc2/sdc2 now emit slightly worse diagnostics for MIPS-I. The problem
is that they don't trigger the custom parser because all the candidates
are disabled by feature bits. On all other subtargets, the diagnostics are
accurate but are subject to the usual issues of needing to report multiple
ways to correct the code (e.g. smaller offset, enable a CPU feature) but
only being able to report one error.

Reviewers: vkalintiris

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D18436

llvm-svn: 265018
2016-03-31 14:23:20 +00:00
Pavel Labath 3f081c8210 Don't vary debug info for lldb-server tests
Summary:
Debug info is used only by the client and lldb-server tests do not even have the client component
running, as they communicate with the server directly. Therefore, running the tests for each
debug info type is unnecessarry.

This adds general ability to mark a test class as not dependent on debug info, and marks all
lldb-server tests as such.

Reviewers: tberghammer, tfiala

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D18598

llvm-svn: 265017
2016-03-31 14:22:52 +00:00
Dmitry Polukhin cd835ad876 [IFUNC] Introduce GlobalIndirectSymbol as a base class for alias and ifunc
This patch is a part of http://reviews.llvm.org/D15525

GlobalIndirectSymbol class contains common implementation for both
aliases and ifuncs. This patch should be NFC change that just prepare
common code for ifunc support.

Differential Revision: http://reviews.llvm.org/D18433

llvm-svn: 265016
2016-03-31 14:16:21 +00:00
Sam Kolton 1048fb1818 [AMDGPU] Disassembler: support for DPP
Review: http://reviews.llvm.org/D18642
llvm-svn: 265015
2016-03-31 14:15:04 +00:00
Daniel Sanders dc0602a2c2 [mips] Split mem_msa into range checked mem_simm10 and mem_simm10_lsl[123]
Summary:
Also, made test_mi10.s formatting consistent with the majority of the
MC tests.

Reviewers: vkalintiris

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D18435

llvm-svn: 265014
2016-03-31 14:12:01 +00:00
Nirav Dave 83ce54aac2 Prevent X86ISelLowering from merging volatile loads
Change isConsecutiveLoads to check that loads are non-volatile as this
is a requirement for any load merges. Propagate change to two callers.

Reviewers: RKSimon

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18546

llvm-svn: 265013
2016-03-31 13:40:55 +00:00
Rafael Espindola 4e5ab42e21 Pass a const SymbolBody to needsGot. NFC.
llvm-svn: 265012
2016-03-31 13:38:28 +00:00
Pavel Labath 63168e08bd Fix DWO breakage in r264909
Summary:
In case of Dwo, DIERef stores a compile unit offset in the main object file, and not in the dwo.
The implementation of SymbolFileDWARFDwo::GetDIE inherited from SymbolFileDWARF tried to lookup
the compilation unit in the DWO based on the main object file offset (and failed). I change the
implementation to verify the DIERef indeed references compile unit belonging to this dwo and then
lookup the die based on the die offset alone.

Includes a couple of fixes for mismatched struct/class tags.

Reviewers: tberghammer, clayborg

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D18646

llvm-svn: 265011
2016-03-31 13:30:04 +00:00
Daniel Sanders 2e9f69d933 [mips] Range check simm9 and fix a bug this revealed.
Summary:
The bug was that microMIPS's [ls]w[lr]e instructions claimed to support a
12-bit offset when it is only 9-bit.

Reviewers: vkalintiris

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D18434

llvm-svn: 265010
2016-03-31 13:15:23 +00:00
Rafael Espindola 66ea7bb2c1 Fix the alignment check.
We have to check the final value that is written.

I don't think this has any real word implications (unless something
supports unaligned instructions), but unblocks simplifying the handling
of PC relative relocations.

llvm-svn: 265009
2016-03-31 12:09:36 +00:00
Alexander Kornienko f85a69bb6f [docs] Fix a typo, change the style of the clang-tidy release notes a bit.
llvm-svn: 265008
2016-03-31 12:06:54 +00:00
Alexander Kornienko 259ce38315 note for top-level consts in function decls tidy
Summary: Add missing release note

Reviewers: alexfh

Subscribers: LegalizeAdulthood, cfe-commits

Patch by Matt Kulukundis!

Differential Revision: http://reviews.llvm.org/D18608

llvm-svn: 265007
2016-03-31 12:06:47 +00:00
Anastasia Stulova c4bb5df4ab [OpenCL] Added nosvm attribute for OpenCL v2.0.
It is not widely used and removed from OpenCL v2.1.

This change modifies Clang to parse the attribute for OpenCL
but ignores it afterwards.

Patch by Liu Yaxun (Sam)!

Differential Revision: http://reviews.llvm.org/D17861

llvm-svn: 265006
2016-03-31 11:07:22 +00:00
Benjamin Kramer cad9a8a6bb [TTI] Let the cost model estimate ctpop costs based on legality
PPC has a vector popcount, this lets the vectorizer use the correct cost
for it. Tweak X86 test to use an intrinsic that's actually scalarized (we
have a somewhat efficient lowering for vector popcount using SSE, the
cost model finds that now).

llvm-svn: 265005
2016-03-31 10:42:40 +00:00
Alexey Bataev 958b9e7e33 [OPENMP] Support dumping OpenMP specific constructs.
Add proper dumping support for OpenMP declarations, directives and
clauses.

llvm-svn: 265004
2016-03-31 09:30:50 +00:00
Alexey Bataev 05968174c3 [OPENMP] Allow skip expression after comma in clauses with lists.
Compatibility fix for better compatibility with the existing software.

llvm-svn: 265003
2016-03-31 09:13:44 +00:00
Zlatko Buljan 6221be8e46 [mips][microMIPS] Implement MFC*, MFHC* and DMFC* instructions
Differential Revision: http://reviews.llvm.org/D17334

llvm-svn: 265002
2016-03-31 08:51:24 +00:00
Jeroen Ketema 52aadc8eb8 Silence warnings in OCaml bindings
* LLVMDisposeMessage lives in llvm-c/Core.h, include this file where necessary
* LLVMAddTargetData has been removed, follow suit in the bindings

Differential Revision: http://reviews.llvm.org/D18633

llvm-svn: 265001
2016-03-31 08:39:42 +00:00
Jonas Paulsson 2ba315218b Indentation fix in SystemZInstrInfo.cpp
llvm-svn: 265000
2016-03-31 08:00:14 +00:00
Akira Hatanaka 68ab7fe1c8 [CodeGenCXX] Fix ItaniumCXXABI::getAlignmentOfExnObject to return 8-byte
alignment on Darwin.

Itanium C++ ABI specifies that _Unwind_Exception should be double-word
aligned (16B). To conform to the ABI, libraries implementing exception
handling declare the struct with __attribute__((aligned)), which aligns
the unwindHeader field (and the end of __cxa_exception) to the default
target alignment (which is typically 16-bytes).

struct __cxa_exception {
  ...
  // struct is declared with __attribute__((aligned)).
  _Unwind_Exception unwindHeader;
};

Based on the assumption that _Unwind_Exception is declared with
__attribute__((aligned)), ItaniumCXXABI::getAlignmentOfExnObject returns
the target default alignment for __attribute__((aligned)). It turns out
that libc++abi, which is used on Darwin, doesn't declare the struct with
the attribute and therefore doesn't guarantee that unwindHeader is
aligned to the alignment specified by the ABI, which in some cases
causes the program to crash because of unaligned memory accesses.

This commit avoids crashes due to unaligned memory accesses by having
getAlignmentOfExnObject return an 8-byte alignment on Darwin. I've only
fixed the problem for Darwin, but we should also figure out whether other
platforms using libc++abi need similar fixes.

rdar://problem/25314277

Differential revision: http://reviews.llvm.org/D18479

llvm-svn: 264998
2016-03-31 06:36:07 +00:00
Mike Spertus 61c3f39401 Visual Studio native visualization for clang::TemplateDecl
With this change, TemplateDecls display in the Locals Window something like

  template<typename T, typename U> struct A;

llvm-svn: 264997
2016-03-31 06:09:56 +00:00
Sanjoy Das 56df0ec610 [InstCombine] Fix incorrect rule from rL236202
The rule for SMIN introduced in rL236202 doesn't work as advertised: the
check for Pred == ICmpInst::ICMP_SGT was missing.

llvm-svn: 264996
2016-03-31 05:14:34 +00:00
Sanjoy Das c9d6d8b106 Delete trailing whitespace
llvm-svn: 264995
2016-03-31 05:14:29 +00:00
Sanjoy Das e12c0e5159 [SCEV] Track NoWrap properties using MatchBinaryOp, NFC
This way once we teach MatchBinaryOp to map more things into arithmetic,
the non-wrapping add recurrence construction would understand it too.
Right now MatchBinaryOp still only understands arithmetic, so this is
solely a code-reorganization change.

llvm-svn: 264994
2016-03-31 05:14:26 +00:00
Sanjoy Das 118d919a6a [SCEV] NFC code motion to simplify later change
llvm-svn: 264993
2016-03-31 05:14:22 +00:00
Craig Topper d2aa03a60a [X86] Use MVT instead of EVT in code called after legalization.
llvm-svn: 264992
2016-03-31 04:37:41 +00:00
Richard Trieu 1c7237ae61 Fix -Wdynamic-class-memaccess to skip invalid classes.
This warning sometimes will infinitely recurse on CXXRecordDecl's from
ill-formed recursive classes that have fields of themselves.  Skip processing
these classes to prevent this from happening.
Fixes https://llvm.org/bugs/show_bug.cgi?id=27142

llvm-svn: 264991
2016-03-31 04:18:07 +00:00
Davide Italiano 936a2b09f3 [DebugInfo] Subprograms should belong to a CU.
Start fixing tests accordingly. There are still
about 35 failures before we can enable this check
in the IR verifier.

llvm-svn: 264990
2016-03-31 03:40:07 +00:00
Eric Fiselier 54f0cda625 Fix LWG issue 2469 - Use piecewise construction in map::operator[].
map's allocator may only be used to construct objects of 'value_type',
or in this case 'pair<const Key, Value>'. In order to respect this requirement
in operator[], which requires default constructing the 'mapped_type', we have
to use pair's piecewise constructor with '(tuple<Kep>, tuple<>)'.

Unfortunately we still need to provide a fallback implementation for C++03
since we don't have <tuple>. Even worse this fallback is the last remaining
user of '__hash_map_node_destructor' and '__construct_node_with_key'.

This patch also switches try_emplace over to __tree.__emplace_unique_key_args.

llvm-svn: 264989
2016-03-31 03:13:37 +00:00
Hal Finkel 851b33a0b1 [PowerPC] Load two floats directly instead of using one 64-bit integer load
When dealing with complex<float>, and similar structures with two
single-precision floating-point numbers, especially when such things are being
passed around by value, we'll sometimes end up loading both float values by
extracting them from one 64-bit integer load. It looks like this:

  t13: i64,ch = load<LD8[%ref.tmp]> t0, t6, undef:i64
      t16: i64 = srl t13, Constant:i32<32>
    t17: i32 = truncate t16
  t18: f32 = bitcast t17
    t19: i32 = truncate t13
  t20: f32 = bitcast t19

The problem, especially before the P8 where those bitcasts aren't legal (and
get expanded via the stack), is that it would have been better to use two
floating-point loads directly. Here we add a target-specific DAGCombine to do
just that. In short, we turn:

	ld 3, 0(5)
	stw 3, -8(1)
	rldicl 3, 3, 32, 32
	stw 3, -4(1)
	lfs 3, -4(1)
	lfs 0, -8(1)

into:

        lfs 3, 4(5)
        lfs 0, 0(5)

llvm-svn: 264988
2016-03-31 02:56:05 +00:00
Bruno Cardoso Lopes 8ed5cac97c [DarwinDriver] Increase the number of valid digits for ld64 version string.
Previously only 3 digits were valid. Increase it to 5.

Differential Revision: http://reviews.llvm.org/D18304

rdar://problem/24843016

llvm-svn: 264987
2016-03-31 02:45:46 +00:00
Eric Fiselier 5e3ea4dd79 Teach __tree how to handle map's __value_type
This patch is fairly large and contains a number of changes. The changes all work towards
allowing __tree to properly handle __value_type esspecially when inserting into the __tree.
I chose not to break this change into smaller patches because it wouldn't be possible to
write meaningful standard-compliant tests for each patch.

It is very similar to r260513 "[libcxx] Teach __hash_table how to handle unordered_map's __hash_value_type".

Changes in <map>
 * Remove __value_type's constructors because it should never be constructed directly.

 * Make map::emplace and multimap::emplace forward to __tree and remove the old definitions

 * Remove "__construct_node" map and multimap member functions. Almost all of the construction is done within __tree.

 * Fix map's move constructor to access "__value_type.__nc" directly and pass this object to __tree::insert.

Changes in <__tree>
 * Add traits to detect, handle, and unwrap, map's "__value_type".

 * Convert methods taking "value_type" to take "__container_value_type" instead. Previously these methods caused
  unwanted implicit conversions from "std::pair<Key, Value>" to "__value_type<Key, Value>".

 * Delete __tree_node and __tree_node_base's constructors and assignment operators. The node types should never be constructed
   because the "__value_" member of __tree_node must be constructed directly by the allocator.

 * Make the __tree_node_destructor class and "__construct_node" methods unwrap "__node_value_type" into "__container_value_type" before invoking the allocator. The user's allocator can only be used to construct and destroy the container's value_type. Passing it map's "__value_type" was incorrect.

 * Cleanup the "__insert" and "__emplace" methods. Have __insert forward to an __emplace function wherever possible to reduce
   code duplication. __insert_unique(value_type const&) and __insert_unique(value_type&&) forward to __emplace_unique_key_args.
   These functions will not allocate a new node if the value is already in the tree.

 * Change the __find* functions to take the "key_type" directly instead of passing in "value_type" and unwrapping the key later.
   This change allows the find functions to be used without having to construct a "value_type" first. This allows for a number
   of optimizations.

 * Teach __move_assign and __assign_multi methods to unwrap map's __value_type.

llvm-svn: 264986
2016-03-31 02:15:15 +00:00
Eric Fiselier 8a0313d4b6 Update container_test_types.h and cleanup the related tests
llvm-svn: 264985
2016-03-31 02:13:14 +00:00
Sean Silva 24d7e2e869 Fix case confusion.
The test case was defining and using a function 'notExported()', but
the FileCheck checks were checking for the name 'not_exported'. This
changes the test to use 'notExported' across the board. Also, the test
defined a function 'not_defined()', but doesn't have any checks related
to it. For consistency, this name is changed to 'notDefined'. A later
commit will add checks for 'notDefined'.

Patch by Warren Ristow!

llvm-svn: 264984
2016-03-31 01:47:33 +00:00
Pete Cooper f4d7688e4b Revert "Remove useless unreachable. Switch coverage already gives us this. NFC"
This reverts commit r264945.

The commit only removed an unreachable in a method with a covered switch, but
GCC is likely to warn on this, and the coding standards recommend just leaving
in the unreachable.

llvm-svn: 264983
2016-03-31 01:23:23 +00:00
Pete Cooper eadf9e4ec9 Remove unused variants of make_dynamic_error_code. NFC.
make_dynamic_error_code was used to create a std::error_code with
a std::string message.  Now that we are migrating to llvm::Error,
there are no calls to these make_dynamic_error_code methods.

There is one single call to make_dynamic_error_code remaining, the one
inside GenericError::convertToErrorCode().  That method is only called
from File::doParse() which should be a temporary situation.  We need
to work out how to deal with File::parse() caching the error result from
doParse().  Caching errors isn't supported in the new scheme, and probably
isn't needed here, but we need to work that out.

Once thats done, dynamic error and all utilities around it can be deleted.

llvm-svn: 264982
2016-03-31 01:21:50 +00:00