Commit Graph

111755 Commits

Author SHA1 Message Date
Daniel Sanders 023c806109 [mips] Fix a typo in the compare patterns for MIPS32r6/MIPS64r6.
Summary: The patterns intended for the SETLE node were actually matching the SETLT node.

Reviewers: atanasyan, sstankovic, vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6997

llvm-svn: 226171
2015-01-15 15:41:03 +00:00
Vasileios Kalintiris 799d5c924e Fix the C-API MCJIT test for 32-bit big endian machines.
Avoid using unions for storing the return value from
LLVMGetGlobalValueAddress() and LLVMGetFunctionAddress() and accessing it as
a pointer through another pointer member. This causes problems on 32-bit big
endian machines since the pointer gets the higher part of the return value of
the aforementioned functions.

llvm-svn: 226170
2015-01-15 15:36:04 +00:00
Vladimir Medic df3ed1c9d6 Add disassembler tests for mips64r6 platform. There are no functional changes.
llvm-svn: 226166
2015-01-15 14:18:12 +00:00
Vladimir Medic d6d486ddcc Add disassembler tests for mips32r6 platform. There are no functional changes.
llvm-svn: 226165
2015-01-15 14:11:38 +00:00
Vladimir Medic 5dcf17b881 Add disassembler tests for mips64r2 platform. There are no functional changes.
llvm-svn: 226164
2015-01-15 14:06:34 +00:00
Mehdi Amini fa546b29a0 Fix SelectionDAG -view-*-dags filtering
llvm-svn: 226163
2015-01-15 12:03:32 +00:00
Alexander Kornienko 8c0809c7f8 Replace size method call of containers to empty method where appropriate
This patch was generated by a clang tidy checker that is being open sourced.
The documentation of that checker is the following:

/// The emptiness of a container should be checked using the empty method
/// instead of the size method. It is not guaranteed that size is a
/// constant-time function, and it is generally more efficient and also shows
/// clearer intent to use empty. Furthermore some containers may implement the
/// empty method but not implement the size method. Using empty whenever
/// possible makes it easier to switch to another container in the future.

Patch by Gábor Horváth!

llvm-svn: 226161
2015-01-15 11:41:30 +00:00
Chandler Carruth 8ca43224db [PM] Port TargetLibraryInfo to the new pass manager, provided by the
TargetLibraryAnalysis pass.

There are actually no direct tests of this already in the tree. I've
added the most basic test that the pass manager bits themselves work,
and the TLI object produced will be tested by an upcoming patches as
they port passes which rely on TLI.

This is starting to point out the awkwardness of the invalidate API --
it seems poorly fitting on the *result* object. I suspect I will change
it to live on the analysis instead, but that's not for this change, and
I'd rather have a few more passes ported in order to have more
experience with how this plays out.

I believe there is only one more analysis required in order to start
porting instcombine. =]

llvm-svn: 226160
2015-01-15 11:39:46 +00:00
Chandler Carruth b98f63dbdb [PM] Separate the TargetLibraryInfo object from the immutable pass.
The pass is really just a means of accessing a cached instance of the
TargetLibraryInfo object, and this way we can re-use that object for the
new pass manager as its result.

Lots of delta, but nothing interesting happening here. This is the
common pattern that is developing to allow analyses to live in both the
old and new pass manager -- a wrapper pass in the old pass manager
emulates the separation intrinsic to the new pass manager between the
result and pass for analyses.

llvm-svn: 226157
2015-01-15 10:41:28 +00:00
Craig Topper 9fdd078afb Hide some redundant AVX512 instructions from the asm parser, but force them to show up in the disassembler.
llvm-svn: 226155
2015-01-15 09:37:15 +00:00
Vladimir Medic e993dac523 Add disassembler tests for mips64 platform. There are no functional changes.
llvm-svn: 226151
2015-01-15 08:50:20 +00:00
David Majnemer f0982d0ac6 SimplifyIndVar: Remove unused variable
OtherOperandIdx is not used anymore, remove it to silence warnings.

llvm-svn: 226138
2015-01-15 07:11:23 +00:00
NAKAMURA Takumi 24ebfcb619 Update libdeps since TLI was moved from Target to Analysis in r226078.
llvm-svn: 226126
2015-01-15 05:21:00 +00:00
NAKAMURA Takumi ab7289dd0e Reorder.
llvm-svn: 226125
2015-01-15 05:20:46 +00:00
Hans Wennborg 145bfa0d89 utils/release/tag.sh: fix -revision vs. -rc check
llvm-svn: 226124
2015-01-15 04:36:20 +00:00
Chandler Carruth 60534818a9 [PM] Clean up the TLI doxygen comments prior to refactoring this code
for the new pass manager.

llvm-svn: 226089
2015-01-15 03:51:04 +00:00
Hal Finkel dd669615dd Revert "r226071 - [RegisterCoalescer] Remove copies to reserved registers"
Reverting this while I investigate some bad behavior this is causing. As a
possibly-related issue, adding -verify-machineinstrs to one of the test cases
now fails because of this change:

  llc test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll -march=x86-64 -o - -verify-machineinstrs

*** Bad machine code: No instruction at def index ***
- function:    foo
- basic block: BB#0 return (0x10007e21f10) [0B;736B)
- liverange:   [128r,128d:9)[160r,160d:8)[176r,176d:7)[336r,336d:6)[464r,464d:5)[480r,480d:4)[624r,624d:3)[752r,752d:2)[768r,768d:1)[78
4r,784d:0)  0@784r 1@768r 2@752r 3@624r 4@480r 5@464r 6@336r 7@176r 8@160r 9@128r
- register:    %DS
Valno #3 is defined at 624r

*** Bad machine code: Live segment doesn't end at a valid instruction ***
- function:    foo
- basic block: BB#0 return (0x10007e21f10) [0B;736B)
- liverange:   [128r,128d:9)[160r,160d:8)[176r,176d:7)[336r,336d:6)[464r,464d:5)[480r,480d:4)[624r,624d:3)[752r,752d:2)[768r,768d:1)[78
4r,784d:0)  0@784r 1@768r 2@752r 3@624r 4@480r 5@464r 6@336r 7@176r 8@160r 9@128r
- register:    %DS
[624r,624d:3)
LLVM ERROR: Found 2 machine code errors.

where 624r corresponds exactly to the interval combining change:

624B    %RSP<def> = COPY %vreg16; GR64:%vreg16
        Considering merging %vreg16 with %RSP
                RHS = %vreg16 [608r,624r:0)  0@608r
                updated: 608B   %RSP<def> = MOV64rm <fi#3>, 1, %noreg, 0, %noreg; mem:LD8[%saved_stack.1]
        Success: %vreg16 -> %RSP
        Result = %RSP

llvm-svn: 226086
2015-01-15 03:08:59 +00:00
Chandler Carruth a61ef990dd Switch this header file to not hard-code Windows line endings.
llvm-svn: 226081
2015-01-15 02:21:56 +00:00
Chandler Carruth 62d4215baa [PM] Move TargetLibraryInfo into the Analysis library.
While the term "Target" is in the name, it doesn't really have to do
with the LLVM Target library -- this isn't an abstraction which LLVM
targets generally need to implement or extend. It has much more to do
with modeling the various runtime libraries on different OSes and with
different runtime environments. The "target" in this sense is the more
general sense of a target of cross compilation.

This is in preparation for porting this analysis to the new pass
manager.

No functionality changed, and updates inbound for Clang and Polly.

llvm-svn: 226078
2015-01-15 02:16:27 +00:00
NAKAMURA Takumi 95b3880dd0 Win64Exception.cpp: Try to fix crash for x64 EH. "Per" might be null there.
llvm-svn: 226077
2015-01-15 02:15:21 +00:00
Sanjoy Das 8c252bde36 Fix PR22222
The bug was introduced in r225282. r225282 assumed that sub X, Y is
the same as add X, -Y. This is not correct if we are going to upgrade
the sub to sub nuw. This change fixes the issue by making the
optimization ignore sub instructions.

Differential Revision: http://reviews.llvm.org/D6979

llvm-svn: 226075
2015-01-15 01:46:09 +00:00
Hal Finkel f909072073 [TableGen] Add support for negative immediates to AsmMatcherEmitter
This adds support for creating an InstAlias with a negative immediate, i.e.:

  def NOT : InstAlias<"not $dst, $src", (XORI GR32:$dst, GR32:$src, -1)>;

by resolving this problem:

RISCVGenAsmMatcher.inc:95:11: error: expected '= constant-expression' or end of enumerator definition
  CVT_imm_-1,
  ^^^^^^^^^^

Patch by Jordy Potman, thanks!

llvm-svn: 226073
2015-01-15 01:33:00 +00:00
Hal Finkel 8299646236 [RegisterCoalescer] Remove copies to reserved registers
This allows the RegisterCoalescer to join "non-flipped" range pairs with a
physical destination register -- which allows the RegisterCoalescer to remove
copies like this:

<vreg> = something (maybe a load, for example)
... (things that don't use PHYSREG)
PHYSREG = COPY <vreg>

(with all of the restrictions normally applied by the RegisterCoalescer: having
compatible register classes, etc. )

Previously, the RegisterCoalescer handled only the opposite case (copying
*from* a physical register). I don't handle the problem fully here, but try to
get the common case where there is only one use of <vreg> (the COPY).

An upcoming commit to the PowerPC backend will make this pattern much more
common on PPC64/ELF systems.

llvm-svn: 226071
2015-01-15 01:25:28 +00:00
Hal Finkel 64202167c5 [PowerPC] Add assembler support for mcrfs and friends
Fill out our support for the floating-point status and control register
instructions (mcrfs and friends). As it turns out, these are necessary for
compiling src/test/harness_fp.h in TBB for PowerPC.

Thanks to Raf Schietekat for reporting the issue!

llvm-svn: 226070
2015-01-15 01:00:53 +00:00
Richard Smith e78bb1249e For PR21145: recognise a builtin call to a known deallocation function even if
it's defined in the current module. Clang generates this situation for the
C++14 sized deallocation functions, because it generates a weak definition in
case one isn't provided by the C++ runtime library.

llvm-svn: 226069
2015-01-15 01:00:33 +00:00
Colin LeMahieu 8ffce23cda [Hexagon] Replacing old versions of stores and loads.
llvm-svn: 226065
2015-01-15 00:15:30 +00:00
Adrian Prantl 79dee1afa6 Add missing include directive for llvm::make_unique().
llvm-svn: 226064
2015-01-15 00:11:36 +00:00
Ramkumar Ramachandra dba7329ebb [GC] CodeGenPrep transform: simplify offsetable relocate
The transform is somewhat involved, but the basic idea is simple: find
derived pointers that have been offset from the base pointer using gep
and replace the relocate of the derived pointer with a gep to the
relocated base pointer (with the same offset).

llvm-svn: 226060
2015-01-14 23:27:07 +00:00
Duncan P. N. Exon Smith 9ffa7284df IR: Fix comment spelling, NFC
llvm-svn: 226058
2015-01-14 23:11:51 +00:00
Colin LeMahieu c7522f31f1 [Hexagon] Replacing old version of convert and load f64.
llvm-svn: 226057
2015-01-14 23:07:36 +00:00
Philip Reames 8d5d68f1aa getMangledTypeStr: clarify how it mangles types, and add tests
"Write a set of tests that show how name mangling is done for overloaded intrinsics."  These happen to use gc.relocates to exercise the codepath in question, but is not a GC specific test.

Patch by: artagnon@gmail.com
Differential Revision: http://reviews.llvm.org/D6915

llvm-svn: 226056
2015-01-14 23:05:17 +00:00
NAKAMURA Takumi a50a89a081 Update libdeps in NVPTXCodeGen, since r225944.
llvm-svn: 226055
2015-01-14 23:01:36 +00:00
Reid Kleckner e80a0a7572 Use MMI->getPersonality() instead of MMI->getPersonalities()[MMI->getPersonalityIndex()]
Also nuke the comment about supporting multiple personalities in a
single function, aka PR1414. That's just crazy.

llvm-svn: 226052
2015-01-14 22:47:54 +00:00
Duncan P. N. Exon Smith 9885469922 IR: Move MDLocation into place
This commit moves `MDLocation`, finishing off PR21433.  There's an
accompanying clang commit for frontend testcases.  I'll attach the
testcase upgrade script I used to PR21433 to help out-of-tree
frontends/backends.

This changes the schema for `DebugLoc` and `DILocation` from:

    !{i32 3, i32 7, !7, !8}

to:

    !MDLocation(line: 3, column: 7, scope: !7, inlinedAt: !8)

Note that empty fields (line/column: 0 and inlinedAt: null) don't get
printed by the assembly writer.

llvm-svn: 226048
2015-01-14 22:27:36 +00:00
Matthias Braun 96a319588a MachineVerifier: Allow undef reads if a matching superreg is defined.
Summary:
Some pseudo instruction expansions break down a wide register use into
multiple uses of smaller sub registers. If the super register was
partially undefined the broken down sub registers may be completely
undefined now leading to MachineVerifier complaints. Unfortunately
liveness information to add the required dead flags is not easily
(cheaply) available when expanding pseudo instructions.

This commit changes the verifier to be quiet if there is an additional
implicit use of a super register. Pseudo instruction expanders can use
this to mark cases where partially defined values get potentially broken
into completely undefined ones.

Differential Revision: http://reviews.llvm.org/D6973

llvm-svn: 226047
2015-01-14 22:25:14 +00:00
Duncan P. N. Exon Smith 503cf3bff9 IR: Always print MDLocation line
Print `MDLocation`'s `line` field even when it's 0.

llvm-svn: 226046
2015-01-14 22:14:26 +00:00
Duncan P. N. Exon Smith e16d587515 IR: Drop metadata references more aggressively during teardown
Sometimes teardown happens before the debug info graph is complete
(e.g., when clang throws an error).  In that case, `MDNode`s will still
have RAUW, so deleting constants that the `MDNode`s point at will be
relatively expensive -- it'll cause re-uniquing all up the chain (what
I've been referring to as "teardown madness").

So, drop references *before* deleting constants.  We need to drop a few
more references now: the metadata side of the metadata/value bridges
needs to be dropped off the cliff along with the rest of it (previously,
the bridges were cleaned before we did anything with the `MDNode`s).

There's no real functionality change here -- state before and after
`LLVMContextImpl::~LLVMContextImpl()` is unchanged -- so no testcase.

llvm-svn: 226044
2015-01-14 21:58:17 +00:00
Rafael Espindola fad1639a12 Don't create new comdats in CodeGen.
This patch stops the implicit creation of comdats during codegen.

Clang now sets the comdat explicitly when it is required. With this patch clang and gcc
now produce the same result in pr19848.

llvm-svn: 226038
2015-01-14 20:55:48 +00:00
Colin LeMahieu 11a34b385d [Hexagon] Removing old, unused !tstbit instructions.
llvm-svn: 226036
2015-01-14 20:26:15 +00:00
Rafael Espindola a371989f66 Add a test that would have found the issue with r225644.
llvm-svn: 226035
2015-01-14 20:24:46 +00:00
Chandler Carruth e3288147f0 [MBP] Add flags to disable the BadCFGConflict check in MachineBlockPlacement.
Some benchmarks have shown that this could lead to a potential
performance benefit, and so adding some flags to try to help measure the
difference.

A possible explanation. In diamond-shaped CFGs (A followed by either
B or C both followed by D), putting B and C both in between A and
D leads to the code being less dense than it could be. Always either
B or C have to be skipped increasing the chance of cache misses etc.
Moving either B or C to after D might be beneficial on average.

In the long run, but we should probably do a better job of analyzing the
basic block and branch probabilities to move the correct one of B or
C to after D. But even if we don't use this in the long run, it is
a good baseline for benchmarking.

Original patch authored by Daniel Jasper with test tweaks and a second
flag added by me.

Differential Revision: http://reviews.llvm.org/D6969

llvm-svn: 226034
2015-01-14 20:19:29 +00:00
Bill Schmidt 082cfc05f1 [PPC64] Add support for the ICBT instruction on POWER8.
Patch by Kit Barton.

Support for the ICBT instruction is currently present, but limited to
embedded processors. This change adds a new FeatureICBT that can be used
to identify whether the ICBT instruction is available on a specific processor.

Two new tests are added:
 * Positive test to ensure the icbt instruction is present when using
-mcpu=pwr8
 * Negative test to ensure the icbt instruction is not generated when
using -mcpu=pwr7

Both test cases use the Prefetch opcode in LLVM. They are based on the
ppc64-prefetch.ll test case.

llvm-svn: 226033
2015-01-14 20:17:10 +00:00
Rafael Espindola 9e3e53f6dd Fix linking of shared libraries.
In shared libraries the plugin can see non-weak declarations that are still
undefined.

llvm-svn: 226031
2015-01-14 20:08:46 +00:00
David Blaikie daef1bcfbb Add comment about a gotcha I ran across while touching this code.
I haven't looked closely at exactly why the side effect is required, but
this seems better than not mentioning it at all.

llvm-svn: 226030
2015-01-14 19:59:18 +00:00
Duncan P. N. Exon Smith 4a4f78583e IR: Fix a use-after-free in RAUW
Happened pretty commonly during `LLVMContext` teardown when `clang -g`
hit an error.  This fixes the use-after-free.  Next I'll clean up
teardown so that it's not RAUW'ing when metadata-tracked values are
deleted (only really causes a problem if the graph is mid-construction
when teardown starts, but it's still unnecessary work).

llvm-svn: 226029
2015-01-14 19:56:10 +00:00
David Blaikie a72d6ef891 unique_ptrify the value in DominatorTreeBase::DomTreeNodes
(noticed the need for an explicit dtor in a recent commit & figured I'd
tidy that up)

llvm-svn: 226028
2015-01-14 19:55:27 +00:00
Rafael Espindola 0fd9e5f719 Fix handling of extern_weak. This was broken by r225983.
llvm-svn: 226026
2015-01-14 19:43:32 +00:00
David Majnemer a0afb55ff9 InstCombine: Don't take A-B<0 into A<B if A-B has other uses
This fixes PR22226.

llvm-svn: 226023
2015-01-14 19:26:56 +00:00
Rafael Espindola 7244bb3c17 Revert "Add r224985 back with two fixes."
This reverts commit r225644 while I debug a regression.

llvm-svn: 226022
2015-01-14 19:07:23 +00:00
Reid Kleckner 9b5eaf0d5a Emit the Itanium LSDA for unknown EH personalities on Win64
This fixes lots of generic CodeGen tests that use __gcc_personality_v0.
This suggests that using ExceptionHandling::MSVC was a mistake, and we
should instead classify each function by personality function. This
would, for example, allow us to LTO a binary containing uses of SEH and
Itanium EH.

llvm-svn: 226019
2015-01-14 18:50:10 +00:00