dbddac0915
[X86] Remove 64/128/256 from MMX/SSE/AVX instruction names for overall consistency. NFC
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MMX instrutions all start with MMX_ so the 64 isn't needed for disambigutation.
SSE/AVX1 instructions are assumed 128-bit so we don't need to say 128.
AVX2 instructions should use a Y to indicate 256-bits.
llvm-svn: 323402
2018-01-25 04:45:30 +00:00
b85b484fee
[X86] Adjust names of PINSRW/PEXTRW intructions between MMX/SSE/AVX/AVX512 for consistency and to maybe enable more regular expression compaction in the scheduler models. NFCI
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llvm-svn: 323352
2018-01-24 17:58:51 +00:00
d037b1446b
Implementation of X86Operand::print.
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Differential Revision: https://reviews.llvm.org/D41610
llvm-svn: 322267
2018-01-11 10:31:01 +00:00
03ddad853d
Fix incorrect operand sizes for some MMX instructions: punpcklwd, punpcklbw and punpckldq.
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Differential Revision: https://reviews.llvm.org/D41595
llvm-svn: 321549
2017-12-29 08:31:01 +00:00
428e302f4d
A special test to demonstrate debug logging for asm matcher.
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llvm-svn: 321497
2017-12-27 19:25:21 +00:00
Craig Topper