llvm-project

Commit Graph

Author	SHA1	Message	Date
Craig Topper	e538fc74d4	[X86] Remove checks for FeatureAVX512 from the X86 assembly parser. Remove mcpu/mattr from assembly test command lines. Summary: We should always be able to accept AVX512 registers and instructions in llvm-mc. The only subtarget mode that should be checked is 16-bit vs 32-bit vs 64-bit mode. I've also removed all the mattr/mcpu lines from test RUN lines to be consistent with this. Most were due to AVX512, but a few were for other features. Fixes PR36202 Reviewers: RKSimon, echristo, bkramer Reviewed By: echristo Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42824 llvm-svn: 324106	2018-02-02 17:02:58 +00:00
Craig Topper	8a2a104129	[X86] Teach the assembly parser to warn on duplicate registers in gather instructions. Fixes PR32238. Differential Revision: https://reviews.llvm.org/D39077 llvm-svn: 316700	2017-10-26 21:03:54 +00:00

Author

SHA1

Message

Date

Craig Topper

e538fc74d4

[X86] Remove checks for FeatureAVX512 from the X86 assembly parser. Remove mcpu/mattr from assembly test command lines.

Summary:
We should always be able to accept AVX512 registers and instructions in llvm-mc. The only subtarget mode that should be checked is 16-bit vs 32-bit vs 64-bit mode.

I've also removed all the mattr/mcpu lines from test RUN lines to be consistent with this. Most were due to AVX512, but a few were for other features.

Fixes PR36202

Reviewers: RKSimon, echristo, bkramer

Reviewed By: echristo

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D42824

llvm-svn: 324106

2018-02-02 17:02:58 +00:00

Craig Topper

8a2a104129

[X86] Teach the assembly parser to warn on duplicate registers in gather instructions.

Fixes PR32238.

Differential Revision: https://reviews.llvm.org/D39077

llvm-svn: 316700

2017-10-26 21:03:54 +00:00

2 Commits