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64836 Commits

Author SHA1 Message Date
Benjamin Kramer 4b57204e80 Simplify code. 
llvm-svn: 114444
 2010-09-21 16:41:29 +00:00
Chris Lattner 1ffcf527c7 continue MachinePointerInfo'izing, eliminating use of one of the old 
getLoad overloads.

llvm-svn: 114443
 2010-09-21 16:36:31 +00:00
Chris Lattner f72c3c08a4 convert dagcombine off the old form of getLoad. This fixes several bugs 
with SVOffset computation.

llvm-svn: 114442
 2010-09-21 16:08:50 +00:00
Benjamin Kramer 4021d906f1 Make CreateComplexVariable independent of SmallVector. 
llvm-svn: 114439
 2010-09-21 16:00:03 +00:00
Chris Lattner e32675253f simplify DAGCombiner::SimplifySelectOps step #2/2. 
llvm-svn: 114437
 2010-09-21 15:58:55 +00:00
Chris Lattner 254c445e63 substantially reduce indentation and simplify DAGCombiner::SimplifySelectOps. 
no functionality change (step #1)

llvm-svn: 114436
 2010-09-21 15:46:59 +00:00
Mikhail Glushenkov 5be6764363 Trailing whitespace, 80-col violations. 
llvm-svn: 114435
 2010-09-21 14:59:50 +00:00
Mikhail Glushenkov b57e684020 llvmc: split llvm_gcc_based into llvm_gcc_{pch,comp}_based. 
llvm-svn: 114434
 2010-09-21 14:59:47 +00:00
Mikhail Glushenkov ed79d5f24d llvmc: Allow multiple output languages. 
llvm-svn: 114433
 2010-09-21 14:59:42 +00:00
Mikhail Glushenkov a4862ae43f Trailing whitespace. 
llvm-svn: 114432
 2010-09-21 14:59:34 +00:00
Lang Hames 2b252f6b6d Fixed ambiguous call. 
llvm-svn: 114431
 2010-09-21 13:47:10 +00:00
Gabor Greif 1a25ae88ff Fix buglet when the TST instruction directly uses the AND result. 
I am unable to write a test for this case, help is solicited, though...
What I did is to tickle the code in the debugger and verify that we do the right thing.

llvm-svn: 114430
 2010-09-21 13:30:57 +00:00
Lang Hames 0937fc4b7f Added an additional PBQP problem builder which adds coalescing costs (both between pairs of virtuals, and between virtuals and physicals). 
llvm-svn: 114429
 2010-09-21 13:19:36 +00:00
Gabor Greif adbbb93d3d Move the search for the appropriate AND instruction 
into OptimizeCompareInstr.
This necessitates the passing of CmpValue around,
so widen the virtual functions to accomodate.

No functionality changes.

llvm-svn: 114428
 2010-09-21 12:01:15 +00:00
Mikhail Glushenkov 3240ff9302 llvmc: put linker options in a separate OptList. 
llvm-svn: 114427
 2010-09-21 11:57:04 +00:00
Chris Lattner a35499e2af a few more trivial updates. This fixes PerformInsertVectorEltInMemory to not 
pass a completely incorrect SrcValue, which would result in a miscompile with
combiner-aa.

llvm-svn: 114411
 2010-09-21 07:32:19 +00:00
Chris Lattner 7727d05dbb convert the targets off the non-MachinePointerInfo of getLoad. 
llvm-svn: 114410
 2010-09-21 06:44:06 +00:00
Chris Lattner 50287ea65a add some accessors 
llvm-svn: 114409
 2010-09-21 06:43:24 +00:00
Chris Lattner 82fd06d3ce it's more elegant to put the "getConstantPool" and 
"getFixedStack" on the MachinePointerInfo class.  While
this isn't the problem I'm setting out to solve, it is the
right way to eliminate PseudoSourceValue, so lets go with it.

llvm-svn: 114406
 2010-09-21 06:22:23 +00:00
Chris Lattner 8363087ba8 ugh, missed a file. 
llvm-svn: 114405
 2010-09-21 06:16:40 +00:00
Chris Lattner c3e05d6e50 update the X86 backend to use the MachinePointerInfo version of one 
of the getLoad methods.  This fixes at least one bug where an incorrect
svoffset is passed in (a potential combiner-aa miscompile).

llvm-svn: 114404
 2010-09-21 06:02:19 +00:00
Chris Lattner 4470c2bb23 Fix a bug where the x86 backend would lower memcpy/memset of segment relative operations 
into non-segment-relative copies.

llvm-svn: 114402
 2010-09-21 05:43:34 +00:00
Chris Lattner 2510de2bea reimplement memcpy/memmove/memset lowering to use MachinePointerInfo 
instead of srcvalue/offset pairs.  This corrects SV info for mem 
operations whose size is > 32-bits.

llvm-svn: 114401
 2010-09-21 05:40:29 +00:00
Chris Lattner de93bb065d add some helpful accessors. 
llvm-svn: 114400
 2010-09-21 05:39:30 +00:00
Chris Lattner bc419ba98f add overloads for SelectionDAG::getLoad, getStore, getTruncStore that take a 
MachinePointerInfo.  Among other virtues, this doesn't silently  truncate the
svoffset to 32-bits.

llvm-svn: 114399
 2010-09-21 05:10:45 +00:00
Chris Lattner d2d58ada70 simplify interface to SelectionDAG::getMemIntrinsicNode, making it take a MachinePointerInfo 
llvm-svn: 114397
 2010-09-21 04:57:15 +00:00
Chris Lattner 15d84c460a chagne interface to SelectionDAG::getAtomic to take a MachinePointerInfo, 
eliminating some weird "infer a frame address" logic which was dead.

llvm-svn: 114396
 2010-09-21 04:53:42 +00:00
Chris Lattner 3b5dc0cdad don't implicitly drop the offset of a machinememoperand when legalizing atomics. 
llvm-svn: 114395
 2010-09-21 04:51:11 +00:00
Chris Lattner b5f4920979 force clients of MachineFunction::getMachineMemOperand to provide a 
MachinePointerInfo, propagating the type out a level of API.  Remove
the old MachineFunction::getMachineMemOperand impl.

llvm-svn: 114393
 2010-09-21 04:46:39 +00:00
Chris Lattner e3d864b857 convert targets to the new MF.getMachineMemOperand interface. 
llvm-svn: 114391
 2010-09-21 04:39:43 +00:00
Chris Lattner 00ca0b8e98 start pushing MachinePointerInfo out through the MachineMemOperand interface 
to the MachineFunction construction methods.

llvm-svn: 114390
 2010-09-21 04:32:08 +00:00
Chris Lattner 187f653418 refactor the Value*/offset pair from MachineMemOperand out to a new 
MachinePointerInfo struct, no functionality change.

This also adds an assert to MachineMemOperand::MachineMemOperand
that verifies that the Value* is either null or is an IR pointer type.

llvm-svn: 114389
 2010-09-21 04:23:39 +00:00
Chris Lattner 191efcfc63 random cruft in my tree. 
llvm-svn: 114387
 2010-09-21 04:03:39 +00:00
Chris Lattner bb0a1c44bf fix rdar://8453210, a crash handling a call through a GS relative load. 
For now, just disable folding the load into the call.

llvm-svn: 114386
 2010-09-21 03:37:00 +00:00
Rafael Espindola 461a692c7f Revert unrelated change that was accidentally included in the previous commit. 
llvm-svn: 114383
 2010-09-21 00:40:19 +00:00
Rafael Espindola f0591c1642 Implement support for .local and its "interesting" interactions with .comm. 
llvm-svn: 114382
 2010-09-21 00:24:38 +00:00
Evan Cheng f3e9a48584 Enable machine sinking critical edge splitting. e.g. 
define double @foo(double %x, double %y, i1 %c) nounwind {
  %a = fdiv double %x, 3.2
  %z = select i1 %c, double %a, double %y
  ret double %z
}

Was:
_foo:
        divsd   LCPI0_0(%rip), %xmm0
        testb   $1, %dil
        jne     LBB0_2
        movaps  %xmm1, %xmm0
LBB0_2:
        ret

Now:
_foo:
        testb   $1, %dil
        je      LBB0_2
        divsd   LCPI0_0(%rip), %xmm0
        ret
LBB0_2:
        movaps  %xmm1, %xmm0
        ret

This avoids the divsd when early exit is taken.
rdar://8454886

llvm-svn: 114372
 2010-09-20 22:52:00 +00:00
Dan Gohman 497b3cea1d Relax this check to silently swallow FE_INEXACT, following directions 
from rdar://8452472. This unbreaks gcc.dg/builtins-17.c.

llvm-svn: 114368
 2010-09-20 22:32:25 +00:00
Owen Anderson 5e4734245d CombinerAA is now reordering these stores. 
llvm-svn: 114354
 2010-09-20 20:56:29 +00:00
Owen Anderson 272ff94916 When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore, 
CombinerAA cannot assume that different FrameIndex's never alias, but can instead use
MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing.

This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll
when CombinerAA is enabled, modulo a different register allocation sequence.

llvm-svn: 114348
 2010-09-20 20:39:59 +00:00
Jim Grosbach 94dfd6fc4f Simplify ARM callee-saved register handling by removing the distinction 
between the high and low registers for prologue/epilogue code. This was
a Darwin-only thing that wasn't providing a realistic benefit anymore.
Combining the save areas simplifies the compiler code and results in better
ARM/Thumb2 codegen.

For example, previously we would generate code like:
        push    {r4, r5, r6, r7, lr}
        add     r7, sp, #12
        stmdb   sp!, {r8, r10, r11}
With this change, we combine the register saves and generate:
        push    {r4, r5, r6, r7, r8, r10, r11, lr}
        add     r7, sp, #12

rdar://8445635

llvm-svn: 114340
 2010-09-20 19:32:20 +00:00
Rafael Espindola 32ab4558fe Produce a R_X86_64_32 when the value is >=0. 
llvm-svn: 114339
 2010-09-20 19:20:47 +00:00
Evan Cheng 2031b768ba Avoid splitting critical edge twice for a set of PHI uses. 
llvm-svn: 114338
 2010-09-20 19:12:55 +00:00
Francois Pichet fd02aa84dc Fix the "unable to rename temporary" lit test failing on Windows. rename is now copy + delete on Windows. Problem to be revisited for a permanent and clean solution. 
llvm-svn: 114320
 2010-09-20 04:03:07 +00:00
Chris Lattner a005f9400d fix a bug I introduced back in the hayday of version #2. 
llvm-svn: 114319
 2010-09-20 03:58:32 +00:00
NAKAMURA Takumi b912c27fc9 test/CodeGen/X86: Add explicit triplet -mtriple=i686-linux to 3 tests incompatible to Win32 codegen. 
r114297 raises 3 failures. They might fail also on mingw.

llvm-svn: 114317
 2010-09-19 21:58:55 +00:00
Owen Anderson 7b8d2ae912 Revert r114312 while I sort out some issues. 
llvm-svn: 114313
 2010-09-19 21:01:26 +00:00
Owen Anderson ff82f8a35b Tentatively enabled DAGCombiner Alias Analysis by default. As far as I know, 
r114268 fixed the last of the blockers to enabling it.  I will be monitoring
for failures.

llvm-svn: 114312
 2010-09-19 19:51:55 +00:00
Jakob Stoklund Olesen 49e58a923b Add one more Core i7 model number. 
llvm-svn: 114310
 2010-09-19 17:54:28 +00:00
Misha Brukman 81b7899bc8 Using regexp-opt for keyword regex declarations makes the word lists more 
readable and easier to edit.

llvm-svn: 114308
 2010-09-19 03:44:22 +00:00