2bf458af92
Add patterns for some 16-bit immediate instructions, patch contributed by
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Evan Cheng.
llvm-svn: 24384
2005-11-17 02:01:55 +00:00
5930d3df3d
Add patterns for several simple instructions that take i32 immediates.
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Patch contributed by Evan Cheng!
llvm-svn: 24382
2005-11-16 22:59:19 +00:00
655e7dfd0d
initial step at adding a dag-to-dag isel for X86 backend. Patch contributed
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by Evan Cheng!
llvm-svn: 24371
2005-11-16 01:54:32 +00:00
76ac068568
Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch
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contributed by Evan Cheng.
llvm-svn: 24358
2005-11-15 00:40:23 +00:00
b28f214033
Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.
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llvm-svn: 24233
2005-11-08 02:11:51 +00:00
b54070745e
add a note that Nate mentioned last week
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llvm-svn: 23898
2005-10-23 21:44:59 +00:00
2e81fba9cd
Put some of my random notes somewhere public
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llvm-svn: 23897
2005-10-23 19:52:42 +00:00
4dd383120f
Invert the TargetLowering flag that controls divide by consant expansion.
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Add a new flag to TargetLowering indicating if the target has really cheap
signed division by powers of two, make ppc use it. This will probably go
away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.
llvm-svn: 23853
2005-10-21 00:02:42 +00:00
c0896117d3
Remove some dead code now that the dag combiner exists.
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llvm-svn: 23754
2005-10-15 22:08:02 +00:00
9d7008b08d
Properly split f32 and f64 into separate register classes for scalar sse fp
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fixing a bunch of nasty hackery
llvm-svn: 23735
2005-10-14 22:06:00 +00:00
9982da2703
silence some warnings
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llvm-svn: 23594
2005-10-02 16:29:36 +00:00
bb1c9ecb17
simplify this code using the new regclass info passed in
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llvm-svn: 23557
2005-09-30 17:12:38 +00:00
a654525c1c
Pass extra regclasses into spilling code
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llvm-svn: 23537
2005-09-30 01:29:42 +00:00
0815dcae3f
Add FP versions of the binary operators, keeping the int and fp worlds seperate.
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Though I have done extensive testing, it is possible that this will break
things in configs I can't test. Please let me know if this causes a problem
and I'll fix it ASAP.
llvm-svn: 23505
2005-09-28 22:29:17 +00:00
de3c87a2ab
Implement the isLoadFromStackSlot interface
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llvm-svn: 23387
2005-09-19 05:23:44 +00:00
2e84be22a8
give all operands names
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llvm-svn: 23356
2005-09-14 21:10:24 +00:00
b42e962d23
fix a major regression from my patch this afternoon
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llvm-svn: 23347
2005-09-14 06:06:45 +00:00
fb96e50b8c
This code is no longer needed, it is moved to the target-indep code
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llvm-svn: 23332
2005-09-13 19:31:44 +00:00
210975cfbb
Handle any_extend like zext
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llvm-svn: 23202
2005-09-02 00:16:09 +00:00
19058c3989
1. Use SubtargetFeatures in llc/lli.
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2. Propagate feature "string" to all targets.
3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.
llvm-svn: 23192
2005-09-01 21:38:21 +00:00
aa7fbca285
Adjust to member variable name change.
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llvm-svn: 23119
2005-08-27 19:09:48 +00:00
d0dc6f4299
Fix a bug in my previous checkin
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llvm-svn: 23082
2005-08-26 17:18:44 +00:00
c30405e0ee
Change ConstantPoolSDNode to actually hold the Constant itself instead of
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putting it into the constant pool. This allows the isel machinery to
create constants that it will end up deciding are not needed, without them
ending up in the resultant function constant pool.
llvm-svn: 23081
2005-08-26 17:15:30 +00:00
c146940f0d
Fix a warning
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llvm-svn: 23031
2005-08-25 00:05:15 +00:00
cdc0cbbcd0
Adjust to new livevars interface
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llvm-svn: 22991
2005-08-23 23:41:14 +00:00
7c1c6e06f3
Simplify this code by using LiveVariables::KillsRegister
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llvm-svn: 22988
2005-08-23 22:49:55 +00:00
bd26a82051
Split RegisterClass 'Methods' into MethodProtos and MethodBodies
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llvm-svn: 22929
2005-08-19 19:13:20 +00:00
757a770a57
Put register classes into namespaces
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llvm-svn: 22925
2005-08-19 18:51:57 +00:00
8ad3700a3e
The simple isel being gone makes this dead!
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llvm-svn: 22914
2005-08-19 18:32:03 +00:00
423d7cbbf8
add a few missing cases
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llvm-svn: 22891
2005-08-19 00:41:29 +00:00
e2967ac53d
Give ADJCALLSTACKDOWN/UP the correct operands.
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Give a whole bunch of other stuff variable operands, particularly FP. The
FP stackifier is playing fast and loose with operands here, so we have to
mark them all as variable. This will have to be fixed before we can dag->dag
the X86 backend. The solution is for the pre-stackifier and post-stackifier
instructions to all be disjoint.
llvm-svn: 22890
2005-08-19 00:38:22 +00:00
a9d68f140e
The variable SAR's only take one operand too
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llvm-svn: 22888
2005-08-19 00:31:37 +00:00
145695927a
Stop adding bogus operands to variable shifts on X86. These instructions
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only take one operand. The other comes implicitly in through CL.
llvm-svn: 22887
2005-08-19 00:16:17 +00:00
be1f314a47
Remove the X86 and PowerPC Simple instruction selectors; their time has
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passed.
llvm-svn: 22886
2005-08-18 23:53:15 +00:00
7c76278242
update the backends to work with the new CopyFromReg/CopyToReg/ImplicitDef nodes
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llvm-svn: 22807
2005-08-16 21:56:37 +00:00
371e49515d
Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty
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fixme from the PowerPC backend. Emit slightly better code for legalizing
select_cc.
llvm-svn: 22805
2005-08-16 19:49:35 +00:00
e5394d453d
Fix last night's X86 regressions by putting code for SSE in the if(SSE)
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block. nur.
llvm-svn: 22788
2005-08-14 18:37:02 +00:00
4d959f6627
Fix FP_TO_UINT with Scalar SSE2 now that the legalizer can handle it. We
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now generate the relatively good code sequences:
unsigned short foo(float a) { return a; }
_foo:
movss 4(%esp), %xmm0
cvttss2si %xmm0, %eax
movzwl %ax, %eax
ret
and
unsigned bar(float a) { return a; }
_bar:
movss .CPI_bar_0, %xmm0
movss 4(%esp), %xmm1
movapd %xmm1, %xmm2
subss %xmm0, %xmm2
cvttss2si %xmm2, %eax
xorl $-2147483648, %eax
cvttss2si %xmm1, %ecx
ucomiss %xmm0, %xmm1
cmovb %ecx, %eax
ret
llvm-svn: 22786
2005-08-14 04:36:51 +00:00
6ec7745e80
Update the targets to the new SETCC/CondCodeSDNode interfaces.
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llvm-svn: 22729
2005-08-09 20:21:10 +00:00
158acab986
adjust to change in getSubtarget() api
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llvm-svn: 22687
2005-08-05 21:54:27 +00:00
3bcfcd9474
Add Subtarget support to PowerPC. Next up, using it.
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llvm-svn: 22644
2005-08-04 07:12:09 +00:00
8d394eb703
Scalar SSE: load +0.0 -> xorps/xorpd
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Scalar SSE: a < b ? c : 0.0 -> cmpss, andps
Scalar SSE: float -> i16 needs to be promoted
llvm-svn: 22637
2005-08-03 23:26:28 +00:00
6667bdbaca
Update to use the new MathExtras.h support for log2 computation.
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Patch contributed by Jim Laskey!
llvm-svn: 22594
2005-08-02 19:26:06 +00:00
546fd5944e
Keep tabs and trailing spaces out.
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llvm-svn: 22565
2005-07-30 18:33:25 +00:00
4913457573
fix a typeo
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llvm-svn: 22561
2005-07-30 00:43:00 +00:00
aeef51b6b7
Change the fp to integer code to not perform 2-byte stores followed by
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1 byte loads and other operations. This is bad for store-forwarding on
common CPUs. We now do this:
fnstcw WORD PTR [%ESP]
mov %AX, WORD PTR [%ESP]
instead of:
fnstcw WORD PTR [%ESP]
mov %AL, BYTE PTR [%ESP + 1]
llvm-svn: 22559
2005-07-30 00:17:52 +00:00
4738d1b5cd
Use a custom expander for all FP to int conversions, as the X86 only has
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FP-to-int-in-memory: this exposes the load from the stored slot to the
selection dag, allowing it to be folded into other operaions.
llvm-svn: 22556
2005-07-30 00:05:54 +00:00
2f9c52e194
turn off GOT on archs that didn't use it (not that it appeard to harm them much with it on)
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llvm-svn: 22553
2005-07-29 23:32:02 +00:00
bc85c32c73
Implement a FIXME: move a bunch of cruft for handling FP_TO_*INT operations
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that the X86 does not support to the legalizer. This allows it to be better
optimized, etc, and will help with SSE support.
llvm-svn: 22551
2005-07-29 01:00:29 +00:00
6dc60e859b
Don't forget to diddle with the control word when performing an FISTP64.
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llvm-svn: 22550
2005-07-29 00:54:34 +00:00
Chris Lattner