28b6e12d9d
Mark instructions which are part of the frame setup with the MachineInstr::FrameSetup flag.
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llvm-svn: 135645
2011-07-21 00:44:56 +00:00
8acb434402
LSR crashes on an empty IVUsers list.
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rdar://9786536
llvm-svn: 135644
2011-07-21 00:40:04 +00:00
c3035d6657
X86 is the only target that uses coff format. This should fixes test failures running on Windows, Cygwin, or MingW hosts.
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llvm-svn: 135639
2011-07-20 23:53:54 +00:00
a20cde31e7
Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ARM MC code from target.
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llvm-svn: 135636
2011-07-20 23:34:39 +00:00
ed93564c7a
Remove unused function.
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llvm-svn: 135635
2011-07-20 23:07:42 +00:00
01bd7d9dc0
Remove the now defunct getCompactUnwindEncoding method from the frame lowering code.
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llvm-svn: 135634
2011-07-20 23:04:09 +00:00
ddfe66e948
Refactor.
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llvm-svn: 135633
2011-07-20 23:00:27 +00:00
8fb9fd6769
There are two ways to map a variable to its lexical scope. Lexical scope information is embedded in MDNode describing the variable. It is also available as a part of DebugLoc attached with DBG_VALUE instruction. DebugLoc attached with an instruction is less reliable in optimized code so use information embedded in the MDNode.
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llvm-svn: 135629
2011-07-20 22:18:50 +00:00
911e12f505
Clean up includes of llvm/Analysis/ConstantFolding.h so it's included where it's used and not included where it isn't.
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llvm-svn: 135628
2011-07-20 21:57:23 +00:00
bcd50a10d5
While emitting constant value, look through derived type and use underlying basic type to determine size and signness of the constant value.
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llvm-svn: 135627
2011-07-20 21:57:04 +00:00
a288b1c10a
ARM PKH shift ammount operand printing tweaks.
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Move the shift operator and special value (32 encoded as 0 for PKHTB) handling
into the instruction printer. This cleans up a bit of the disassembler
special casing for these instructions, more easily handles not printing the
operand at all for "lsl #0" and prepares for correct asm parsing of these
operands.
llvm-svn: 135626
2011-07-20 21:40:26 +00:00
0cdc148ab8
Bring LICM into compliance with the new "Memory Model for Concurrent Operations" in LangRef.
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llvm-svn: 135625
2011-07-20 21:37:47 +00:00
94df3be987
Tidy up a bit.
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Move common definitions for ARM and Thumb2 into ARMInstrFormats.td and rename
them to be a bit more descriptive that they're for the PKH instructions.
llvm-svn: 135617
2011-07-20 20:49:03 +00:00
a98f80095b
ARM: Tidy up representation of PKH instruction.
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The shift type is implied by the instruction (PKHBT vs. PKHTB) and so shouldn't
be also encoded as part of the shift value immediate. Otherwise we're able to
represent invalid instructions, plus it needlessly complicates the
representation. Preparatory work for asm parsing of these instructions.
llvm-svn: 135616
2011-07-20 20:32:09 +00:00
e6f7f914db
Fix cmake again :)
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llvm-svn: 135613
2011-07-20 20:00:06 +00:00
bbf3b0de8b
Goodbye TargetAsmInfo. This eliminate last bit of CodeGen and Target in llvm-mc.
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There is still a bit more refactoring left to do in Targets. But we are now very
close to fixing all the layering issues in MC.
llvm-svn: 135611
2011-07-20 19:50:42 +00:00
ae60b6b008
Extend the hack for _GLOBAL_OFFSET_TABLE_ slightly; PR10389.
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llvm-svn: 135607
2011-07-20 19:36:11 +00:00
8d11490771
ARM assembly parsing of MUL instruction.
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Correctly handle 's' bit and predication suffices. Add parsing and encoding
tests.
llvm-svn: 135596
2011-07-20 18:20:31 +00:00
6ed783228d
PR10421: Fix a straightforward bug in the widening logic for CONCAT_VECTORS.
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llvm-svn: 135595
2011-07-20 18:14:33 +00:00
acb9ed4077
Initialize the EHFrameSection pointer to zero.
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This should fix the spurious buildbot errors.
llvm-svn: 135594
2011-07-20 18:13:23 +00:00
50bfbab033
Fix a GCC warning.
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llvm-svn: 135581
2011-07-20 08:15:21 +00:00
efd9b4240f
- Move CodeModel from a TargetMachine global option to MCCodeGenInfo.
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- Introduce JITDefault code model. This tells targets to set different default
code model for JIT. This eliminates the ugly hack in TargetMachine where
code model is changed after construction.
llvm-svn: 135580
2011-07-20 07:51:56 +00:00
345b6b45c1
Include MCRegisterInfo to eliminate a compilation warning.
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llvm-svn: 135575
2011-07-20 06:54:19 +00:00
e3063f022b
Fix the CMake build.
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llvm-svn: 135573
2011-07-20 06:35:24 +00:00
76792992d6
Add MCObjectFileInfo and sink the MCSections initialization code from
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TargetLoweringObjectFileImpl down to MCObjectFileInfo.
TargetAsmInfo is done to one last method. It's *almost* gone!
llvm-svn: 135569
2011-07-20 05:58:47 +00:00
638b355a16
indvars: Added getInsertPointForUses to find a valid place to truncate the IV.
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llvm-svn: 135568
2011-07-20 05:32:06 +00:00
2210448520
indvars -disable-iv-rewrite: Add NarrowIVDefUse to cache def-use
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info. Holding Use* pointers is bad form even though it happened to
work in this case.
llvm-svn: 135566
2011-07-20 04:39:24 +00:00
b66d255595
X86Subtarget.h: Assume "x86_64-cygwin", though it has not been released yet, to appease test/CodeGen/X86 on cygwin.
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llvm-svn: 135564
2011-07-20 04:02:20 +00:00
954bdafb50
Extra semi-colon.
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llvm-svn: 135561
2011-07-20 02:44:39 +00:00
c5dd3e976a
indvars -disable-iv-rewrite fix: derived GEP IVs
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llvm-svn: 135558
2011-07-20 02:08:58 +00:00
cc38ef6d84
Don't leak CodeGenInfos.
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llvm-svn: 135555
2011-07-20 01:27:58 +00:00
170581488f
Change name of class.
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llvm-svn: 135550
2011-07-20 00:53:09 +00:00
969edcdf74
Define classes for definitions of atomic instructions.
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llvm-svn: 135546
2011-07-20 00:23:01 +00:00
a4c09bce9b
Lower memory barriers to sync instructions.
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llvm-svn: 135537
2011-07-19 23:30:50 +00:00
ccf243d56b
Fix an obvious typo that's preventing x86 (32-bit) from using .literal16.
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llvm-svn: 135535
2011-07-19 23:14:32 +00:00
55d6ccbb79
PR10386: Don't try to split an edge from an indirectbr.
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llvm-svn: 135534
2011-07-19 22:59:41 +00:00
d25c2cdad7
Tweak ARM assembly parsing and printing of MSR instruction.
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The system register spec should be case insensitive. The preferred form for
output with mask values of 4, 8, and 12 references APSR rather than CPSR.
Update and tidy up tests accordingly.
llvm-svn: 135532
2011-07-19 22:45:10 +00:00
a59b24b090
Distinguish between two copies of one inlined variable.
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llvm-svn: 135528
2011-07-19 22:31:15 +00:00
97094d8f06
ARM assembly parsing of MRS instruction.
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Teach the parser to recognize the APSR and SPSR system register names. Add
and update tests accordingly.
llvm-svn: 135527
2011-07-19 21:59:29 +00:00
c78e03c39a
Enhance the FixedLengthDecoder to be able to generate plausible-looking decoders for ARM.
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llvm-svn: 135524
2011-07-19 21:06:00 +00:00
9663dd3f00
Change variable name.
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llvm-svn: 135522
2011-07-19 20:56:53 +00:00
7d1e5f11ea
ARM assembly parsing for MRC/MRC2/MRRC/MRRC2.
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Add range checking to the immediate operands. Update tests accordingly.
llvm-svn: 135521
2011-07-19 20:35:35 +00:00
f3b29992d5
Use the correct opcodes: SLLV/SRLV or AND must be used instead of SLL/SRL or
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ANDi, when the instruction does not have any immediate operands.
llvm-svn: 135520
2011-07-19 20:34:00 +00:00
0e01959327
Use descriptive variable names.
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llvm-svn: 135514
2011-07-19 20:11:17 +00:00
5cc3b4cd9a
ARM assembly parsing for MOV (register).
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Correct the handling of the 's' suffix when parsing ARM mode. It's only a
truly separate opcode in Thumb. Add test cases to make sure we handle
the s and condition suffices correctly, including diagnostics.
llvm-svn: 135513
2011-07-19 20:10:31 +00:00
81ebc733b4
Tidy up.
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llvm-svn: 135507
2011-07-19 19:47:11 +00:00
22ac078657
Tighten conditional for 'mov' cc_out.
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Make sure we only clobber the cc_out operand if it is indeed a default
non-setting operand.
llvm-svn: 135506
2011-07-19 19:45:44 +00:00
cfa82a378d
Reapply r135457. This needs llvm-gcc change, that I forgot to check-in yesterday.
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llvm-svn: 135504
2011-07-19 19:41:54 +00:00
7c09e3c3f3
ARM assembly parsing for MOV (immediate).
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Add range checking for the immediate operand and handle the "mov" mnemonic
choosing between encodings based on the value of the immediate. Add tests
for fixups, encoding choice and values, and diagnostic for out of range values.
llvm-svn: 135500
2011-07-19 19:13:28 +00:00
b475205afd
Remove unused code.
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cc_out and pred operands are added during parsing via custom C++ now.
llvm-svn: 135497
2011-07-19 18:32:48 +00:00
Bill Wendling