3b0f5e4d61
- Add target lowering hooks that specify which setcc conditions are illegal,
...
i.e. conditions that cannot be checked with a single instruction. For example,
SETONE and SETUEQ on x86.
- Teach legalizer to implement *illegal* setcc as a and / or of a number of
legal setcc nodes. For now, only implement FP conditions. e.g. SETONE is
implemented as SETO & SETNE, SETUEQ is SETUO | SETEQ.
- Move x86 target over.
llvm-svn: 57542
2008-10-15 02:05:31 +00:00
e7ced74558
FastISel support for exception-handling constructs.
...
- Move the EH landing-pad code and adjust it so that it works
with FastISel as well as with SDISel.
- Add FastISel support for @llvm.eh.exception and
@llvm.eh.selector.
llvm-svn: 57539
2008-10-14 23:54:11 +00:00
07d53b1d33
Rename LoadX to LoadExt.
...
llvm-svn: 57526
2008-10-14 21:26:46 +00:00
9c4b7d5c4f
Fix command-line option printing to print two spaces where needed,
...
instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.
llvm-svn: 57521
2008-10-14 20:25:08 +00:00
da9b752883
FIX PR2794. Make sure SIGN_EXTEND_INREG nodes introduced by LegalizeSetCCOperands are leglized. Patch by Richard Pennington.
...
llvm-svn: 57460
2008-10-13 18:46:18 +00:00
43686a6665
* Make TargetLowering not crash when TargetMachine::getTargetAsmInfo() returns
...
null. This assumes that any target that does not have AsmInfo, does not
support "LocAndDot".
llvm-svn: 57438
2008-10-13 12:41:46 +00:00
c52af45304
calls can be supported.
...
llvm-svn: 57428
2008-10-13 01:59:13 +00:00
2753955fc0
Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as
...
parameters instead of raw Constants. This prevents the constants from
being selected by the isel pass, fixing PR2735.
llvm-svn: 57385
2008-10-11 22:08:30 +00:00
fb1f4a1329
simplify comparison
...
llvm-svn: 57371
2008-10-11 00:08:02 +00:00
4f0bd68cfe
Add a "loses information" return value to APFloat::convert
...
and APFloat::convertToInteger. Restore return value to
IEEE754. Adjust all users accordingly.
llvm-svn: 57329
2008-10-09 23:00:39 +00:00
54306fe499
Rename APFloat::convertToAPInt to bitcastToAPInt to
...
make it clearer what the function does. No functional
change.
llvm-svn: 57325
2008-10-09 18:53:47 +00:00
c1d47c56f9
Avoid emitting redundant materializations of integer constants
...
for things like null pointers, which at this level aren't
different from regular integer constants.
llvm-svn: 57265
2008-10-07 22:03:27 +00:00
21dca9cbb1
Use Dan's supperior check
...
llvm-svn: 57255
2008-10-07 18:27:23 +00:00
d69bdaef64
No need for |=
...
llvm-svn: 57249
2008-10-07 17:11:29 +00:00
6d409f08be
Use ADDC if it is valid at any smaller size. Do it right this time
...
llvm-svn: 57248
2008-10-07 17:09:16 +00:00
6606f17e50
Use ADDC if it is valid at any smaller size. fixes test/Codegen/Generic/i128-addsub.ll on x86
...
llvm-svn: 57247
2008-10-07 17:03:15 +00:00
3a9be150be
Expand arith on machines without carry flags
...
llvm-svn: 57243
2008-10-07 14:15:42 +00:00
bef9b0bef0
Correctly handle calls with no return values. This fixes
...
2006-01-23-UnionInit on x86-64 when inlining is not enabled.
llvm-svn: 57223
2008-10-07 00:12:37 +00:00
2416896b3c
wrap some long lines and expand i32 mul's to libcalls, inspired by a
...
patch by Mikael Lepisto!
llvm-svn: 57077
2008-10-04 21:27:46 +00:00
13b048268b
Fix fast-isel's handling of atomic instructions. They may
...
expand to multiple basic blocks, in which case fast-isel
needs to informed of which block to use as it resumes
inserting instructions.
llvm-svn: 57040
2008-10-04 00:56:36 +00:00
5d60c1ebb1
Pass MemOperand through for 64-bit atomics on 32-bit,
...
incidentally making the case where the memop is a
pointer deref work. Fix cmp-and-swap regression.
llvm-svn: 57027
2008-10-03 19:41:08 +00:00
b62cd7ea98
Use -1ULL instead of uint64_t(-1), at Anton's suggestion.
...
llvm-svn: 57021
2008-10-03 17:56:45 +00:00
6e42742d2d
The result of getSetCCResultType (eg: i32) may be larger
...
than the type an i1 is promoted to (eg: i8). Account
for this. Noticed by Tilmann Scheller on CellSPU; he
will hopefully take care of fixing this in LegalizeDAG
and adding a testcase!
llvm-svn: 56997
2008-10-03 07:41:46 +00:00
4e072a75cc
Implement fast-isel support for zero-extending from i1.
...
It turns out that this is a fairly common operation,
and it's easy enough to handle.
llvm-svn: 56990
2008-10-03 01:28:47 +00:00
1ab1d31f7a
Optimize conditional branches in X86FastISel. This replaces
...
sequences like this:
sete %al
testb %al, %al
jne LBB11_1
with this:
je LBB11_1
llvm-svn: 56969
2008-10-02 22:15:21 +00:00
867d549fce
Handle some 64-bit atomics on x86-32, some of the time.
...
llvm-svn: 56963
2008-10-02 18:53:47 +00:00
1dd27578dd
Make some implicit conversions explicit, to avoid compiler warnings.
...
llvm-svn: 56927
2008-10-01 19:58:59 +00:00
94798d31dd
Fold trivial two-operand tokenfactors where the operands are equal
...
immediately.
llvm-svn: 56921
2008-10-01 15:11:19 +00:00
3a293e7404
Fix typos in comments.
...
llvm-svn: 56919
2008-10-01 15:07:49 +00:00
68f12ee567
Implement the -fno-builtin option in the front-end, not in the back-end.
...
llvm-svn: 56900
2008-10-01 00:59:58 +00:00
e818bc159f
- Initialize "--no-builtin" to "false".
...
- Testcase for r56885.
llvm-svn: 56886
2008-09-30 21:40:30 +00:00
bd09262e97
Add the new `-no-builtin' flag. This flag is meant to mimic the GCC
...
`-fno-builtin' flag. Currently, it's used to replace "memset" with "_bzero"
instead of "__bzero" on Darwin10+. This arguably violates the meaning of this
flag, but is currently sufficient. The meaning of this flag should become more
specific over time.
llvm-svn: 56885
2008-09-30 21:22:07 +00:00
b486350b15
Move the primary fast-isel top-level comments to FastISel.cpp, where
...
they'll be a little more visible. Also, update and reword them a bit.
llvm-svn: 56877
2008-09-30 20:48:29 +00:00
86aa16a69a
Optimize SelectionDAG's AssignTopologicalOrder even further.
...
Completely eliminate the TopOrder std::vector. Instead, sort
the AllNodes list in place. This also eliminates the need to
call AllNodes.size(), a linear-time operation, before
performing the sort.
Also, eliminate the Sources temporary std::vector, since it
essentially duplicates the sorted result as it is being
built.
This also changes the direction of the topological sort
from bottom-up to top-down. The AllNodes list starts out in
roughly top-down order, so this reduces the amount of
reordering needed. Top-down is also more convenient for
Legalize, and ISel needed only minor adjustments.
llvm-svn: 56867
2008-09-30 18:30:35 +00:00
f61a84ec43
Remove misuse of ReplaceNodeResults for atomics with
...
valid types. No functional change.
llvm-svn: 56808
2008-09-29 22:25:26 +00:00
4aa9095398
Fix FastISel to not initialize the PIC-base register multiple times
...
in functions with PIC references from more than one basic block.
llvm-svn: 56807
2008-09-29 21:55:50 +00:00
c966a737c5
Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc:
...
/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311.
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter > for instructions.
{standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
{standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression
{standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
...
llvm-svn: 56703
2008-09-26 22:10:44 +00:00
6e0548336a
Rename ConstantSDNode's getSignExtended to getSExtValue, for
...
consistancy with ConstantInt, and re-implement it in terms
of ConstantInt's getSExtValue.
llvm-svn: 56700
2008-09-26 21:54:37 +00:00
d77cbe8947
Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0.
...
llvm-svn: 56683
2008-09-26 19:48:35 +00:00
0e32a2c935
Add "inreg" field to CallSDNode (doesn't increase
...
its size). Adjust various lowering functions to
pass this info through from CallInst. Use it to
implement sseregparm returns on X86. Remove
X86_ssecall calling convention.
llvm-svn: 56677
2008-09-26 19:31:26 +00:00
4c758ea3e0
Large mechanical patch.
...
s/ParamAttr/Attribute/g
s/PAList/AttrList/g
s/FnAttributeWithIndex/AttributeWithIndex/g
s/FnAttr/Attribute/g
This sets the stage
- to implement function notes as function attributes and
- to distinguish between function attributes and return value attributes.
This requires corresponding changes in llvm-gcc and clang.
llvm-svn: 56622
2008-09-25 21:00:45 +00:00
c50ada2f56
Accept 'inreg' attribute on x86 functions as
...
meaning sse_regparm (i.e. float/double values go
in XMM0 instead of ST0). Update documentation
to reflect reality.
llvm-svn: 56619
2008-09-25 20:47:45 +00:00
5e490a7567
Support for i1 XOR in FastISel. It is actually safe because
...
i1 operands are assumed to already by zero-extended.
llvm-svn: 56615
2008-09-25 17:22:52 +00:00
6975c36c43
Don't print fast-isel debug messages by default. Thanks Chris!
...
llvm-svn: 56614
2008-09-25 17:21:42 +00:00
dd920bf3f0
Don't forget the newline in debug output.
...
llvm-svn: 56613
2008-09-25 17:17:27 +00:00
32a733e2c7
FastISel support for debug info.
...
llvm-svn: 56610
2008-09-25 17:05:24 +00:00
4b35e64504
bug 2812: Segmentation fault on a big emdiam processor.
...
llvm-svn: 56609
2008-09-25 16:15:10 +00:00
3663f156f7
Fix a recent fast-isel coverage regression - don't bail out before
...
giving the target a chance to materialize constants.
llvm-svn: 56605
2008-09-25 01:28:51 +00:00
b8e69f1755
Enable DeadMachineInstructionElim when Fast-ISel is enabled.
...
llvm-svn: 56604
2008-09-25 01:14:49 +00:00
2e7450716a
<rdar://problem/6234798> Assertion failed: (!OpInfo.AssignedRegs.Regs.empty() && "Couldn't allocate input reg!")
...
llvm-svn: 56597
2008-09-25 00:14:04 +00:00
Evan Cheng